1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: NVIDIA Tegra194 CPU Complex device tree bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Thierry Reding <thierry.reding@gmail.com> 11*4882a593Smuzhiyun - Jonathan Hunter <jonathanh@nvidia.com> 12*4882a593Smuzhiyun - Sumit Gupta <sumitg@nvidia.com> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyundescription: |+ 15*4882a593Smuzhiyun Tegra194 SOC has homogeneous architecture where each cluster has two 16*4882a593Smuzhiyun symmetric cores. Compatible string in "cpus" node represents the CPU 17*4882a593Smuzhiyun Complex having all clusters. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun $nodename: 21*4882a593Smuzhiyun const: cpus 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun enum: 25*4882a593Smuzhiyun - nvidia,tegra194-ccplex 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun nvidia,bpmp: 28*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/phandle' 29*4882a593Smuzhiyun description: | 30*4882a593Smuzhiyun Specifies the bpmp node that needs to be queried to get 31*4882a593Smuzhiyun operating point data for all CPUs. 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunadditionalProperties: true 34*4882a593Smuzhiyun 35*4882a593Smuzhiyunexamples: 36*4882a593Smuzhiyun - | 37*4882a593Smuzhiyun cpus { 38*4882a593Smuzhiyun compatible = "nvidia,tegra194-ccplex"; 39*4882a593Smuzhiyun nvidia,bpmp = <&bpmp>; 40*4882a593Smuzhiyun #address-cells = <1>; 41*4882a593Smuzhiyun #size-cells = <0>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun cpu0_0: cpu@0 { 44*4882a593Smuzhiyun compatible = "nvidia,tegra194-carmel"; 45*4882a593Smuzhiyun device_type = "cpu"; 46*4882a593Smuzhiyun reg = <0x0>; 47*4882a593Smuzhiyun enable-method = "psci"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun cpu0_1: cpu@1 { 51*4882a593Smuzhiyun compatible = "nvidia,tegra194-carmel"; 52*4882a593Smuzhiyun device_type = "cpu"; 53*4882a593Smuzhiyun reg = <0x001>; 54*4882a593Smuzhiyun enable-method = "psci"; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun cpu1_0: cpu@100 { 58*4882a593Smuzhiyun compatible = "nvidia,tegra194-carmel"; 59*4882a593Smuzhiyun device_type = "cpu"; 60*4882a593Smuzhiyun reg = <0x100>; 61*4882a593Smuzhiyun enable-method = "psci"; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun cpu1_1: cpu@101 { 65*4882a593Smuzhiyun compatible = "nvidia,tegra194-carmel"; 66*4882a593Smuzhiyun device_type = "cpu"; 67*4882a593Smuzhiyun reg = <0x101>; 68*4882a593Smuzhiyun enable-method = "psci"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun... 72