1*4882a593SmuzhiyunSPM AVS Wrapper 2 (SAW2) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the 4*4882a593SmuzhiyunAdaptive Voltage Scaling (AVS) hardware. The SPM is a programmable 5*4882a593Smuzhiyunpower-controller that transitions a piece of hardware (like a processor or 6*4882a593Smuzhiyunsubsystem) into and out of low power modes via a direct connection to 7*4882a593Smuzhiyunthe PMIC. It can also be wired up to interact with other processors in the 8*4882a593Smuzhiyunsystem, notifying them when a low power state is entered or exited. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunMultiple revisions of the SAW hardware are supported using these Device Nodes. 11*4882a593SmuzhiyunSAW2 revisions differ in the register offset and configuration data. Also, the 12*4882a593Smuzhiyunsame revision of the SAW in different SoCs may have different configuration 13*4882a593Smuzhiyundata due the the differences in hardware capabilities. Hence the SoC name, the 14*4882a593Smuzhiyunversion of the SAW hardware in that SoC and the distinction between cpu (big 15*4882a593Smuzhiyunor Little) or cache, may be needed to uniquely identify the SAW register 16*4882a593Smuzhiyunconfiguration and initialization data. The compatible string is used to 17*4882a593Smuzhiyunindicate this parameter. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunPROPERTIES 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- compatible: 22*4882a593Smuzhiyun Usage: required 23*4882a593Smuzhiyun Value type: <string> 24*4882a593Smuzhiyun Definition: Must have 25*4882a593Smuzhiyun "qcom,saw2" 26*4882a593Smuzhiyun A more specific value could be one of: 27*4882a593Smuzhiyun "qcom,apq8064-saw2-v1.1-cpu" 28*4882a593Smuzhiyun "qcom,msm8974-saw2-v2.1-cpu" 29*4882a593Smuzhiyun "qcom,apq8084-saw2-v2.1-cpu" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun- reg: 32*4882a593Smuzhiyun Usage: required 33*4882a593Smuzhiyun Value type: <prop-encoded-array> 34*4882a593Smuzhiyun Definition: the first element specifies the base address and size of 35*4882a593Smuzhiyun the register region. An optional second element specifies 36*4882a593Smuzhiyun the base address and size of the alias register region. 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun- regulator: 39*4882a593Smuzhiyun Usage: optional 40*4882a593Smuzhiyun Value type: boolean 41*4882a593Smuzhiyun Definition: Indicates that this SPM device acts as a regulator device 42*4882a593Smuzhiyun device for the core (CPU or Cache) the SPM is attached 43*4882a593Smuzhiyun to. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunExample 1: 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun power-controller@2099000 { 48*4882a593Smuzhiyun compatible = "qcom,saw2"; 49*4882a593Smuzhiyun reg = <0x02099000 0x1000>, <0x02009000 0x1000>; 50*4882a593Smuzhiyun regulator; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593SmuzhiyunExample 2: 54*4882a593Smuzhiyun saw0: power-controller@f9089000 { 55*4882a593Smuzhiyun compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2"; 56*4882a593Smuzhiyun reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; 57*4882a593Smuzhiyun }; 58