1*4882a593SmuzhiyunMediatek vcodecsys controller 2*4882a593Smuzhiyun============================ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe Mediatek vcodecsys controller provides various clocks to the system. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired Properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible: Should be one of: 9*4882a593Smuzhiyun - "mediatek,mt6765-vcodecsys", "syscon" 10*4882a593Smuzhiyun- #clock-cells: Must be 1 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe vcodecsys controller uses the common clk binding from 13*4882a593SmuzhiyunDocumentation/devicetree/bindings/clock/clock-bindings.txt 14*4882a593SmuzhiyunThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunThe vcodecsys controller also uses the common power domain from 17*4882a593SmuzhiyunDocumentation/devicetree/bindings/soc/mediatek/scpsys.txt 18*4882a593SmuzhiyunThe available power doamins are defined in dt-bindings/power/mt*-power.h. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunvenc_gcon: clock-controller@17000000 { 23*4882a593Smuzhiyun compatible = "mediatek,mt6765-vcodecsys", "syscon"; 24*4882a593Smuzhiyun reg = <0 0x17000000 0 0x10000>; 25*4882a593Smuzhiyun power-domains = <&scpsys MT6765_POWER_DOMAIN_VCODEC>; 26*4882a593Smuzhiyun #clock-cells = <1>; 27*4882a593Smuzhiyun}; 28