xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: MediaTek Peripheral Configuration Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Bartosz Golaszewski <bgolaszewski@baylibre.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription:
13*4882a593Smuzhiyun  The Mediatek pericfg controller provides various clocks and reset outputs
14*4882a593Smuzhiyun  to the system.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    oneOf:
19*4882a593Smuzhiyun      - items:
20*4882a593Smuzhiyun          - enum:
21*4882a593Smuzhiyun              - mediatek,mt2701-pericfg
22*4882a593Smuzhiyun              - mediatek,mt2712-pericfg
23*4882a593Smuzhiyun              - mediatek,mt6765-pericfg
24*4882a593Smuzhiyun              - mediatek,mt7622-pericfg
25*4882a593Smuzhiyun              - mediatek,mt7629-pericfg
26*4882a593Smuzhiyun              - mediatek,mt8135-pericfg
27*4882a593Smuzhiyun              - mediatek,mt8173-pericfg
28*4882a593Smuzhiyun              - mediatek,mt8183-pericfg
29*4882a593Smuzhiyun              - mediatek,mt8516-pericfg
30*4882a593Smuzhiyun          - const: syscon
31*4882a593Smuzhiyun      - items:
32*4882a593Smuzhiyun          # Special case for mt7623 for backward compatibility
33*4882a593Smuzhiyun          - const: mediatek,mt7623-pericfg
34*4882a593Smuzhiyun          - const: mediatek,mt2701-pericfg
35*4882a593Smuzhiyun          - const: syscon
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  reg:
38*4882a593Smuzhiyun    maxItems: 1
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  '#clock-cells':
41*4882a593Smuzhiyun    const: 1
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun  '#reset-cells':
44*4882a593Smuzhiyun    const: 1
45*4882a593Smuzhiyun
46*4882a593Smuzhiyunrequired:
47*4882a593Smuzhiyun  - compatible
48*4882a593Smuzhiyun  - reg
49*4882a593Smuzhiyun
50*4882a593SmuzhiyunadditionalProperties: false
51*4882a593Smuzhiyun
52*4882a593Smuzhiyunexamples:
53*4882a593Smuzhiyun  - |
54*4882a593Smuzhiyun    pericfg@10003000 {
55*4882a593Smuzhiyun        compatible = "mediatek,mt8173-pericfg", "syscon";
56*4882a593Smuzhiyun        reg = <0x10003000 0x1000>;
57*4882a593Smuzhiyun        #clock-cells = <1>;
58*4882a593Smuzhiyun        #reset-cells = <1>;
59*4882a593Smuzhiyun    };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  - |
62*4882a593Smuzhiyun    pericfg@10003000 {
63*4882a593Smuzhiyun        compatible =  "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon";
64*4882a593Smuzhiyun        reg = <0x10003000 0x1000>;
65*4882a593Smuzhiyun        #clock-cells = <1>;
66*4882a593Smuzhiyun        #reset-cells = <1>;
67*4882a593Smuzhiyun    };
68