xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593SmuzhiyunMediatek mfgcfg controller
2*4882a593Smuzhiyun============================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe Mediatek mfgcfg controller provides various clocks to the system.
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6*4882a593SmuzhiyunRequired Properties:
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8*4882a593Smuzhiyun- compatible: Should be one of:
9*4882a593Smuzhiyun	- "mediatek,mt2712-mfgcfg", "syscon"
10*4882a593Smuzhiyun	- "mediatek,mt6779-mfgcfg", "syscon"
11*4882a593Smuzhiyun	- "mediatek,mt8167-mfgcfg", "syscon"
12*4882a593Smuzhiyun	- "mediatek,mt8183-mfgcfg", "syscon"
13*4882a593Smuzhiyun- #clock-cells: Must be 1
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunThe mfgcfg controller uses the common clk binding from
16*4882a593SmuzhiyunDocumentation/devicetree/bindings/clock/clock-bindings.txt
17*4882a593SmuzhiyunThe available clocks are defined in dt-bindings/clock/mt*-clk.h.
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19*4882a593SmuzhiyunExample:
20*4882a593Smuzhiyun
21*4882a593Smuzhiyunmfgcfg: syscon@13000000 {
22*4882a593Smuzhiyun	compatible = "mediatek,mt2712-mfgcfg", "syscon";
23*4882a593Smuzhiyun	reg = <0 0x13000000 0 0x1000>;
24*4882a593Smuzhiyun	#clock-cells = <1>;
25*4882a593Smuzhiyun};
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