1*4882a593SmuzhiyunMediatek mcucfg controller 2*4882a593Smuzhiyun============================ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe Mediatek mcucfg controller provides various clocks to the system. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired Properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible: Should be one of: 9*4882a593Smuzhiyun - "mediatek,mt2712-mcucfg", "syscon" 10*4882a593Smuzhiyun - "mediatek,mt8183-mcucfg", "syscon" 11*4882a593Smuzhiyun- #clock-cells: Must be 1 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunThe mcucfg controller uses the common clk binding from 14*4882a593SmuzhiyunDocumentation/devicetree/bindings/clock/clock-bindings.txt 15*4882a593SmuzhiyunThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunmcucfg: syscon@10220000 { 20*4882a593Smuzhiyun compatible = "mediatek,mt2712-mcucfg", "syscon"; 21*4882a593Smuzhiyun reg = <0 0x10220000 0 0x1000>; 22*4882a593Smuzhiyun #clock-cells = <1>; 23*4882a593Smuzhiyun}; 24