xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593SmuzhiyunMediatek hifsys controller
2*4882a593Smuzhiyun============================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe Mediatek hifsys controller provides various clocks and reset
5*4882a593Smuzhiyunoutputs to the system.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunRequired Properties:
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun- compatible: Should be:
10*4882a593Smuzhiyun	- "mediatek,mt2701-hifsys", "syscon"
11*4882a593Smuzhiyun	- "mediatek,mt7622-hifsys", "syscon"
12*4882a593Smuzhiyun	- "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
13*4882a593Smuzhiyun- #clock-cells: Must be 1
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunThe hifsys controller uses the common clk binding from
16*4882a593SmuzhiyunDocumentation/devicetree/bindings/clock/clock-bindings.txt
17*4882a593SmuzhiyunThe available clocks are defined in dt-bindings/clock/mt*-clk.h.
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunExample:
20*4882a593Smuzhiyun
21*4882a593Smuzhiyunhifsys: clock-controller@1a000000 {
22*4882a593Smuzhiyun	compatible = "mediatek,mt2701-hifsys", "syscon";
23*4882a593Smuzhiyun	reg = <0 0x1a000000 0 0x1000>;
24*4882a593Smuzhiyun	#clock-cells = <1>;
25*4882a593Smuzhiyun	#reset-cells = <1>;
26*4882a593Smuzhiyun};
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