1*4882a593SmuzhiyunMarvell Kirkwood Platforms Device Tree Bindings 2*4882a593Smuzhiyun----------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunBoards with a SoC of the Marvell Kirkwood 5*4882a593Smuzhiyunshall have the following property: 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired root node property: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyuncompatible: must contain "marvell,kirkwood"; 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunIn order to support the kirkwood cpufreq driver, there must be a node 12*4882a593Smuzhiyuncpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", 13*4882a593Smuzhiyunwhere the "powersave" clock is a gating clock used to switch the CPU 14*4882a593Smuzhiyunbetween the "cpu_clk" and the "ddrclk". 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun cpus { 19*4882a593Smuzhiyun #address-cells = <1>; 20*4882a593Smuzhiyun #size-cells = <0>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun cpu@0 { 23*4882a593Smuzhiyun device_type = "cpu"; 24*4882a593Smuzhiyun compatible = "marvell,sheeva-88SV131"; 25*4882a593Smuzhiyun clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; 26*4882a593Smuzhiyun clock-names = "cpu_clk", "ddrclk", "powersave"; 27*4882a593Smuzhiyun }; 28