1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2014, 2016-2017 ARM Limited. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software and is provided to you under the terms of the GNU General Public License version 2 5*4882a593Smuzhiyun * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * A copy of the licence is included with the program, and can also be obtained from Free Software 8*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun* ARM Mali-300/400/450 GPU 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired properties: 13*4882a593Smuzhiyun- compatible: 14*4882a593Smuzhiyun At least one of these: "arm,mali-300", "arm,mali-400", "arm,mali-450" 15*4882a593Smuzhiyun Always: "arm,mali-utgard" 16*4882a593Smuzhiyun Mali-450 can also include "arm,mali-400" as it is compatible. 17*4882a593Smuzhiyun - "arm,mali-400", "arm,mali-utgard" for any Mali-400 GPU. 18*4882a593Smuzhiyun - "arm,mali-450", "arm,mali-400", "arm,mali-utgard" for any Mali-450 GPU. 19*4882a593Smuzhiyun- reg: 20*4882a593Smuzhiyun Physical base address and length of the GPU's registers. 21*4882a593Smuzhiyun- interrupts: 22*4882a593Smuzhiyun - List of all Mali interrupts. 23*4882a593Smuzhiyun - This list must match the number of and the order of entries in 24*4882a593Smuzhiyun interrupt-names. 25*4882a593Smuzhiyun- interrupt-names: 26*4882a593Smuzhiyun - IRQPP<X> - Name for PP interrupts. 27*4882a593Smuzhiyun - IRQPPMMU<X> - Name for interrupts from the PP MMU. 28*4882a593Smuzhiyun - IRQPP - Name for the PP broadcast interrupt (Mali-450 only). 29*4882a593Smuzhiyun - IRQGP - Name for the GP interrupt. 30*4882a593Smuzhiyun - IRQGPMMU - Name for the interrupt from the GP MMU. 31*4882a593Smuzhiyun - IRQPMU - Name for the PMU interrupt (If pmu is implemented in HW, it must be contained). 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunOptional properties: 34*4882a593Smuzhiyun- pmu_domain_config: 35*4882a593Smuzhiyun - If the Mali internal PMU is present and the PMU IRQ is specified in 36*4882a593Smuzhiyun interrupt/interrupt-names ("IRQPMU").This contains the mapping of 37*4882a593Smuzhiyun Mali HW units to the PMU power domain. 38*4882a593Smuzhiyun -Mali Dynamic power domain configuration in sequence from 0-11, like: 39*4882a593Smuzhiyun <GP PP0 PP1 PP2 PP3 PP4 PP5 PP6 PP7 L2$0 L2$1 L2$2>. 40*4882a593Smuzhiyun- pmu-switch-delay: 41*4882a593Smuzhiyun - Only needed if the power gates are connected to the PMU in a high fanout 42*4882a593Smuzhiyun network. This value is the number of Mali clock cycles it takes to 43*4882a593Smuzhiyun enable the power gates and turn on the power mesh. This value will 44*4882a593Smuzhiyun have no effect if a daisy chain implementation is used. 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunPlatform related properties: 47*4882a593Smuzhiyun- clocks: Phandle to clock for Mali utgard device. 48*4882a593Smuzhiyun- clock-names: the corresponding names of clock in clocks property. 49*4882a593Smuzhiyun- regulator: Phandle to regulator which is power supplier of mali device. 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunExample for a Mali400_MP1_PMU device: 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun/ { 54*4882a593Smuzhiyun ... 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun gpu@12300000 { 57*4882a593Smuzhiyun compatible = "arm,mali-400", "arm,mali-utgard"; 58*4882a593Smuzhiyun reg = <0x12300000 0x30000>; 59*4882a593Smuzhiyun interrupts = <0 55 4>, <0 56 4>, <0 57 4>, <0 58 4>, <0 59 4>; 60*4882a593Smuzhiyun interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPMU"; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun pmu_domain_config = <0x1 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2 0x0 0x0>; 63*4882a593Smuzhiyun pmu_switch_delay = <0xff>; 64*4882a593Smuzhiyun clocks = <clock 122>, <clock 123>; 65*4882a593Smuzhiyun clock-names = "mali_parent", "mali"; 66*4882a593Smuzhiyun vdd_g3d-supply = <regulator_Phandle>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun} 69