1# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note 2# 3# (C) COPYRIGHT 2013-2022 ARM Limited. All rights reserved. 4# 5# This program is free software and is provided to you under the terms of the 6# GNU General Public License version 2 as published by the Free Software 7# Foundation, and any use by you of this program is subject to the terms 8# of such GNU license. 9# 10# This program is distributed in the hope that it will be useful, 11# but WITHOUT ANY WARRANTY; without even the implied warranty of 12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13# GNU General Public License for more details. 14# 15# You should have received a copy of the GNU General Public License 16# along with this program; if not, you can access it online at 17# http://www.gnu.org/licenses/gpl-2.0.html. 18# 19# 20 21* ARM Mali Midgard / Bifrost devices 22 23 24Required properties: 25 26- compatible : Should be mali<chip>, replacing digits with x from the back, 27until malit<Major>xx, and it must end with one of: "arm,malit6xx" or 28"arm,mali-midgard" or "arm,mali-bifrost" 29- reg : Physical base address of the device and length of the register area. 30- interrupts : Contains the three IRQ lines required by T-6xx devices 31- interrupt-names : Contains the names of IRQ resources in the order they were 32provided in the interrupts property. Must contain: "JOB, "MMU", "GPU". 33 34Optional: 35 36- clocks : One or more pairs of phandle to clock and clock specifier 37 for the Mali device. The order is important: the first clock 38 shall correspond to the "clk_mali" source, while the second clock 39 (that is optional) shall correspond to the "shadercores" source. 40- clock-names : Shall be set to: "clk_mali", "shadercores". 41- mali-supply : Phandle to the top level regulator for the Mali device. 42 Refer to 43Documentation/devicetree/bindings/regulator/regulator.txt for details. 44- mem-supply : Phandle to memory regulator for the Mali device. This is optional. 45- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/mali-opp.txt 46for details. 47- quirks_gpu : Used to write to the JM_CONFIG or CSF_CONFIG register. 48 Should be used with care. Options passed here are used to override 49 certain default behavior. Note: This will override 'idvs-group-size' 50 field in devicetree and module param 'corestack_driver_control', 51 therefore if 'quirks_gpu' is used then 'idvs-group-size' and 52 'corestack_driver_control' value should be incorporated into 'quirks_gpu'. 53- quirks_sc : Used to write to the SHADER_CONFIG register. 54 Should be used with care. Options passed here are used to override 55 certain default behavior. 56- quirks_tiler : Used to write to the TILER_CONFIG register. 57 Should be used with care. Options passed here are used to 58 disable or override certain default behavior. 59- quirks_mmu : Used to write to the L2_CONFIG register. 60 Should be used with care. Options passed here are used to 61 disable or override certain default behavior. 62- power_model : Sets the power model parameters. Defined power models include: 63 "mali-simple-power-model", "mali-g51-power-model", "mali-g52-power-model", 64 "mali-g52_r1-power-model", "mali-g71-power-model", "mali-g72-power-model", 65 "mali-g76-power-model", "mali-g77-power-model", "mali-tnax-power-model", 66 "mali-tbex-power-model" and "mali-tbax-power-model". 67 - mali-simple-power-model: this model derives the GPU power usage based 68 on the GPU voltage scaled by the system temperature. Note: it was 69 designed for the Juno platform, and may not be suitable for others. 70 - compatible: Should be "arm,mali-simple-power-model" 71 - dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is 72 multiplied by v^2*f to calculate the dynamic power consumption. 73 - static-coefficient: Coefficient, in uW/V^3, which is 74 multiplied by v^3 to calculate the static power consumption. 75 - ts: An array containing coefficients for the temperature 76 scaling factor. This is used to scale the static power by a 77 factor of tsf/1000000, 78 where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0], 79 and T = temperature in degrees. 80 - thermal-zone: A string identifying the thermal zone used for 81 the GPU 82 - temp-poll-interval-ms: the interval at which the system 83 temperature is polled 84 - mali-g*-power-model(s): unless being stated otherwise, these models derive 85 the GPU power usage based on performance counters, so they are more 86 accurate. 87 - compatible: Should be, as examples, "arm,mali-g51-power-model" / 88 "arm,mali-g72-power-model". 89 - scale: the dynamic power calculated by the power model is 90 multiplied by a factor of 'scale'. This value should be 91 chosen to match a particular implementation. 92 - min_sample_cycles: Fall back to the simple power model if the 93 number of GPU cycles for a given counter dump is less than 94 'min_sample_cycles'. The default value of this should suffice. 95 * Note: when IPA is used, two separate power models (simple and counter-based) 96 are used at different points so care should be taken to configure 97 both power models in the device tree (specifically dynamic-coefficient, 98 static-coefficient and scale) to best match the platform. 99- power_policy : Sets the GPU power policy at probe time. Available options are 100 "coarse_demand" and "always_on". If not set, then "coarse_demand" is used. 101- system-coherency : Sets the coherency protocol to be used for coherent 102 accesses made from the GPU. 103 If not set then no coherency is used. 104 - 0 : ACE-Lite 105 - 1 : ACE 106 - 31 : No coherency 107- ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the 108 model is not found in the registered models list. If no model is specified here, 109 a gpu-id based model is picked if available, otherwise the default model is used. 110 - mali-simple-power-model: Default model used on mali 111- idvs-group-size : Override the IDVS group size value. Tasks are sent to 112 cores in groups of N + 1, so i.e. 0xF means 16 tasks. 113 Valid values are between 0 to 0x3F (including). 114- l2-size : Override L2 cache size on GPU that supports it 115- l2-hash : Override L2 hash function on GPU that supports it 116- l2-hash-values : Override L2 hash function using provided hash values, on GPUs that supports it. 117 It is mutually exclusive with 'l2-hash'. Only one or the other must be 118 used in a supported GPU. 119- arbiter_if : Phandle to the arbif platform device, used to provide KBASE with an interface 120 to the Arbiter. This is required when using arbitration; setting to a non-NULL 121 value will enable arbitration. 122 If arbitration is in use, then there should be no external GPU control. 123 When arbiter_if is in use then the following must not be: 124 - power_model (no IPA allowed with arbitration) 125 - #cooling-cells 126 - operating-points-v2 (no dvfs in kbase with arbitration) 127 - system-coherency with a value of 1 (no full coherency with arbitration) 128- int_id_override: list of <ID Setting[7:0]> tuples defining the IDs needed to be 129 set and the setting coresponding to the SYSC_ALLOC register. 130 131 132Example for a Mali GPU with 1 clock and 1 regulator: 133 134gpu@0xfc010000 { 135 compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard"; 136 reg = <0xfc010000 0x4000>; 137 interrupts = <0 36 4>, <0 37 4>, <0 38 4>; 138 interrupt-names = "JOB", "MMU", "GPU"; 139 140 clocks = <&pclk_mali>; 141 clock-names = "clk_mali"; 142 mali-supply = <&vdd_mali>; 143 operating-points-v2 = <&gpu_opp_table>; 144 power_model@0 { 145 compatible = "arm,mali-simple-power-model"; 146 static-coefficient = <2427750>; 147 dynamic-coefficient = <4687>; 148 ts = <20000 2000 (-20) 2>; 149 thermal-zone = "gpu"; 150 }; 151 power_model@1 { 152 compatible = "arm,mali-g71-power-model"; 153 scale = <5>; 154 }; 155 156 idvs-group-size = <0x7>; 157 l2-size = /bits/ 8 <0x10>; 158 l2-hash = /bits/ 8 <0x04>; /* or l2-hash-values = <0x12345678 0x8765 0xAB>; */ 159}; 160 161gpu_opp_table: opp_table0 { 162 compatible = "operating-points-v2"; 163 164 opp@533000000 { 165 opp-hz = /bits/ 64 <533000000>; 166 opp-microvolt = <1250000>; 167 }; 168 opp@450000000 { 169 opp-hz = /bits/ 64 <450000000>; 170 opp-microvolt = <1150000>; 171 }; 172 opp@400000000 { 173 opp-hz = /bits/ 64 <400000000>; 174 opp-microvolt = <1125000>; 175 }; 176 opp@350000000 { 177 opp-hz = /bits/ 64 <350000000>; 178 opp-microvolt = <1075000>; 179 }; 180 opp@266000000 { 181 opp-hz = /bits/ 64 <266000000>; 182 opp-microvolt = <1025000>; 183 }; 184 opp@160000000 { 185 opp-hz = /bits/ 64 <160000000>; 186 opp-microvolt = <925000>; 187 }; 188 opp@100000000 { 189 opp-hz = /bits/ 64 <100000000>; 190 opp-microvolt = <912500>; 191 }; 192}; 193 194Example for a Mali GPU with 2 clocks and 2 regulators: 195 196gpu: gpu@6e000000 { 197 compatible = "arm,mali-midgard"; 198 reg = <0x0 0x6e000000 0x0 0x200000>; 199 interrupts = <0 168 4>, <0 168 4>, <0 168 4>; 200 interrupt-names = "JOB", "MMU", "GPU"; 201 clocks = <&clk_mali 0>, <&clk_mali 1>; 202 clock-names = "clk_mali", "shadercores"; 203 mali-supply = <&supply0_3v3>; 204 mem-supply = <&supply1_3v3>; 205 system-coherency = <31>; 206 operating-points-v2 = <&gpu_opp_table>; 207}; 208 209gpu_opp_table: opp_table0 { 210 compatible = "operating-points-v2", "operating-points-v2-mali"; 211 212 opp@0 { 213 opp-hz = /bits/ 64 <50000000>; 214 opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>; 215 opp-microvolt = <820000>, <800000>; 216 opp-core-mask = /bits/ 64 <0xf>; 217 }; 218 opp@1 { 219 opp-hz = /bits/ 64 <40000000>; 220 opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>; 221 opp-microvolt = <720000>, <700000>; 222 opp-core-mask = /bits/ 64 <0x7>; 223 }; 224 opp@2 { 225 opp-hz = /bits/ 64 <30000000>; 226 opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>; 227 opp-microvolt = <620000>, <700000>; 228 opp-core-mask = /bits/ 64 <0x3>; 229 }; 230}; 231 232Example for a Mali GPU supporting PBHA configuration via DTB (default): 233 234gpu@0xfc010000 { 235 ... 236 pbha { 237 int_id_override = <2 0x32>, <9 0x05>, <16 0x32>; 238 propagate_bits = <0x03>; 239 }; 240 ... 241}; 242