1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale i.MX7ULP System Integration Module 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Anson Huang <anson.huang@nxp.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun The system integration module (SIM) provides system control and chip configuration 14*4882a593Smuzhiyun registers. In this module, chip revision information is located in JTAG ID register, 15*4882a593Smuzhiyun and a set of registers have been made available in DGO domain for SW use, with the 16*4882a593Smuzhiyun objective to maintain its value between system resets. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun items: 21*4882a593Smuzhiyun - const: fsl,imx7ulp-sim 22*4882a593Smuzhiyun - const: syscon 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunrequired: 28*4882a593Smuzhiyun - compatible 29*4882a593Smuzhiyun - reg 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunadditionalProperties: false 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunexamples: 34*4882a593Smuzhiyun - | 35*4882a593Smuzhiyun sim@410a3000 { 36*4882a593Smuzhiyun compatible = "fsl,imx7ulp-sim", "syscon"; 37*4882a593Smuzhiyun reg = <0x410a3000 0x1000>; 38*4882a593Smuzhiyun }; 39