1*4882a593SmuzhiyunSystem Control and Power Interface (SCPI) Message Protocol 2*4882a593Smuzhiyun---------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunFirmware implementing the SCPI described in ARM document number ARM DUI 0922B 5*4882a593Smuzhiyun("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be used 6*4882a593Smuzhiyunby Linux to initiate various system control and power operations. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- compatible : should be 11*4882a593Smuzhiyun * "arm,scpi" : For implementations complying to SCPI v1.0 or above 12*4882a593Smuzhiyun * "arm,scpi-pre-1.0" : For implementations complying to all 13*4882a593Smuzhiyun unversioned releases prior to SCPI v1.0 14*4882a593Smuzhiyun- mboxes: List of phandle and mailbox channel specifiers 15*4882a593Smuzhiyun All the channels reserved by remote SCP firmware for use by 16*4882a593Smuzhiyun SCPI message protocol should be specified in any order 17*4882a593Smuzhiyun- shmem : List of phandle pointing to the shared memory(SHM) area between the 18*4882a593Smuzhiyun processors using these mailboxes for IPC, one for each mailbox 19*4882a593Smuzhiyun SHM can be any memory reserved for the purpose of this communication 20*4882a593Smuzhiyun between the processors. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunSee Documentation/devicetree/bindings/mailbox/mailbox.txt 23*4882a593Smuzhiyunfor more details about the generic mailbox controller and 24*4882a593Smuzhiyunclient driver bindings. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunClock bindings for the clocks based on SCPI Message Protocol 27*4882a593Smuzhiyun------------------------------------------------------------ 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunThis binding uses the common clock binding[1]. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunContainer Node 32*4882a593Smuzhiyun============== 33*4882a593SmuzhiyunRequired properties: 34*4882a593Smuzhiyun- compatible : should be "arm,scpi-clocks" 35*4882a593Smuzhiyun All the clocks provided by SCP firmware via SCPI message 36*4882a593Smuzhiyun protocol much be listed as sub-nodes under this node. 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunSub-nodes 39*4882a593Smuzhiyun========= 40*4882a593SmuzhiyunRequired properties: 41*4882a593Smuzhiyun- compatible : shall include one of the following 42*4882a593Smuzhiyun "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based. 43*4882a593Smuzhiyun These clocks don't provide an entire range of values between the 44*4882a593Smuzhiyun limits but only discrete points within the range. The firmware 45*4882a593Smuzhiyun provides the mapping for each such operating frequency and the 46*4882a593Smuzhiyun index associated with it. The firmware also manages the 47*4882a593Smuzhiyun voltage scaling appropriately with the clock scaling. 48*4882a593Smuzhiyun "arm,scpi-variable-clocks" - all the clocks that are variable and provide full 49*4882a593Smuzhiyun range within the specified range. The firmware provides the 50*4882a593Smuzhiyun range of values within a specified range. 51*4882a593Smuzhiyun 52*4882a593SmuzhiyunOther required properties for all clocks(all from common clock binding): 53*4882a593Smuzhiyun- #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands. 54*4882a593Smuzhiyun- clock-output-names : shall be the corresponding names of the outputs. 55*4882a593Smuzhiyun- clock-indices: The identifying number for the clocks(i.e.clock_id) in the 56*4882a593Smuzhiyun node. It can be non linear and hence provide the mapping of identifiers 57*4882a593Smuzhiyun into the clock-output-names array. 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunSRAM and Shared Memory for SCPI 60*4882a593Smuzhiyun------------------------------- 61*4882a593Smuzhiyun 62*4882a593SmuzhiyunA small area of SRAM is reserved for SCPI communication between application 63*4882a593Smuzhiyunprocessors and SCP. 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunThe properties should follow the generic mmio-sram description found in [3] 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunEach sub-node represents the reserved area for SCPI. 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunRequired sub-node properties: 70*4882a593Smuzhiyun- reg : The base offset and size of the reserved area with the SRAM 71*4882a593Smuzhiyun- compatible : should be "arm,scp-shmem" for Non-secure SRAM based 72*4882a593Smuzhiyun shared memory 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunSensor bindings for the sensors based on SCPI Message Protocol 75*4882a593Smuzhiyun-------------------------------------------------------------- 76*4882a593SmuzhiyunSCPI provides an API to access the various sensors on the SoC. 77*4882a593Smuzhiyun 78*4882a593SmuzhiyunRequired properties: 79*4882a593Smuzhiyun- compatible : should be "arm,scpi-sensors". 80*4882a593Smuzhiyun- #thermal-sensor-cells: should be set to 1. This property follows the 81*4882a593Smuzhiyun thermal device tree bindings[2]. 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun Valid cell values are raw identifiers (Sensor ID) 84*4882a593Smuzhiyun as used by the firmware. Refer to platform details 85*4882a593Smuzhiyun for your implementation for the IDs to use. 86*4882a593Smuzhiyun 87*4882a593SmuzhiyunPower domain bindings for the power domains based on SCPI Message Protocol 88*4882a593Smuzhiyun------------------------------------------------------------ 89*4882a593Smuzhiyun 90*4882a593SmuzhiyunThis binding uses the generic power domain binding[4]. 91*4882a593Smuzhiyun 92*4882a593SmuzhiyunPM domain providers 93*4882a593Smuzhiyun=================== 94*4882a593Smuzhiyun 95*4882a593SmuzhiyunRequired properties: 96*4882a593Smuzhiyun - #power-domain-cells : Should be 1. Contains the device or the power 97*4882a593Smuzhiyun domain ID value used by SCPI commands. 98*4882a593Smuzhiyun - num-domains: Total number of power domains provided by SCPI. This is 99*4882a593Smuzhiyun needed as the SCPI message protocol lacks a mechanism to 100*4882a593Smuzhiyun query this information at runtime. 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunPM domain consumers 103*4882a593Smuzhiyun=================== 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunRequired properties: 106*4882a593Smuzhiyun - power-domains : A phandle and PM domain specifier as defined by bindings of 107*4882a593Smuzhiyun the power controller specified by phandle. 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html 110*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 111*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/thermal/thermal*.yaml 112*4882a593Smuzhiyun[3] Documentation/devicetree/bindings/sram/sram.yaml 113*4882a593Smuzhiyun[4] Documentation/devicetree/bindings/power/power-domain.yaml 114*4882a593Smuzhiyun 115*4882a593SmuzhiyunExample: 116*4882a593Smuzhiyun 117*4882a593Smuzhiyunsram: sram@50000000 { 118*4882a593Smuzhiyun compatible = "arm,juno-sram-ns", "mmio-sram"; 119*4882a593Smuzhiyun reg = <0x0 0x50000000 0x0 0x10000>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #address-cells = <1>; 122*4882a593Smuzhiyun #size-cells = <1>; 123*4882a593Smuzhiyun ranges = <0 0x0 0x50000000 0x10000>; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun cpu_scp_lpri: scp-shmem@0 { 126*4882a593Smuzhiyun compatible = "arm,juno-scp-shmem"; 127*4882a593Smuzhiyun reg = <0x0 0x200>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun cpu_scp_hpri: scp-shmem@200 { 131*4882a593Smuzhiyun compatible = "arm,juno-scp-shmem"; 132*4882a593Smuzhiyun reg = <0x200 0x200>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyunmailbox: mailbox0@40000000 { 137*4882a593Smuzhiyun .... 138*4882a593Smuzhiyun #mbox-cells = <1>; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyunscpi_protocol: scpi@2e000000 { 142*4882a593Smuzhiyun compatible = "arm,scpi"; 143*4882a593Smuzhiyun mboxes = <&mailbox 0 &mailbox 1>; 144*4882a593Smuzhiyun shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun clocks { 147*4882a593Smuzhiyun compatible = "arm,scpi-clocks"; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun scpi_dvfs: scpi_clocks@0 { 150*4882a593Smuzhiyun compatible = "arm,scpi-dvfs-clocks"; 151*4882a593Smuzhiyun #clock-cells = <1>; 152*4882a593Smuzhiyun clock-indices = <0>, <1>, <2>; 153*4882a593Smuzhiyun clock-output-names = "atlclk", "aplclk","gpuclk"; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun scpi_clk: scpi_clocks@3 { 156*4882a593Smuzhiyun compatible = "arm,scpi-variable-clocks"; 157*4882a593Smuzhiyun #clock-cells = <1>; 158*4882a593Smuzhiyun clock-indices = <3>, <4>; 159*4882a593Smuzhiyun clock-output-names = "pxlclk0", "pxlclk1"; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun scpi_sensors0: sensors { 164*4882a593Smuzhiyun compatible = "arm,scpi-sensors"; 165*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun scpi_devpd: scpi-power-domains { 169*4882a593Smuzhiyun compatible = "arm,scpi-power-domains"; 170*4882a593Smuzhiyun num-domains = <2>; 171*4882a593Smuzhiyun #power-domain-cells = <1>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun}; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyuncpu@0 { 176*4882a593Smuzhiyun ... 177*4882a593Smuzhiyun reg = <0 0>; 178*4882a593Smuzhiyun clocks = <&scpi_dvfs 0>; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyunhdlcd@7ff60000 { 182*4882a593Smuzhiyun ... 183*4882a593Smuzhiyun reg = <0 0x7ff60000 0 0x1000>; 184*4882a593Smuzhiyun clocks = <&scpi_clk 4>; 185*4882a593Smuzhiyun power-domains = <&scpi_devpd 1>; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyunthermal-zones { 189*4882a593Smuzhiyun soc_thermal { 190*4882a593Smuzhiyun polling-delay-passive = <100>; 191*4882a593Smuzhiyun polling-delay = <1000>; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* sensor ID */ 194*4882a593Smuzhiyun thermal-sensors = <&scpi_sensors0 3>; 195*4882a593Smuzhiyun ... 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593SmuzhiyunIn the above example, the #clock-cells is set to 1 as required. 200*4882a593Smuzhiyunscpi_dvfs has 3 output clocks namely: atlclk, aplclk, and gpuclk with 0, 201*4882a593Smuzhiyun1 and 2 as clock-indices. scpi_clk has 2 output clocks namely: pxlclk0 202*4882a593Smuzhiyunand pxlclk1 with 3 and 4 as clock-indices. 203*4882a593Smuzhiyun 204*4882a593SmuzhiyunThe first consumer in the example is cpu@0 and it has '0' as the clock 205*4882a593Smuzhiyunspecifier which points to the first entry in the output clocks of 206*4882a593Smuzhiyunscpi_dvfs i.e. "atlclk". 207*4882a593Smuzhiyun 208*4882a593SmuzhiyunSimilarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input 209*4882a593Smuzhiyunclock. '4' in the clock specifier here points to the second entry 210*4882a593Smuzhiyunin the output clocks of scpi_clocks i.e. "pxlclk1" 211*4882a593Smuzhiyun 212*4882a593SmuzhiyunThe thermal-sensors property in the soc_thermal node uses the 213*4882a593Smuzhiyuntemperature sensor provided by SCP firmware to setup a thermal 214*4882a593Smuzhiyunzone. The ID "3" is the sensor identifier for the temperature sensor 215*4882a593Smuzhiyunas used by the firmware. 216*4882a593Smuzhiyun 217*4882a593SmuzhiyunThe num-domains property in scpi-power-domains domain specifies that 218*4882a593SmuzhiyunSCPI provides 2 power domains. The hdlcd node uses the power domain with 219*4882a593Smuzhiyundomain ID 1. 220