xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/arm,scmi.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunSystem Control and Management Interface (SCMI) Message Protocol
2*4882a593Smuzhiyun----------------------------------------------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe SCMI is intended to allow agents such as OSPM to manage various functions
5*4882a593Smuzhiyunthat are provided by the hardware platform it is running on, including power
6*4882a593Smuzhiyunand performance functions.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunThis binding is intended to define the interface the firmware implementing
9*4882a593Smuzhiyunthe SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control
10*4882a593Smuzhiyunand Management Interface Platform Design Document")[0] provide for OSPM in
11*4882a593Smuzhiyunthe device tree.
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunRequired properties:
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunThe scmi node with the following properties shall be under the /firmware/ node.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18*4882a593Smuzhiyun- mboxes: List of phandle and mailbox channel specifiers. It should contain
19*4882a593Smuzhiyun	  exactly one or two mailboxes, one for transmitting messages("tx")
20*4882a593Smuzhiyun	  and another optional for receiving the notifications("rx") if
21*4882a593Smuzhiyun	  supported.
22*4882a593Smuzhiyun- shmem : List of phandle pointing to the shared memory(SHM) area as per
23*4882a593Smuzhiyun	  generic mailbox client binding.
24*4882a593Smuzhiyun- #address-cells : should be '1' if the device has sub-nodes, maps to
25*4882a593Smuzhiyun	  protocol identifier for a given sub-node.
26*4882a593Smuzhiyun- #size-cells : should be '0' as 'reg' property doesn't have any size
27*4882a593Smuzhiyun	  associated with it.
28*4882a593Smuzhiyun- arm,smc-id : SMC id required when using smc or hvc transports
29*4882a593Smuzhiyun
30*4882a593SmuzhiyunOptional properties:
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun- mbox-names: shall be "tx" or "rx" depending on mboxes entries.
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun- interrupts : when using smc or hvc transports, this optional
35*4882a593Smuzhiyun	 property indicates that msg completion by the platform is indicated
36*4882a593Smuzhiyun	 by an interrupt rather than by the return of the smc call. This
37*4882a593Smuzhiyun	 should not be used except when the platform requires such behavior.
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun- interrupt-names : if "interrupts" is present, interrupt-names must also
40*4882a593Smuzhiyun	 be present and have the value "a2p".
41*4882a593Smuzhiyun
42*4882a593SmuzhiyunSee Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
43*4882a593Smuzhiyunabout the generic mailbox controller and client driver bindings.
44*4882a593Smuzhiyun
45*4882a593SmuzhiyunThe mailbox is the only permitted method of calling the SCMI firmware.
46*4882a593SmuzhiyunMailbox doorbell is used as a mechanism to alert the presence of a
47*4882a593Smuzhiyunmessages and/or notification.
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunEach protocol supported shall have a sub-node with corresponding compatible
50*4882a593Smuzhiyunas described in the following sections. If the platform supports dedicated
51*4882a593Smuzhiyuncommunication channel for a particular protocol, the 3 properties namely:
52*4882a593Smuzhiyunmboxes, mbox-names and shmem shall be present in the sub-node corresponding
53*4882a593Smuzhiyunto that protocol.
54*4882a593Smuzhiyun
55*4882a593SmuzhiyunClock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol
56*4882a593Smuzhiyun------------------------------------------------------------
57*4882a593Smuzhiyun
58*4882a593SmuzhiyunThis binding uses the common clock binding[1].
59*4882a593Smuzhiyun
60*4882a593SmuzhiyunRequired properties:
61*4882a593Smuzhiyun- #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
62*4882a593Smuzhiyun
63*4882a593SmuzhiyunPower domain bindings for the power domains based on SCMI Message Protocol
64*4882a593Smuzhiyun------------------------------------------------------------
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunThis binding for the SCMI power domain providers uses the generic power
67*4882a593Smuzhiyundomain binding[2].
68*4882a593Smuzhiyun
69*4882a593SmuzhiyunRequired properties:
70*4882a593Smuzhiyun - #power-domain-cells : Should be 1. Contains the device or the power
71*4882a593Smuzhiyun			 domain ID value used by SCMI commands.
72*4882a593Smuzhiyun
73*4882a593SmuzhiyunRegulator bindings for the SCMI Regulator based on SCMI Message Protocol
74*4882a593Smuzhiyun------------------------------------------------------------
75*4882a593SmuzhiyunAn SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain,
76*4882a593Smuzhiyunand should be always positioned as a root regulator.
77*4882a593SmuzhiyunIt does not support any current operation.
78*4882a593Smuzhiyun
79*4882a593SmuzhiyunSCMI Regulators are grouped under a 'regulators' node which in turn is a child
80*4882a593Smuzhiyunof the SCMI Voltage protocol node inside the desired SCMI instance node.
81*4882a593Smuzhiyun
82*4882a593SmuzhiyunThis binding uses the common regulator binding[6].
83*4882a593Smuzhiyun
84*4882a593SmuzhiyunRequired properties:
85*4882a593Smuzhiyun - reg : shall identify an existent SCMI Voltage Domain.
86*4882a593Smuzhiyun
87*4882a593SmuzhiyunSensor bindings for the sensors based on SCMI Message Protocol
88*4882a593Smuzhiyun--------------------------------------------------------------
89*4882a593SmuzhiyunSCMI provides an API to access the various sensors on the SoC.
90*4882a593Smuzhiyun
91*4882a593SmuzhiyunRequired properties:
92*4882a593Smuzhiyun- #thermal-sensor-cells: should be set to 1. This property follows the
93*4882a593Smuzhiyun			 thermal device tree bindings[3].
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun			 Valid cell values are raw identifiers (Sensor ID)
96*4882a593Smuzhiyun			 as used by the firmware. Refer to  platform details
97*4882a593Smuzhiyun			 for your implementation for the IDs to use.
98*4882a593Smuzhiyun
99*4882a593SmuzhiyunReset signal bindings for the reset domains based on SCMI Message Protocol
100*4882a593Smuzhiyun------------------------------------------------------------
101*4882a593Smuzhiyun
102*4882a593SmuzhiyunThis binding for the SCMI reset domain providers uses the generic reset
103*4882a593Smuzhiyunsignal binding[5].
104*4882a593Smuzhiyun
105*4882a593SmuzhiyunRequired properties:
106*4882a593Smuzhiyun - #reset-cells : Should be 1. Contains the reset domain ID value used
107*4882a593Smuzhiyun		  by SCMI commands.
108*4882a593Smuzhiyun
109*4882a593SmuzhiyunSRAM and Shared Memory for SCMI
110*4882a593Smuzhiyun-------------------------------
111*4882a593Smuzhiyun
112*4882a593SmuzhiyunA small area of SRAM is reserved for SCMI communication between application
113*4882a593Smuzhiyunprocessors and SCP.
114*4882a593Smuzhiyun
115*4882a593SmuzhiyunThe properties should follow the generic mmio-sram description found in [4]
116*4882a593Smuzhiyun
117*4882a593SmuzhiyunEach sub-node represents the reserved area for SCMI.
118*4882a593Smuzhiyun
119*4882a593SmuzhiyunRequired sub-node properties:
120*4882a593Smuzhiyun- reg : The base offset and size of the reserved area with the SRAM
121*4882a593Smuzhiyun- compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
122*4882a593Smuzhiyun	       shared memory
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun[0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html
125*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
126*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/power/power-domain.yaml
127*4882a593Smuzhiyun[3] Documentation/devicetree/bindings/thermal/thermal*.yaml
128*4882a593Smuzhiyun[4] Documentation/devicetree/bindings/sram/sram.yaml
129*4882a593Smuzhiyun[5] Documentation/devicetree/bindings/reset/reset.txt
130*4882a593Smuzhiyun[6] Documentation/devicetree/bindings/regulator/regulator.yaml
131*4882a593Smuzhiyun
132*4882a593SmuzhiyunExample:
133*4882a593Smuzhiyun
134*4882a593Smuzhiyunsram@50000000 {
135*4882a593Smuzhiyun	compatible = "mmio-sram";
136*4882a593Smuzhiyun	reg = <0x0 0x50000000 0x0 0x10000>;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun	#address-cells = <1>;
139*4882a593Smuzhiyun	#size-cells = <1>;
140*4882a593Smuzhiyun	ranges = <0 0x0 0x50000000 0x10000>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun	cpu_scp_lpri: scp-shmem@0 {
143*4882a593Smuzhiyun		compatible = "arm,scmi-shmem";
144*4882a593Smuzhiyun		reg = <0x0 0x200>;
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun	cpu_scp_hpri: scp-shmem@200 {
148*4882a593Smuzhiyun		compatible = "arm,scmi-shmem";
149*4882a593Smuzhiyun		reg = <0x200 0x200>;
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyunmailbox@40000000 {
154*4882a593Smuzhiyun	....
155*4882a593Smuzhiyun	#mbox-cells = <1>;
156*4882a593Smuzhiyun	reg = <0x0 0x40000000 0x0 0x10000>;
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyunfirmware {
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	...
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun	scmi {
164*4882a593Smuzhiyun		compatible = "arm,scmi";
165*4882a593Smuzhiyun		mboxes = <&mailbox 0 &mailbox 1>;
166*4882a593Smuzhiyun		mbox-names = "tx", "rx";
167*4882a593Smuzhiyun		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
168*4882a593Smuzhiyun		#address-cells = <1>;
169*4882a593Smuzhiyun		#size-cells = <0>;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun		scmi_devpd: protocol@11 {
172*4882a593Smuzhiyun			reg = <0x11>;
173*4882a593Smuzhiyun			#power-domain-cells = <1>;
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		scmi_dvfs: protocol@13 {
177*4882a593Smuzhiyun			reg = <0x13>;
178*4882a593Smuzhiyun			#clock-cells = <1>;
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		scmi_clk: protocol@14 {
182*4882a593Smuzhiyun			reg = <0x14>;
183*4882a593Smuzhiyun			#clock-cells = <1>;
184*4882a593Smuzhiyun		};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun		scmi_sensors0: protocol@15 {
187*4882a593Smuzhiyun			reg = <0x15>;
188*4882a593Smuzhiyun			#thermal-sensor-cells = <1>;
189*4882a593Smuzhiyun		};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun		scmi_reset: protocol@16 {
192*4882a593Smuzhiyun			reg = <0x16>;
193*4882a593Smuzhiyun			#reset-cells = <1>;
194*4882a593Smuzhiyun		};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun		scmi_voltage: protocol@17 {
197*4882a593Smuzhiyun			reg = <0x17>;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun			regulators {
200*4882a593Smuzhiyun				regulator_devX: regulator@0 {
201*4882a593Smuzhiyun					reg = <0x0>;
202*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
203*4882a593Smuzhiyun				};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun				regulator_devY: regulator@9 {
206*4882a593Smuzhiyun					reg = <0x9>;
207*4882a593Smuzhiyun					regulator-min-microvolt = <500000>;
208*4882a593Smuzhiyun					regulator-max-microvolt = <4200000>;
209*4882a593Smuzhiyun				};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun				...
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun		};
214*4882a593Smuzhiyun	};
215*4882a593Smuzhiyun};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyuncpu@0 {
218*4882a593Smuzhiyun	...
219*4882a593Smuzhiyun	reg = <0 0>;
220*4882a593Smuzhiyun	clocks = <&scmi_dvfs 0>;
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyunhdlcd@7ff60000 {
224*4882a593Smuzhiyun	...
225*4882a593Smuzhiyun	reg = <0 0x7ff60000 0 0x1000>;
226*4882a593Smuzhiyun	clocks = <&scmi_clk 4>;
227*4882a593Smuzhiyun	power-domains = <&scmi_devpd 1>;
228*4882a593Smuzhiyun	resets = <&scmi_reset 10>;
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyunthermal-zones {
232*4882a593Smuzhiyun	soc_thermal {
233*4882a593Smuzhiyun		polling-delay-passive = <100>;
234*4882a593Smuzhiyun		polling-delay = <1000>;
235*4882a593Smuzhiyun					/* sensor ID */
236*4882a593Smuzhiyun		thermal-sensors = <&scmi_sensors0 3>;
237*4882a593Smuzhiyun		...
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun};
240