1*4882a593Smuzhiyun* ARC Performance Counters 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe ARC700 can be configured with a pipeline performance monitor for counting 4*4882a593SmuzhiyunCPU and cache events like cache misses and hits. Like conventional PCT there 5*4882a593Smuzhiyunare 100+ hardware conditions dynamically mapped to up to 32 counters 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunNote that: 8*4882a593Smuzhiyun * The ARC 700 PCT does not support interrupts; although HW events may be 9*4882a593Smuzhiyun counted, the HW events themselves cannot serve as a trigger for a sample. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties: 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- compatible : should contain 14*4882a593Smuzhiyun "snps,arc700-pct" 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunpmu { 19*4882a593Smuzhiyun compatible = "snps,arc700-pct"; 20*4882a593Smuzhiyun}; 21