1*4882a593Smuzhiyun* ARC HS Performance Counters 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe ARC HS can be configured with a pipeline performance monitor for counting 4*4882a593SmuzhiyunCPU and cache events like cache misses and hits. Like conventional PCT there 5*4882a593Smuzhiyunare 100+ hardware conditions dynamically mapped to up to 32 counters. 6*4882a593SmuzhiyunIt also supports overflow interrupts. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- compatible : should contain 11*4882a593Smuzhiyun "snps,archs-pct" 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunpmu { 16*4882a593Smuzhiyun compatible = "snps,archs-pct"; 17*4882a593Smuzhiyun}; 18