1*4882a593Smuzhiyun.. include:: <isonum.txt> 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun========================== 4*4882a593SmuzhiyunLinux generic IRQ handling 5*4882a593Smuzhiyun========================== 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun:Copyright: |copy| 2005-2010: Thomas Gleixner 8*4882a593Smuzhiyun:Copyright: |copy| 2005-2006: Ingo Molnar 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunIntroduction 11*4882a593Smuzhiyun============ 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunThe generic interrupt handling layer is designed to provide a complete 14*4882a593Smuzhiyunabstraction of interrupt handling for device drivers. It is able to 15*4882a593Smuzhiyunhandle all the different types of interrupt controller hardware. Device 16*4882a593Smuzhiyundrivers use generic API functions to request, enable, disable and free 17*4882a593Smuzhiyuninterrupts. The drivers do not have to know anything about interrupt 18*4882a593Smuzhiyunhardware details, so they can be used on different platforms without 19*4882a593Smuzhiyuncode changes. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunThis documentation is provided to developers who want to implement an 22*4882a593Smuzhiyuninterrupt subsystem based for their architecture, with the help of the 23*4882a593Smuzhiyungeneric IRQ handling layer. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunRationale 26*4882a593Smuzhiyun========= 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunThe original implementation of interrupt handling in Linux uses the 29*4882a593Smuzhiyun__do_IRQ() super-handler, which is able to deal with every type of 30*4882a593Smuzhiyuninterrupt logic. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunOriginally, Russell King identified different types of handlers to build 33*4882a593Smuzhiyuna quite universal set for the ARM interrupt handler implementation in 34*4882a593SmuzhiyunLinux 2.5/2.6. He distinguished between: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun- Level type 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun- Edge type 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun- Simple type 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunDuring the implementation we identified another type: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun- Fast EOI type 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunIn the SMP world of the __do_IRQ() super-handler another type was 47*4882a593Smuzhiyunidentified: 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun- Per CPU type 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunThis split implementation of high-level IRQ handlers allows us to 52*4882a593Smuzhiyunoptimize the flow of the interrupt handling for each specific interrupt 53*4882a593Smuzhiyuntype. This reduces complexity in that particular code path and allows 54*4882a593Smuzhiyunthe optimized handling of a given type. 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunThe original general IRQ implementation used hw_interrupt_type 57*4882a593Smuzhiyunstructures and their ``->ack``, ``->end`` [etc.] callbacks to differentiate 58*4882a593Smuzhiyunthe flow control in the super-handler. This leads to a mix of flow logic 59*4882a593Smuzhiyunand low-level hardware logic, and it also leads to unnecessary code 60*4882a593Smuzhiyunduplication: for example in i386, there is an ``ioapic_level_irq`` and an 61*4882a593Smuzhiyun``ioapic_edge_irq`` IRQ-type which share many of the low-level details but 62*4882a593Smuzhiyunhave different flow handling. 63*4882a593Smuzhiyun 64*4882a593SmuzhiyunA more natural abstraction is the clean separation of the 'irq flow' and 65*4882a593Smuzhiyunthe 'chip details'. 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunAnalysing a couple of architecture's IRQ subsystem implementations 68*4882a593Smuzhiyunreveals that most of them can use a generic set of 'irq flow' methods 69*4882a593Smuzhiyunand only need to add the chip-level specific code. The separation is 70*4882a593Smuzhiyunalso valuable for (sub)architectures which need specific quirks in the 71*4882a593SmuzhiyunIRQ flow itself but not in the chip details - and thus provides a more 72*4882a593Smuzhiyuntransparent IRQ subsystem design. 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunEach interrupt descriptor is assigned its own high-level flow handler, 75*4882a593Smuzhiyunwhich is normally one of the generic implementations. (This high-level 76*4882a593Smuzhiyunflow handler implementation also makes it simple to provide 77*4882a593Smuzhiyundemultiplexing handlers which can be found in embedded platforms on 78*4882a593Smuzhiyunvarious architectures.) 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunThe separation makes the generic interrupt handling layer more flexible 81*4882a593Smuzhiyunand extensible. For example, an (sub)architecture can use a generic 82*4882a593SmuzhiyunIRQ-flow implementation for 'level type' interrupts and add a 83*4882a593Smuzhiyun(sub)architecture specific 'edge type' implementation. 84*4882a593Smuzhiyun 85*4882a593SmuzhiyunTo make the transition to the new model easier and prevent the breakage 86*4882a593Smuzhiyunof existing implementations, the __do_IRQ() super-handler is still 87*4882a593Smuzhiyunavailable. This leads to a kind of duality for the time being. Over time 88*4882a593Smuzhiyunthe new model should be used in more and more architectures, as it 89*4882a593Smuzhiyunenables smaller and cleaner IRQ subsystems. It's deprecated for three 90*4882a593Smuzhiyunyears now and about to be removed. 91*4882a593Smuzhiyun 92*4882a593SmuzhiyunKnown Bugs And Assumptions 93*4882a593Smuzhiyun========================== 94*4882a593Smuzhiyun 95*4882a593SmuzhiyunNone (knock on wood). 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunAbstraction layers 98*4882a593Smuzhiyun================== 99*4882a593Smuzhiyun 100*4882a593SmuzhiyunThere are three main levels of abstraction in the interrupt code: 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun1. High-level driver API 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun2. High-level IRQ flow handlers 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun3. Chip-level hardware encapsulation 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunInterrupt control flow 109*4882a593Smuzhiyun---------------------- 110*4882a593Smuzhiyun 111*4882a593SmuzhiyunEach interrupt is described by an interrupt descriptor structure 112*4882a593Smuzhiyunirq_desc. The interrupt is referenced by an 'unsigned int' numeric 113*4882a593Smuzhiyunvalue which selects the corresponding interrupt description structure in 114*4882a593Smuzhiyunthe descriptor structures array. The descriptor structure contains 115*4882a593Smuzhiyunstatus information and pointers to the interrupt flow method and the 116*4882a593Smuzhiyuninterrupt chip structure which are assigned to this interrupt. 117*4882a593Smuzhiyun 118*4882a593SmuzhiyunWhenever an interrupt triggers, the low-level architecture code calls 119*4882a593Smuzhiyuninto the generic interrupt code by calling desc->handle_irq(). This 120*4882a593Smuzhiyunhigh-level IRQ handling function only uses desc->irq_data.chip 121*4882a593Smuzhiyunprimitives referenced by the assigned chip descriptor structure. 122*4882a593Smuzhiyun 123*4882a593SmuzhiyunHigh-level Driver API 124*4882a593Smuzhiyun--------------------- 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunThe high-level Driver API consists of following functions: 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun- request_irq() 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun- request_threaded_irq() 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun- free_irq() 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun- disable_irq() 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun- enable_irq() 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun- disable_irq_nosync() (SMP only) 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun- synchronize_irq() (SMP only) 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun- irq_set_irq_type() 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun- irq_set_irq_wake() 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun- irq_set_handler_data() 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun- irq_set_chip() 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun- irq_set_chip_data() 151*4882a593Smuzhiyun 152*4882a593SmuzhiyunSee the autogenerated function documentation for details. 153*4882a593Smuzhiyun 154*4882a593SmuzhiyunHigh-level IRQ flow handlers 155*4882a593Smuzhiyun---------------------------- 156*4882a593Smuzhiyun 157*4882a593SmuzhiyunThe generic layer provides a set of pre-defined irq-flow methods: 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun- handle_level_irq() 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun- handle_edge_irq() 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun- handle_fasteoi_irq() 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun- handle_simple_irq() 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun- handle_percpu_irq() 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun- handle_edge_eoi_irq() 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun- handle_bad_irq() 172*4882a593Smuzhiyun 173*4882a593SmuzhiyunThe interrupt flow handlers (either pre-defined or architecture 174*4882a593Smuzhiyunspecific) are assigned to specific interrupts by the architecture either 175*4882a593Smuzhiyunduring bootup or during device initialization. 176*4882a593Smuzhiyun 177*4882a593SmuzhiyunDefault flow implementations 178*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 179*4882a593Smuzhiyun 180*4882a593SmuzhiyunHelper functions 181*4882a593Smuzhiyun^^^^^^^^^^^^^^^^ 182*4882a593Smuzhiyun 183*4882a593SmuzhiyunThe helper functions call the chip primitives and are used by the 184*4882a593Smuzhiyundefault flow implementations. The following helper functions are 185*4882a593Smuzhiyunimplemented (simplified excerpt):: 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun default_enable(struct irq_data *data) 188*4882a593Smuzhiyun { 189*4882a593Smuzhiyun desc->irq_data.chip->irq_unmask(data); 190*4882a593Smuzhiyun } 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun default_disable(struct irq_data *data) 193*4882a593Smuzhiyun { 194*4882a593Smuzhiyun if (!delay_disable(data)) 195*4882a593Smuzhiyun desc->irq_data.chip->irq_mask(data); 196*4882a593Smuzhiyun } 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun default_ack(struct irq_data *data) 199*4882a593Smuzhiyun { 200*4882a593Smuzhiyun chip->irq_ack(data); 201*4882a593Smuzhiyun } 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun default_mask_ack(struct irq_data *data) 204*4882a593Smuzhiyun { 205*4882a593Smuzhiyun if (chip->irq_mask_ack) { 206*4882a593Smuzhiyun chip->irq_mask_ack(data); 207*4882a593Smuzhiyun } else { 208*4882a593Smuzhiyun chip->irq_mask(data); 209*4882a593Smuzhiyun chip->irq_ack(data); 210*4882a593Smuzhiyun } 211*4882a593Smuzhiyun } 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun noop(struct irq_data *data)) 214*4882a593Smuzhiyun { 215*4882a593Smuzhiyun } 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun 219*4882a593SmuzhiyunDefault flow handler implementations 220*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 221*4882a593Smuzhiyun 222*4882a593SmuzhiyunDefault Level IRQ flow handler 223*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 224*4882a593Smuzhiyun 225*4882a593Smuzhiyunhandle_level_irq provides a generic implementation for level-triggered 226*4882a593Smuzhiyuninterrupts. 227*4882a593Smuzhiyun 228*4882a593SmuzhiyunThe following control flow is implemented (simplified excerpt):: 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun desc->irq_data.chip->irq_mask_ack(); 231*4882a593Smuzhiyun handle_irq_event(desc->action); 232*4882a593Smuzhiyun desc->irq_data.chip->irq_unmask(); 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun 235*4882a593SmuzhiyunDefault Fast EOI IRQ flow handler 236*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 237*4882a593Smuzhiyun 238*4882a593Smuzhiyunhandle_fasteoi_irq provides a generic implementation for interrupts, 239*4882a593Smuzhiyunwhich only need an EOI at the end of the handler. 240*4882a593Smuzhiyun 241*4882a593SmuzhiyunThe following control flow is implemented (simplified excerpt):: 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun handle_irq_event(desc->action); 244*4882a593Smuzhiyun desc->irq_data.chip->irq_eoi(); 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun 247*4882a593SmuzhiyunDefault Edge IRQ flow handler 248*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 249*4882a593Smuzhiyun 250*4882a593Smuzhiyunhandle_edge_irq provides a generic implementation for edge-triggered 251*4882a593Smuzhiyuninterrupts. 252*4882a593Smuzhiyun 253*4882a593SmuzhiyunThe following control flow is implemented (simplified excerpt):: 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun if (desc->status & running) { 256*4882a593Smuzhiyun desc->irq_data.chip->irq_mask_ack(); 257*4882a593Smuzhiyun desc->status |= pending | masked; 258*4882a593Smuzhiyun return; 259*4882a593Smuzhiyun } 260*4882a593Smuzhiyun desc->irq_data.chip->irq_ack(); 261*4882a593Smuzhiyun desc->status |= running; 262*4882a593Smuzhiyun do { 263*4882a593Smuzhiyun if (desc->status & masked) 264*4882a593Smuzhiyun desc->irq_data.chip->irq_unmask(); 265*4882a593Smuzhiyun desc->status &= ~pending; 266*4882a593Smuzhiyun handle_irq_event(desc->action); 267*4882a593Smuzhiyun } while (status & pending); 268*4882a593Smuzhiyun desc->status &= ~running; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun 271*4882a593SmuzhiyunDefault simple IRQ flow handler 272*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 273*4882a593Smuzhiyun 274*4882a593Smuzhiyunhandle_simple_irq provides a generic implementation for simple 275*4882a593Smuzhiyuninterrupts. 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun.. note:: 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun The simple flow handler does not call any handler/chip primitives. 280*4882a593Smuzhiyun 281*4882a593SmuzhiyunThe following control flow is implemented (simplified excerpt):: 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun handle_irq_event(desc->action); 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun 286*4882a593SmuzhiyunDefault per CPU flow handler 287*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 288*4882a593Smuzhiyun 289*4882a593Smuzhiyunhandle_percpu_irq provides a generic implementation for per CPU 290*4882a593Smuzhiyuninterrupts. 291*4882a593Smuzhiyun 292*4882a593SmuzhiyunPer CPU interrupts are only available on SMP and the handler provides a 293*4882a593Smuzhiyunsimplified version without locking. 294*4882a593Smuzhiyun 295*4882a593SmuzhiyunThe following control flow is implemented (simplified excerpt):: 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun if (desc->irq_data.chip->irq_ack) 298*4882a593Smuzhiyun desc->irq_data.chip->irq_ack(); 299*4882a593Smuzhiyun handle_irq_event(desc->action); 300*4882a593Smuzhiyun if (desc->irq_data.chip->irq_eoi) 301*4882a593Smuzhiyun desc->irq_data.chip->irq_eoi(); 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun 304*4882a593SmuzhiyunEOI Edge IRQ flow handler 305*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^^^^^^ 306*4882a593Smuzhiyun 307*4882a593Smuzhiyunhandle_edge_eoi_irq provides an abnomination of the edge handler 308*4882a593Smuzhiyunwhich is solely used to tame a badly wreckaged irq controller on 309*4882a593Smuzhiyunpowerpc/cell. 310*4882a593Smuzhiyun 311*4882a593SmuzhiyunBad IRQ flow handler 312*4882a593Smuzhiyun^^^^^^^^^^^^^^^^^^^^ 313*4882a593Smuzhiyun 314*4882a593Smuzhiyunhandle_bad_irq is used for spurious interrupts which have no real 315*4882a593Smuzhiyunhandler assigned.. 316*4882a593Smuzhiyun 317*4882a593SmuzhiyunQuirks and optimizations 318*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~ 319*4882a593Smuzhiyun 320*4882a593SmuzhiyunThe generic functions are intended for 'clean' architectures and chips, 321*4882a593Smuzhiyunwhich have no platform-specific IRQ handling quirks. If an architecture 322*4882a593Smuzhiyunneeds to implement quirks on the 'flow' level then it can do so by 323*4882a593Smuzhiyunoverriding the high-level irq-flow handler. 324*4882a593Smuzhiyun 325*4882a593SmuzhiyunDelayed interrupt disable 326*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~ 327*4882a593Smuzhiyun 328*4882a593SmuzhiyunThis per interrupt selectable feature, which was introduced by Russell 329*4882a593SmuzhiyunKing in the ARM interrupt implementation, does not mask an interrupt at 330*4882a593Smuzhiyunthe hardware level when disable_irq() is called. The interrupt is kept 331*4882a593Smuzhiyunenabled and is masked in the flow handler when an interrupt event 332*4882a593Smuzhiyunhappens. This prevents losing edge interrupts on hardware which does not 333*4882a593Smuzhiyunstore an edge interrupt event while the interrupt is disabled at the 334*4882a593Smuzhiyunhardware level. When an interrupt arrives while the IRQ_DISABLED flag 335*4882a593Smuzhiyunis set, then the interrupt is masked at the hardware level and the 336*4882a593SmuzhiyunIRQ_PENDING bit is set. When the interrupt is re-enabled by 337*4882a593Smuzhiyunenable_irq() the pending bit is checked and if it is set, the interrupt 338*4882a593Smuzhiyunis resent either via hardware or by a software resend mechanism. (It's 339*4882a593Smuzhiyunnecessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to use 340*4882a593Smuzhiyunthe delayed interrupt disable feature and your hardware is not capable 341*4882a593Smuzhiyunof retriggering an interrupt.) The delayed interrupt disable is not 342*4882a593Smuzhiyunconfigurable. 343*4882a593Smuzhiyun 344*4882a593SmuzhiyunChip-level hardware encapsulation 345*4882a593Smuzhiyun--------------------------------- 346*4882a593Smuzhiyun 347*4882a593SmuzhiyunThe chip-level hardware descriptor structure :c:type:`irq_chip` contains all 348*4882a593Smuzhiyunthe direct chip relevant functions, which can be utilized by the irq flow 349*4882a593Smuzhiyunimplementations. 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun- ``irq_ack`` 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun- ``irq_mask_ack`` - Optional, recommended for performance 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun- ``irq_mask`` 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun- ``irq_unmask`` 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun- ``irq_eoi`` - Optional, required for EOI flow handlers 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun- ``irq_retrigger`` - Optional 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun- ``irq_set_type`` - Optional 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun- ``irq_set_wake`` - Optional 366*4882a593Smuzhiyun 367*4882a593SmuzhiyunThese primitives are strictly intended to mean what they say: ack means 368*4882a593SmuzhiyunACK, masking means masking of an IRQ line, etc. It is up to the flow 369*4882a593Smuzhiyunhandler(s) to use these basic units of low-level functionality. 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun__do_IRQ entry point 372*4882a593Smuzhiyun==================== 373*4882a593Smuzhiyun 374*4882a593SmuzhiyunThe original implementation __do_IRQ() was an alternative entry point 375*4882a593Smuzhiyunfor all types of interrupts. It no longer exists. 376*4882a593Smuzhiyun 377*4882a593SmuzhiyunThis handler turned out to be not suitable for all interrupt hardware 378*4882a593Smuzhiyunand was therefore reimplemented with split functionality for 379*4882a593Smuzhiyunedge/level/simple/percpu interrupts. This is not only a functional 380*4882a593Smuzhiyunoptimization. It also shortens code paths for interrupts. 381*4882a593Smuzhiyun 382*4882a593SmuzhiyunLocking on SMP 383*4882a593Smuzhiyun============== 384*4882a593Smuzhiyun 385*4882a593SmuzhiyunThe locking of chip registers is up to the architecture that defines the 386*4882a593Smuzhiyunchip primitives. The per-irq structure is protected via desc->lock, by 387*4882a593Smuzhiyunthe generic layer. 388*4882a593Smuzhiyun 389*4882a593SmuzhiyunGeneric interrupt chip 390*4882a593Smuzhiyun====================== 391*4882a593Smuzhiyun 392*4882a593SmuzhiyunTo avoid copies of identical implementations of IRQ chips the core 393*4882a593Smuzhiyunprovides a configurable generic interrupt chip implementation. 394*4882a593SmuzhiyunDevelopers should check carefully whether the generic chip fits their 395*4882a593Smuzhiyunneeds before implementing the same functionality slightly differently 396*4882a593Smuzhiyunthemselves. 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/generic-chip.c 399*4882a593Smuzhiyun :export: 400*4882a593Smuzhiyun 401*4882a593SmuzhiyunStructures 402*4882a593Smuzhiyun========== 403*4882a593Smuzhiyun 404*4882a593SmuzhiyunThis chapter contains the autogenerated documentation of the structures 405*4882a593Smuzhiyunwhich are used in the generic IRQ layer. 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun.. kernel-doc:: include/linux/irq.h 408*4882a593Smuzhiyun :internal: 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun.. kernel-doc:: include/linux/interrupt.h 411*4882a593Smuzhiyun :internal: 412*4882a593Smuzhiyun 413*4882a593SmuzhiyunPublic Functions Provided 414*4882a593Smuzhiyun========================= 415*4882a593Smuzhiyun 416*4882a593SmuzhiyunThis chapter contains the autogenerated documentation of the kernel API 417*4882a593Smuzhiyunfunctions which are exported. 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/manage.c 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/chip.c 422*4882a593Smuzhiyun :export: 423*4882a593Smuzhiyun 424*4882a593SmuzhiyunInternal Functions Provided 425*4882a593Smuzhiyun=========================== 426*4882a593Smuzhiyun 427*4882a593SmuzhiyunThis chapter contains the autogenerated documentation of the internal 428*4882a593Smuzhiyunfunctions. 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/irqdesc.c 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/handle.c 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun.. kernel-doc:: kernel/irq/chip.c 435*4882a593Smuzhiyun :internal: 436*4882a593Smuzhiyun 437*4882a593SmuzhiyunCredits 438*4882a593Smuzhiyun======= 439*4882a593Smuzhiyun 440*4882a593SmuzhiyunThe following people have contributed to this document: 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun1. Thomas Gleixner tglx@linutronix.de 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun2. Ingo Molnar mingo@elte.hu 445