1*4882a593Smuzhiyun============================ 2*4882a593SmuzhiyunDMA with ISA and LPC devices 3*4882a593Smuzhiyun============================ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun:Author: Pierre Ossman <drzeus@drzeus.cx> 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThis document describes how to do DMA transfers using the old ISA DMA 8*4882a593Smuzhiyuncontroller. Even though ISA is more or less dead today the LPC bus 9*4882a593Smuzhiyunuses the same DMA system so it will be around for quite some time. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunHeaders and dependencies 12*4882a593Smuzhiyun------------------------ 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunTo do ISA style DMA you need to include two headers:: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include <linux/dma-mapping.h> 17*4882a593Smuzhiyun #include <asm/dma.h> 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunThe first is the generic DMA API used to convert virtual addresses to 20*4882a593Smuzhiyunbus addresses (see :doc:`/core-api/dma-api` for details). 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunThe second contains the routines specific to ISA DMA transfers. Since 23*4882a593Smuzhiyunthis is not present on all platforms make sure you construct your 24*4882a593SmuzhiyunKconfig to be dependent on ISA_DMA_API (not ISA) so that nobody tries 25*4882a593Smuzhiyunto build your driver on unsupported platforms. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunBuffer allocation 28*4882a593Smuzhiyun----------------- 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunThe ISA DMA controller has some very strict requirements on which 31*4882a593Smuzhiyunmemory it can access so extra care must be taken when allocating 32*4882a593Smuzhiyunbuffers. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun(You usually need a special buffer for DMA transfers instead of 35*4882a593Smuzhiyuntransferring directly to and from your normal data structures.) 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunThe DMA-able address space is the lowest 16 MB of _physical_ memory. 38*4882a593SmuzhiyunAlso the transfer block may not cross page boundaries (which are 64 39*4882a593Smuzhiyunor 128 KiB depending on which channel you use). 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunIn order to allocate a piece of memory that satisfies all these 42*4882a593Smuzhiyunrequirements you pass the flag GFP_DMA to kmalloc. 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunUnfortunately the memory available for ISA DMA is scarce so unless you 45*4882a593Smuzhiyunallocate the memory during boot-up it's a good idea to also pass 46*4882a593Smuzhiyun__GFP_RETRY_MAYFAIL and __GFP_NOWARN to make the allocator try a bit harder. 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun(This scarcity also means that you should allocate the buffer as 49*4882a593Smuzhiyunearly as possible and not release it until the driver is unloaded.) 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunAddress translation 52*4882a593Smuzhiyun------------------- 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunTo translate the virtual address to a bus address, use the normal DMA 55*4882a593SmuzhiyunAPI. Do _not_ use isa_virt_to_bus() even though it does the same 56*4882a593Smuzhiyunthing. The reason for this is that the function isa_virt_to_bus() 57*4882a593Smuzhiyunwill require a Kconfig dependency to ISA, not just ISA_DMA_API which 58*4882a593Smuzhiyunis really all you need. Remember that even though the DMA controller 59*4882a593Smuzhiyunhas its origins in ISA it is used elsewhere. 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunNote: x86_64 had a broken DMA API when it came to ISA but has since 62*4882a593Smuzhiyunbeen fixed. If your arch has problems then fix the DMA API instead of 63*4882a593Smuzhiyunreverting to the ISA functions. 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunChannels 66*4882a593Smuzhiyun-------- 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunA normal ISA DMA controller has 8 channels. The lower four are for 69*4882a593Smuzhiyun8-bit transfers and the upper four are for 16-bit transfers. 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun(Actually the DMA controller is really two separate controllers where 72*4882a593Smuzhiyunchannel 4 is used to give DMA access for the second controller (0-3). 73*4882a593SmuzhiyunThis means that of the four 16-bits channels only three are usable.) 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunYou allocate these in a similar fashion as all basic resources: 76*4882a593Smuzhiyun 77*4882a593Smuzhiyunextern int request_dma(unsigned int dmanr, const char * device_id); 78*4882a593Smuzhiyunextern void free_dma(unsigned int dmanr); 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunThe ability to use 16-bit or 8-bit transfers is _not_ up to you as a 81*4882a593Smuzhiyundriver author but depends on what the hardware supports. Check your 82*4882a593Smuzhiyunspecs or test different channels. 83*4882a593Smuzhiyun 84*4882a593SmuzhiyunTransfer data 85*4882a593Smuzhiyun------------- 86*4882a593Smuzhiyun 87*4882a593SmuzhiyunNow for the good stuff, the actual DMA transfer. :) 88*4882a593Smuzhiyun 89*4882a593SmuzhiyunBefore you use any ISA DMA routines you need to claim the DMA lock 90*4882a593Smuzhiyunusing claim_dma_lock(). The reason is that some DMA operations are 91*4882a593Smuzhiyunnot atomic so only one driver may fiddle with the registers at a 92*4882a593Smuzhiyuntime. 93*4882a593Smuzhiyun 94*4882a593SmuzhiyunThe first time you use the DMA controller you should call 95*4882a593Smuzhiyunclear_dma_ff(). This clears an internal register in the DMA 96*4882a593Smuzhiyuncontroller that is used for the non-atomic operations. As long as you 97*4882a593Smuzhiyun(and everyone else) uses the locking functions then you only need to 98*4882a593Smuzhiyunreset this once. 99*4882a593Smuzhiyun 100*4882a593SmuzhiyunNext, you tell the controller in which direction you intend to do the 101*4882a593Smuzhiyuntransfer using set_dma_mode(). Currently you have the options 102*4882a593SmuzhiyunDMA_MODE_READ and DMA_MODE_WRITE. 103*4882a593Smuzhiyun 104*4882a593SmuzhiyunSet the address from where the transfer should start (this needs to 105*4882a593Smuzhiyunbe 16-bit aligned for 16-bit transfers) and how many bytes to 106*4882a593Smuzhiyuntransfer. Note that it's _bytes_. The DMA routines will do all the 107*4882a593Smuzhiyunrequired translation to values that the DMA controller understands. 108*4882a593Smuzhiyun 109*4882a593SmuzhiyunThe final step is enabling the DMA channel and releasing the DMA 110*4882a593Smuzhiyunlock. 111*4882a593Smuzhiyun 112*4882a593SmuzhiyunOnce the DMA transfer is finished (or timed out) you should disable 113*4882a593Smuzhiyunthe channel again. You should also check get_dma_residue() to make 114*4882a593Smuzhiyunsure that all data has been transferred. 115*4882a593Smuzhiyun 116*4882a593SmuzhiyunExample:: 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun int flags, residue; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun flags = claim_dma_lock(); 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun clear_dma_ff(); 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun set_dma_mode(channel, DMA_MODE_WRITE); 125*4882a593Smuzhiyun set_dma_addr(channel, phys_addr); 126*4882a593Smuzhiyun set_dma_count(channel, num_bytes); 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun dma_enable(channel); 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun release_dma_lock(flags); 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun while (!device_done()); 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun flags = claim_dma_lock(); 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun dma_disable(channel); 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun residue = dma_get_residue(channel); 139*4882a593Smuzhiyun if (residue != 0) 140*4882a593Smuzhiyun printk(KERN_ERR "driver: Incomplete DMA transfer!" 141*4882a593Smuzhiyun " %d bytes left!\n", residue); 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun release_dma_lock(flags); 144*4882a593Smuzhiyun 145*4882a593SmuzhiyunSuspend/resume 146*4882a593Smuzhiyun-------------- 147*4882a593Smuzhiyun 148*4882a593SmuzhiyunIt is the driver's responsibility to make sure that the machine isn't 149*4882a593Smuzhiyunsuspended while a DMA transfer is in progress. Also, all DMA settings 150*4882a593Smuzhiyunare lost when the system suspends so if your driver relies on the DMA 151*4882a593Smuzhiyuncontroller being in a certain state then you have to restore these 152*4882a593Smuzhiyunregisters upon resume. 153