1*4882a593Smuzhiyun============== 2*4882a593SmuzhiyunDMA attributes 3*4882a593Smuzhiyun============== 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThis document describes the semantics of the DMA attributes that are 6*4882a593Smuzhiyundefined in linux/dma-mapping.h. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunDMA_ATTR_WEAK_ORDERING 9*4882a593Smuzhiyun---------------------- 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunDMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping 12*4882a593Smuzhiyunmay be weakly ordered, that is that reads and writes may pass each other. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunSince it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, 15*4882a593Smuzhiyunthose that do not will simply ignore the attribute and exhibit default 16*4882a593Smuzhiyunbehavior. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunDMA_ATTR_WRITE_COMBINE 19*4882a593Smuzhiyun---------------------- 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunDMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be 22*4882a593Smuzhiyunbuffered to improve performance. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunSince it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, 25*4882a593Smuzhiyunthose that do not will simply ignore the attribute and exhibit default 26*4882a593Smuzhiyunbehavior. 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunDMA_ATTR_NO_KERNEL_MAPPING 29*4882a593Smuzhiyun-------------------------- 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunDMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel 32*4882a593Smuzhiyunvirtual mapping for the allocated buffer. On some architectures creating 33*4882a593Smuzhiyunsuch mapping is non-trivial task and consumes very limited resources 34*4882a593Smuzhiyun(like kernel virtual address space or dma consistent address space). 35*4882a593SmuzhiyunBuffers allocated with this attribute can be only passed to user space 36*4882a593Smuzhiyunby calling dma_mmap_attrs(). By using this API, you are guaranteeing 37*4882a593Smuzhiyunthat you won't dereference the pointer returned by dma_alloc_attr(). You 38*4882a593Smuzhiyuncan treat it as a cookie that must be passed to dma_mmap_attrs() and 39*4882a593Smuzhiyundma_free_attrs(). Make sure that both of these also get this attribute 40*4882a593Smuzhiyunset on each call. 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunSince it is optional for platforms to implement 43*4882a593SmuzhiyunDMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the 44*4882a593Smuzhiyunattribute and exhibit default behavior. 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunDMA_ATTR_SKIP_CPU_SYNC 47*4882a593Smuzhiyun---------------------- 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunBy default dma_map_{single,page,sg} functions family transfer a given 50*4882a593Smuzhiyunbuffer from CPU domain to device domain. Some advanced use cases might 51*4882a593Smuzhiyunrequire sharing a buffer between more than one device. This requires 52*4882a593Smuzhiyunhaving a mapping created separately for each device and is usually 53*4882a593Smuzhiyunperformed by calling dma_map_{single,page,sg} function more than once 54*4882a593Smuzhiyunfor the given buffer with device pointer to each device taking part in 55*4882a593Smuzhiyunthe buffer sharing. The first call transfers a buffer from 'CPU' domain 56*4882a593Smuzhiyunto 'device' domain, what synchronizes CPU caches for the given region 57*4882a593Smuzhiyun(usually it means that the cache has been flushed or invalidated 58*4882a593Smuzhiyundepending on the dma direction). However, next calls to 59*4882a593Smuzhiyundma_map_{single,page,sg}() for other devices will perform exactly the 60*4882a593Smuzhiyunsame synchronization operation on the CPU cache. CPU cache synchronization 61*4882a593Smuzhiyunmight be a time consuming operation, especially if the buffers are 62*4882a593Smuzhiyunlarge, so it is highly recommended to avoid it if possible. 63*4882a593SmuzhiyunDMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of 64*4882a593Smuzhiyunthe CPU cache for the given buffer assuming that it has been already 65*4882a593Smuzhiyuntransferred to 'device' domain. This attribute can be also used for 66*4882a593Smuzhiyundma_unmap_{single,page,sg} functions family to force buffer to stay in 67*4882a593Smuzhiyundevice domain after releasing a mapping for it. Use this attribute with 68*4882a593Smuzhiyuncare! 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunDMA_ATTR_FORCE_CONTIGUOUS 71*4882a593Smuzhiyun------------------------- 72*4882a593Smuzhiyun 73*4882a593SmuzhiyunBy default DMA-mapping subsystem is allowed to assemble the buffer 74*4882a593Smuzhiyunallocated by dma_alloc_attrs() function from individual pages if it can 75*4882a593Smuzhiyunbe mapped as contiguous chunk into device dma address space. By 76*4882a593Smuzhiyunspecifying this attribute the allocated buffer is forced to be contiguous 77*4882a593Smuzhiyunalso in physical memory. 78*4882a593Smuzhiyun 79*4882a593SmuzhiyunDMA_ATTR_ALLOC_SINGLE_PAGES 80*4882a593Smuzhiyun--------------------------- 81*4882a593Smuzhiyun 82*4882a593SmuzhiyunThis is a hint to the DMA-mapping subsystem that it's probably not worth 83*4882a593Smuzhiyunthe time to try to allocate memory to in a way that gives better TLB 84*4882a593Smuzhiyunefficiency (AKA it's not worth trying to build the mapping out of larger 85*4882a593Smuzhiyunpages). You might want to specify this if: 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun- You know that the accesses to this memory won't thrash the TLB. 88*4882a593Smuzhiyun You might know that the accesses are likely to be sequential or 89*4882a593Smuzhiyun that they aren't sequential but it's unlikely you'll ping-pong 90*4882a593Smuzhiyun between many addresses that are likely to be in different physical 91*4882a593Smuzhiyun pages. 92*4882a593Smuzhiyun- You know that the penalty of TLB misses while accessing the 93*4882a593Smuzhiyun memory will be small enough to be inconsequential. If you are 94*4882a593Smuzhiyun doing a heavy operation like decryption or decompression this 95*4882a593Smuzhiyun might be the case. 96*4882a593Smuzhiyun- You know that the DMA mapping is fairly transitory. If you expect 97*4882a593Smuzhiyun the mapping to have a short lifetime then it may be worth it to 98*4882a593Smuzhiyun optimize allocation (avoid coming up with large pages) instead of 99*4882a593Smuzhiyun getting the slight performance win of larger pages. 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunSetting this hint doesn't guarantee that you won't get huge pages, but it 102*4882a593Smuzhiyunmeans that we won't try quite as hard to get them. 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun.. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM, 105*4882a593Smuzhiyun though ARM64 patches will likely be posted soon. 106*4882a593Smuzhiyun 107*4882a593SmuzhiyunDMA_ATTR_NO_WARN 108*4882a593Smuzhiyun---------------- 109*4882a593Smuzhiyun 110*4882a593SmuzhiyunThis tells the DMA-mapping subsystem to suppress allocation failure reports 111*4882a593Smuzhiyun(similarly to __GFP_NOWARN). 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunOn some architectures allocation failures are reported with error messages 114*4882a593Smuzhiyunto the system logs. Although this can help to identify and debug problems, 115*4882a593Smuzhiyundrivers which handle failures (eg, retry later) have no problems with them, 116*4882a593Smuzhiyunand can actually flood the system logs with error messages that aren't any 117*4882a593Smuzhiyunproblem at all, depending on the implementation of the retry mechanism. 118*4882a593Smuzhiyun 119*4882a593SmuzhiyunSo, this provides a way for drivers to avoid those error messages on calls 120*4882a593Smuzhiyunwhere allocation failures are not a problem, and shouldn't bother the logs. 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun.. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC. 123*4882a593Smuzhiyun 124*4882a593SmuzhiyunDMA_ATTR_PRIVILEGED 125*4882a593Smuzhiyun------------------- 126*4882a593Smuzhiyun 127*4882a593SmuzhiyunSome advanced peripherals such as remote processors and GPUs perform 128*4882a593Smuzhiyunaccesses to DMA buffers in both privileged "supervisor" and unprivileged 129*4882a593Smuzhiyun"user" modes. This attribute is used to indicate to the DMA-mapping 130*4882a593Smuzhiyunsubsystem that the buffer is fully accessible at the elevated privilege 131*4882a593Smuzhiyunlevel (and ideally inaccessible or at least read-only at the 132*4882a593Smuzhiyunlesser-privileged levels). 133