1*4882a593Smuzhiyun=========================== 2*4882a593SmuzhiyunSamsung GPIO implementation 3*4882a593Smuzhiyun=========================== 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunIntroduction 6*4882a593Smuzhiyun------------ 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunThis outlines the Samsung GPIO implementation and the architecture 9*4882a593Smuzhiyunspecific calls provided alongside the drivers/gpio core. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunS3C24XX (Legacy) 13*4882a593Smuzhiyun---------------- 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunSee Documentation/arm/samsung-s3c24xx/gpio.rst for more information 16*4882a593Smuzhiyunabout these devices. Their implementation has been brought into line 17*4882a593Smuzhiyunwith the core samsung implementation described in this document. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunGPIOLIB integration 21*4882a593Smuzhiyun------------------- 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunThe gpio implementation uses gpiolib as much as possible, only providing 24*4882a593Smuzhiyunspecific calls for the items that require Samsung specific handling, such 25*4882a593Smuzhiyunas pin special-function or pull resistor control. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunGPIO numbering is synchronised between the Samsung and gpiolib system. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunPIN configuration 31*4882a593Smuzhiyun----------------- 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunPin configuration is specific to the Samsung architecture, with each SoC 34*4882a593Smuzhiyunregistering the necessary information for the core gpio configuration 35*4882a593Smuzhiyunimplementation to configure pins as necessary. 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunThe s3c_gpio_cfgpin() and s3c_gpio_setpull() provide the means for a 38*4882a593Smuzhiyundriver or machine to change gpio configuration. 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunSee arch/arm/plat-samsung/include/plat/gpio-cfg.h for more information 41*4882a593Smuzhiyunon these functions. 42