xref: /OK3568_Linux_fs/kernel/Documentation/arm/samsung-s3c24xx/suspend.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun=======================
2*4882a593SmuzhiyunS3C24XX Suspend Support
3*4882a593Smuzhiyun=======================
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunIntroduction
7*4882a593Smuzhiyun------------
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun  The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
10*4882a593Smuzhiyun  in Self-Refresh mode, and all but the essential peripheral blocks are
11*4882a593Smuzhiyun  powered down. For more information on how this works, please look
12*4882a593Smuzhiyun  at the relevant CPU datasheet from Samsung.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunRequirements
16*4882a593Smuzhiyun------------
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun  1) A bootloader that can support the necessary resume operation
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  2) Support for at least 1 source for resume
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  3) CONFIG_PM enabled in the kernel
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  4) Any peripherals that are going to be powered down at the same
25*4882a593Smuzhiyun     time require suspend/resume support.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunResuming
29*4882a593Smuzhiyun--------
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  The S3C2410 user manual defines the process of sending the CPU to
32*4882a593Smuzhiyun  sleep and how it resumes. The default behaviour of the Linux code
33*4882a593Smuzhiyun  is to set the GSTATUS3 register to the physical address of the
34*4882a593Smuzhiyun  code to resume Linux operation.
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  GSTATUS4 is currently left alone by the sleep code, and is free to
37*4882a593Smuzhiyun  use for any other purposes (for example, the EB2410ITX uses this to
38*4882a593Smuzhiyun  save memory configuration in).
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun
41*4882a593SmuzhiyunMachine Support
42*4882a593Smuzhiyun---------------
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  The machine specific functions must call the s3c_pm_init() function
45*4882a593Smuzhiyun  to say that its bootloader is capable of resuming. This can be as
46*4882a593Smuzhiyun  simple as adding the following to the machine's definition:
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun  INITMACHINE(s3c_pm_init)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  A board can do its own setup before calling s3c_pm_init, if it
51*4882a593Smuzhiyun  needs to setup anything else for power management support.
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  There is currently no support for over-riding the default method of
54*4882a593Smuzhiyun  saving the resume address, if your board requires it, then contact
55*4882a593Smuzhiyun  the maintainer and discuss what is required.
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun  Note, the original method of adding an late_initcall() is wrong,
58*4882a593Smuzhiyun  and will end up initialising all compiled machines' pm init!
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun  The following is an example of code used for testing wakeup from
61*4882a593Smuzhiyun  an falling edge on IRQ_EINT0::
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun    static irqreturn_t button_irq(int irq, void *pw)
65*4882a593Smuzhiyun    {
66*4882a593Smuzhiyun	return IRQ_HANDLED;
67*4882a593Smuzhiyun    }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun    statuc void __init machine_init(void)
70*4882a593Smuzhiyun    {
71*4882a593Smuzhiyun	...
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
74*4882a593Smuzhiyun		   "button-irq-eint0", NULL);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	enable_irq_wake(IRQ_EINT0);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	s3c_pm_init();
79*4882a593Smuzhiyun    }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun
82*4882a593SmuzhiyunDebugging
83*4882a593Smuzhiyun---------
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun  There are several important things to remember when using PM suspend:
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun  1) The uart drivers will disable the clocks to the UART blocks when
88*4882a593Smuzhiyun     suspending, which means that use of printascii() or similar direct
89*4882a593Smuzhiyun     access to the UARTs will cause the debug to stop.
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun  2) While the pm code itself will attempt to re-enable the UART clocks,
92*4882a593Smuzhiyun     care should be taken that any external clock sources that the UARTs
93*4882a593Smuzhiyun     rely on are still enabled at that point.
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun  3) If any debugging is placed in the resume path, then it must have the
96*4882a593Smuzhiyun     relevant clocks and peripherals setup before use (ie, bootloader).
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun     For example, if you transmit a character from the UART, the baud
99*4882a593Smuzhiyun     rate and uart controls must be setup beforehand.
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun
102*4882a593SmuzhiyunConfiguration
103*4882a593Smuzhiyun-------------
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun  The S3C2410 specific configuration in `System Type` defines various
106*4882a593Smuzhiyun  aspects of how the S3C2410 suspend and resume support is configured
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun  `S3C2410 PM Suspend debug`
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun    This option prints messages to the serial console before and after
111*4882a593Smuzhiyun    the actual suspend, giving detailed information on what is
112*4882a593Smuzhiyun    happening
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun  `S3C2410 PM Suspend Memory CRC`
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun    Allows the entire memory to be checksummed before and after the
118*4882a593Smuzhiyun    suspend to see if there has been any corruption of the contents.
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun    Note, the time to calculate the CRC is dependent on the CPU speed
121*4882a593Smuzhiyun    and the size of memory. For an 64Mbyte RAM area on an 200MHz
122*4882a593Smuzhiyun    S3C2410, this can take approximately 4 seconds to complete.
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun    This support requires the CRC32 function to be enabled.
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun  `S3C2410 PM Suspend CRC Chunksize (KiB)`
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun    Defines the size of memory each CRC chunk covers. A smaller value
130*4882a593Smuzhiyun    will mean that the CRC data block will take more memory, but will
131*4882a593Smuzhiyun    identify any faults with better precision
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun
134*4882a593SmuzhiyunDocument Author
135*4882a593Smuzhiyun---------------
136*4882a593Smuzhiyun
137*4882a593SmuzhiyunBen Dooks, Copyright 2004 Simtec Electronics
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