1*4882a593Smuzhiyun==================== 2*4882a593SmuzhiyunS3C24XX GPIO Control 3*4882a593Smuzhiyun==================== 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunIntroduction 6*4882a593Smuzhiyun------------ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun The s3c2410 kernel provides an interface to configure and 9*4882a593Smuzhiyun manipulate the state of the GPIO pins, and find out other 10*4882a593Smuzhiyun information about them. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun There are a number of conditions attached to the configuration 13*4882a593Smuzhiyun of the s3c2410 GPIO system, please read the Samsung provided 14*4882a593Smuzhiyun data-sheet/users manual to find out the complete list. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun See Documentation/arm/samsung/gpio.rst for the core implementation. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunGPIOLIB 20*4882a593Smuzhiyun------- 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun With the event of the GPIOLIB in drivers/gpio, support for some 23*4882a593Smuzhiyun of the GPIO functions such as reading and writing a pin will 24*4882a593Smuzhiyun be removed in favour of this common access method. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun Once all the extant drivers have been converted, the functions 27*4882a593Smuzhiyun listed below will be removed (they may be marked as __deprecated 28*4882a593Smuzhiyun in the near future). 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun The following functions now either have a `s3c_` specific variant 31*4882a593Smuzhiyun or are merged into gpiolib. See the definitions in 32*4882a593Smuzhiyun arch/arm/plat-samsung/include/plat/gpio-cfg.h: 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun - s3c2410_gpio_setpin() gpio_set_value() or gpio_direction_output() 35*4882a593Smuzhiyun - s3c2410_gpio_getpin() gpio_get_value() or gpio_direction_input() 36*4882a593Smuzhiyun - s3c2410_gpio_getirq() gpio_to_irq() 37*4882a593Smuzhiyun - s3c2410_gpio_cfgpin() s3c_gpio_cfgpin() 38*4882a593Smuzhiyun - s3c2410_gpio_getcfg() s3c_gpio_getcfg() 39*4882a593Smuzhiyun - s3c2410_gpio_pullup() s3c_gpio_setpull() 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunGPIOLIB conversion 43*4882a593Smuzhiyun------------------ 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunIf you need to convert your board or driver to use gpiolib from the phased 46*4882a593Smuzhiyunout s3c2410 API, then here are some notes on the process. 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun1) If your board is exclusively using an GPIO, say to control peripheral 49*4882a593Smuzhiyun power, then it will require to claim the gpio with gpio_request() before 50*4882a593Smuzhiyun it can use it. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun It is recommended to check the return value, with at least WARN_ON() 53*4882a593Smuzhiyun during initialisation. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun2) The s3c2410_gpio_cfgpin() can be directly replaced with s3c_gpio_cfgpin() 56*4882a593Smuzhiyun as they have the same arguments, and can either take the pin specific 57*4882a593Smuzhiyun values, or the more generic special-function-number arguments. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun3) s3c2410_gpio_pullup() changes have the problem that while the 60*4882a593Smuzhiyun s3c2410_gpio_pullup(x, 1) can be easily translated to the 61*4882a593Smuzhiyun s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0) 62*4882a593Smuzhiyun are not so easy. 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun The s3c2410_gpio_pullup(x, 0) case enables the pull-up (or in the case 65*4882a593Smuzhiyun of some of the devices, a pull-down) and as such the new API distinguishes 66*4882a593Smuzhiyun between the UP and DOWN case. There is currently no 'just turn on' setting 67*4882a593Smuzhiyun which may be required if this becomes a problem. 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun4) s3c2410_gpio_setpin() can be replaced by gpio_set_value(), the old call 70*4882a593Smuzhiyun does not implicitly configure the relevant gpio to output. The gpio 71*4882a593Smuzhiyun direction should be changed before using gpio_set_value(). 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun5) s3c2410_gpio_getpin() is replaceable by gpio_get_value() if the pin 74*4882a593Smuzhiyun has been set to input. It is currently unknown what the behaviour is 75*4882a593Smuzhiyun when using gpio_get_value() on an output pin (s3c2410_gpio_getpin 76*4882a593Smuzhiyun would return the value the pin is supposed to be outputting). 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun6) s3c2410_gpio_getirq() should be directly replaceable with the 79*4882a593Smuzhiyun gpio_to_irq() call. 80*4882a593Smuzhiyun 81*4882a593SmuzhiyunThe s3c2410_gpio and `gpio_` calls have always operated on the same gpio 82*4882a593Smuzhiyunnumberspace, so there is no problem with converting the gpio numbering 83*4882a593Smuzhiyunbetween the calls. 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunHeaders 87*4882a593Smuzhiyun------- 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun See arch/arm/mach-s3c24xx/include/mach/regs-gpio.h for the list 90*4882a593Smuzhiyun of GPIO pins, and the configuration values for them. This 91*4882a593Smuzhiyun is included by using #include <mach/regs-gpio.h> 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun 94*4882a593SmuzhiyunPIN Numbers 95*4882a593Smuzhiyun----------- 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun Each pin has an unique number associated with it in regs-gpio.h, 98*4882a593Smuzhiyun e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell 99*4882a593Smuzhiyun the GPIO functions which pin is to be used. 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun With the conversion to gpiolib, there is no longer a direct conversion 102*4882a593Smuzhiyun from gpio pin number to register base address as in earlier kernels. This 103*4882a593Smuzhiyun is due to the number space required for newer SoCs where the later 104*4882a593Smuzhiyun GPIOs are not contiguous. 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun 107*4882a593SmuzhiyunConfiguring a pin 108*4882a593Smuzhiyun----------------- 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun The following function allows the configuration of a given pin to 111*4882a593Smuzhiyun be changed. 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun void s3c_gpio_cfgpin(unsigned int pin, unsigned int function); 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun e.g.: 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1)); 118*4882a593Smuzhiyun s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2)); 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun which would turn GPA(0) into the lowest Address line A0, and set 121*4882a593Smuzhiyun GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line. 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun 124*4882a593SmuzhiyunReading the current configuration 125*4882a593Smuzhiyun--------------------------------- 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun The current configuration of a pin can be read by using standard 128*4882a593Smuzhiyun gpiolib function: 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun s3c_gpio_getcfg(unsigned int pin); 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun The return value will be from the same set of values which can be 133*4882a593Smuzhiyun passed to s3c_gpio_cfgpin(). 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun 136*4882a593SmuzhiyunConfiguring a pull-up resistor 137*4882a593Smuzhiyun------------------------------ 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun A large proportion of the GPIO pins on the S3C2410 can have weak 140*4882a593Smuzhiyun pull-up resistors enabled. This can be configured by the following 141*4882a593Smuzhiyun function: 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun void s3c_gpio_setpull(unsigned int pin, unsigned int to); 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off, 146*4882a593Smuzhiyun and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other 147*4882a593Smuzhiyun values are currently undefined. 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun 150*4882a593SmuzhiyunGetting and setting the state of a PIN 151*4882a593Smuzhiyun-------------------------------------- 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun These calls are now implemented by the relevant gpiolib calls, convert 154*4882a593Smuzhiyun your board or driver to use gpiolib. 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun 157*4882a593SmuzhiyunGetting the IRQ number associated with a PIN 158*4882a593Smuzhiyun-------------------------------------------- 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun A standard gpiolib function can map the given pin number to an IRQ 161*4882a593Smuzhiyun number to pass to the IRQ system. 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun int gpio_to_irq(unsigned int pin); 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun Note, not all pins have an IRQ. 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun 168*4882a593SmuzhiyunAuthor 169*4882a593Smuzhiyun------- 170*4882a593Smuzhiyun 171*4882a593SmuzhiyunBen Dooks, 03 October 2004 172*4882a593SmuzhiyunCopyright 2004 Ben Dooks, Simtec Electronics 173