xref: /OK3568_Linux_fs/kernel/Documentation/admin-guide/perf/imx-ddr.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
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2*4882a593SmuzhiyunFreescale i.MX8 DDR Performance Monitoring Unit (PMU)
3*4882a593Smuzhiyun=====================================================
4*4882a593Smuzhiyun
5*4882a593SmuzhiyunThere are no performance counters inside the DRAM controller, so performance
6*4882a593Smuzhiyunsignals are brought out to the edge of the controller where a set of 4 x 32 bit
7*4882a593Smuzhiyuncounters is implemented. This is controlled by the CSV modes programed in counter
8*4882a593Smuzhiyuncontrol register which causes a large number of PERF signals to be generated.
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunSelection of the value for each counter is done via the config registers. There
11*4882a593Smuzhiyunis one register for each counter. Counter 0 is special in that it always counts
12*4882a593Smuzhiyun“time” and when expired causes a lock on itself and the other counters and an
13*4882a593Smuzhiyuninterrupt is raised. If any other counter overflows, it continues counting, and
14*4882a593Smuzhiyunno interrupt is raised.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunThe "format" directory describes format of the config (event ID) and config1
17*4882a593Smuzhiyun(AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/
18*4882a593Smuzhiyundevices/imx8_ddr0/format/. The "events" directory describes the events types
19*4882a593Smuzhiyunhardware supported that can be used with perf tool, see /sys/bus/event_source/
20*4882a593Smuzhiyundevices/imx8_ddr0/events/. The "caps" directory describes filter features implemented
21*4882a593Smuzhiyunin DDR PMU, see /sys/bus/events_source/devices/imx8_ddr0/caps/.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun    .. code-block:: bash
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun        perf stat -a -e imx8_ddr0/cycles/ cmd
26*4882a593Smuzhiyun        perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunAXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
29*4882a593Smuzhiyunto count reading or writing matches filter setting. Filter setting is various
30*4882a593Smuzhiyunfrom different DRAM controller implementations, which is distinguished by quirks
31*4882a593Smuzhiyunin the driver. You also can dump info from userspace, filter in "caps" directory
32*4882a593Smuzhiyunindicates whether PMU supports AXI ID filter or not; enhanced_filter indicates
33*4882a593Smuzhiyunwhether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and
34*4882a593Smuzhiyunvalue 1 for supported.
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun* With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0).
37*4882a593Smuzhiyun  Filter is defined with two configuration parts:
38*4882a593Smuzhiyun  --AXI_ID defines AxID matching value.
39*4882a593Smuzhiyun  --AXI_MASKING defines which bits of AxID are meaningful for the matching.
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun      - 0: corresponding bit is masked.
42*4882a593Smuzhiyun      - 1: corresponding bit is not masked, i.e. used to do the matching.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  AXI_ID and AXI_MASKING are mapped on DPCR1 register in performance counter.
45*4882a593Smuzhiyun  When non-masked bits are matching corresponding AXI_ID bits then counter is
46*4882a593Smuzhiyun  incremented. Perf counter is incremented if::
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun        AxID && AXI_MASKING == AXI_ID && AXI_MASKING
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  This filter doesn't support filter different AXI ID for axid-read and axid-write
51*4882a593Smuzhiyun  event at the same time as this filter is shared between counters.
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  .. code-block:: bash
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun      perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
56*4882a593Smuzhiyun      perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun  .. note::
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun      axi_mask is inverted in userspace(i.e. set bits are bits to mask), and
61*4882a593Smuzhiyun      it will be reverted in driver automatically. so that the user can just specify
62*4882a593Smuzhiyun      axi_id to monitor a specific id, rather than having to specify axi_mask.
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun  .. code-block:: bash
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun        perf stat -a -e imx8_ddr0/axid-read,axi_id=0x12/ cmd, which will monitor ARID=0x12
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun* With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1).
69*4882a593Smuzhiyun  This is an extension to the DDR_CAP_AXI_ID_FILTER quirk which permits
70*4882a593Smuzhiyun  counting the number of bytes (as opposed to the number of bursts) from DDR
71*4882a593Smuzhiyun  read and write transactions concurrently with another set of data counters.
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