1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun============================================ 4*4882a593SmuzhiyunAccessing PCI device resources through sysfs 5*4882a593Smuzhiyun============================================ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunsysfs, usually mounted at /sys, provides access to PCI resources on platforms 8*4882a593Smuzhiyunthat support it. For example, a given bus might look like this:: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /sys/devices/pci0000:17 11*4882a593Smuzhiyun |-- 0000:17:00.0 12*4882a593Smuzhiyun | |-- class 13*4882a593Smuzhiyun | |-- config 14*4882a593Smuzhiyun | |-- device 15*4882a593Smuzhiyun | |-- enable 16*4882a593Smuzhiyun | |-- irq 17*4882a593Smuzhiyun | |-- local_cpus 18*4882a593Smuzhiyun | |-- remove 19*4882a593Smuzhiyun | |-- resource 20*4882a593Smuzhiyun | |-- resource0 21*4882a593Smuzhiyun | |-- resource1 22*4882a593Smuzhiyun | |-- resource2 23*4882a593Smuzhiyun | |-- revision 24*4882a593Smuzhiyun | |-- rom 25*4882a593Smuzhiyun | |-- subsystem_device 26*4882a593Smuzhiyun | |-- subsystem_vendor 27*4882a593Smuzhiyun | `-- vendor 28*4882a593Smuzhiyun `-- ... 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunThe topmost element describes the PCI domain and bus number. In this case, 31*4882a593Smuzhiyunthe domain number is 0000 and the bus number is 17 (both values are in hex). 32*4882a593SmuzhiyunThis bus contains a single function device in slot 0. The domain and bus 33*4882a593Smuzhiyunnumbers are reproduced for convenience. Under the device directory are several 34*4882a593Smuzhiyunfiles, each with their own function. 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun =================== ===================================================== 37*4882a593Smuzhiyun file function 38*4882a593Smuzhiyun =================== ===================================================== 39*4882a593Smuzhiyun class PCI class (ascii, ro) 40*4882a593Smuzhiyun config PCI config space (binary, rw) 41*4882a593Smuzhiyun device PCI device (ascii, ro) 42*4882a593Smuzhiyun enable Whether the device is enabled (ascii, rw) 43*4882a593Smuzhiyun irq IRQ number (ascii, ro) 44*4882a593Smuzhiyun local_cpus nearby CPU mask (cpumask, ro) 45*4882a593Smuzhiyun remove remove device from kernel's list (ascii, wo) 46*4882a593Smuzhiyun resource PCI resource host addresses (ascii, ro) 47*4882a593Smuzhiyun resource0..N PCI resource N, if present (binary, mmap, rw\ [1]_) 48*4882a593Smuzhiyun resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap) 49*4882a593Smuzhiyun revision PCI revision (ascii, ro) 50*4882a593Smuzhiyun rom PCI ROM resource, if present (binary, ro) 51*4882a593Smuzhiyun subsystem_device PCI subsystem device (ascii, ro) 52*4882a593Smuzhiyun subsystem_vendor PCI subsystem vendor (ascii, ro) 53*4882a593Smuzhiyun vendor PCI vendor (ascii, ro) 54*4882a593Smuzhiyun =================== ===================================================== 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun:: 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun ro - read only file 59*4882a593Smuzhiyun rw - file is readable and writable 60*4882a593Smuzhiyun wo - write only file 61*4882a593Smuzhiyun mmap - file is mmapable 62*4882a593Smuzhiyun ascii - file contains ascii text 63*4882a593Smuzhiyun binary - file contains binary data 64*4882a593Smuzhiyun cpumask - file contains a cpumask type 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun.. [1] rw for IORESOURCE_IO (I/O port) regions only 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunThe read only files are informational, writes to them will be ignored, with 69*4882a593Smuzhiyunthe exception of the 'rom' file. Writable files can be used to perform 70*4882a593Smuzhiyunactions on the device (e.g. changing config space, detaching a device). 71*4882a593Smuzhiyunmmapable files are available via an mmap of the file at offset 0 and can be 72*4882a593Smuzhiyunused to do actual device programming from userspace. Note that some platforms 73*4882a593Smuzhiyundon't support mmapping of certain resources, so be sure to check the return 74*4882a593Smuzhiyunvalue from any attempted mmap. The most notable of these are I/O port 75*4882a593Smuzhiyunresources, which also provide read/write access. 76*4882a593Smuzhiyun 77*4882a593SmuzhiyunThe 'enable' file provides a counter that indicates how many times the device 78*4882a593Smuzhiyunhas been enabled. If the 'enable' file currently returns '4', and a '1' is 79*4882a593Smuzhiyunechoed into it, it will then return '5'. Echoing a '0' into it will decrease 80*4882a593Smuzhiyunthe count. Even when it returns to 0, though, some of the initialisation 81*4882a593Smuzhiyunmay not be reversed. 82*4882a593Smuzhiyun 83*4882a593SmuzhiyunThe 'rom' file is special in that it provides read-only access to the device's 84*4882a593SmuzhiyunROM file, if available. It's disabled by default, however, so applications 85*4882a593Smuzhiyunshould write the string "1" to the file to enable it before attempting a read 86*4882a593Smuzhiyuncall, and disable it following the access by writing "0" to the file. Note 87*4882a593Smuzhiyunthat the device must be enabled for a rom read to return data successfully. 88*4882a593SmuzhiyunIn the event a driver is not bound to the device, it can be enabled using the 89*4882a593Smuzhiyun'enable' file, documented above. 90*4882a593Smuzhiyun 91*4882a593SmuzhiyunThe 'remove' file is used to remove the PCI device, by writing a non-zero 92*4882a593Smuzhiyuninteger to the file. This does not involve any kind of hot-plug functionality, 93*4882a593Smuzhiyune.g. powering off the device. The device is removed from the kernel's list of 94*4882a593SmuzhiyunPCI devices, the sysfs directory for it is removed, and the device will be 95*4882a593Smuzhiyunremoved from any drivers attached to it. Removal of PCI root buses is 96*4882a593Smuzhiyundisallowed. 97*4882a593Smuzhiyun 98*4882a593SmuzhiyunAccessing legacy resources through sysfs 99*4882a593Smuzhiyun---------------------------------------- 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunLegacy I/O port and ISA memory resources are also provided in sysfs if the 102*4882a593Smuzhiyununderlying platform supports them. They're located in the PCI class hierarchy, 103*4882a593Smuzhiyune.g.:: 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /sys/class/pci_bus/0000:17/ 106*4882a593Smuzhiyun |-- bridge -> ../../../devices/pci0000:17 107*4882a593Smuzhiyun |-- cpuaffinity 108*4882a593Smuzhiyun |-- legacy_io 109*4882a593Smuzhiyun `-- legacy_mem 110*4882a593Smuzhiyun 111*4882a593SmuzhiyunThe legacy_io file is a read/write file that can be used by applications to 112*4882a593Smuzhiyundo legacy port I/O. The application should open the file, seek to the desired 113*4882a593Smuzhiyunport (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes. The legacy_mem 114*4882a593Smuzhiyunfile should be mmapped with an offset corresponding to the memory offset 115*4882a593Smuzhiyundesired, e.g. 0xa0000 for the VGA frame buffer. The application can then 116*4882a593Smuzhiyunsimply dereference the returned pointer (after checking for errors of course) 117*4882a593Smuzhiyunto access legacy memory space. 118*4882a593Smuzhiyun 119*4882a593SmuzhiyunSupporting PCI access on new platforms 120*4882a593Smuzhiyun-------------------------------------- 121*4882a593Smuzhiyun 122*4882a593SmuzhiyunIn order to support PCI resource mapping as described above, Linux platform 123*4882a593Smuzhiyuncode should ideally define ARCH_GENERIC_PCI_MMAP_RESOURCE and use the generic 124*4882a593Smuzhiyunimplementation of that functionality. To support the historical interface of 125*4882a593Smuzhiyunmmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP. 126*4882a593Smuzhiyun 127*4882a593SmuzhiyunAlternatively, platforms which set HAVE_PCI_MMAP may provide their own 128*4882a593Smuzhiyunimplementation of pci_mmap_page_range() instead of defining 129*4882a593SmuzhiyunARCH_GENERIC_PCI_MMAP_RESOURCE. 130*4882a593Smuzhiyun 131*4882a593SmuzhiyunPlatforms which support write-combining maps of PCI resources must define 132*4882a593Smuzhiyunarch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when 133*4882a593Smuzhiyunwrite-combining is permitted. Platforms which support maps of I/O resources 134*4882a593Smuzhiyundefine arch_can_pci_mmap_io() similarly. 135*4882a593Smuzhiyun 136*4882a593SmuzhiyunLegacy resources are protected by the HAVE_PCI_LEGACY define. Platforms 137*4882a593Smuzhiyunwishing to support legacy functionality should define it and provide 138*4882a593Smuzhiyunpci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions. 139