xref: /OK3568_Linux_fs/kernel/Documentation/PCI/pciebus-howto.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun.. include:: <isonum.txt>
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun===========================================
5*4882a593SmuzhiyunThe PCI Express Port Bus Driver Guide HOWTO
6*4882a593Smuzhiyun===========================================
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun:Author: Tom L Nguyen tom.l.nguyen@intel.com 11/03/2004
9*4882a593Smuzhiyun:Copyright: |copy| 2004 Intel Corporation
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunAbout this guide
12*4882a593Smuzhiyun================
13*4882a593Smuzhiyun
14*4882a593SmuzhiyunThis guide describes the basics of the PCI Express Port Bus driver
15*4882a593Smuzhiyunand provides information on how to enable the service drivers to
16*4882a593Smuzhiyunregister/unregister with the PCI Express Port Bus Driver.
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunWhat is the PCI Express Port Bus Driver
20*4882a593Smuzhiyun=======================================
21*4882a593Smuzhiyun
22*4882a593SmuzhiyunA PCI Express Port is a logical PCI-PCI Bridge structure. There
23*4882a593Smuzhiyunare two types of PCI Express Port: the Root Port and the Switch
24*4882a593SmuzhiyunPort. The Root Port originates a PCI Express link from a PCI Express
25*4882a593SmuzhiyunRoot Complex and the Switch Port connects PCI Express links to
26*4882a593Smuzhiyuninternal logical PCI buses. The Switch Port, which has its secondary
27*4882a593Smuzhiyunbus representing the switch's internal routing logic, is called the
28*4882a593Smuzhiyunswitch's Upstream Port. The switch's Downstream Port is bridging from
29*4882a593Smuzhiyunswitch's internal routing bus to a bus representing the downstream
30*4882a593SmuzhiyunPCI Express link from the PCI Express Switch.
31*4882a593Smuzhiyun
32*4882a593SmuzhiyunA PCI Express Port can provide up to four distinct functions,
33*4882a593Smuzhiyunreferred to in this document as services, depending on its port type.
34*4882a593SmuzhiyunPCI Express Port's services include native hotplug support (HP),
35*4882a593Smuzhiyunpower management event support (PME), advanced error reporting
36*4882a593Smuzhiyunsupport (AER), and virtual channel support (VC). These services may
37*4882a593Smuzhiyunbe handled by a single complex driver or be individually distributed
38*4882a593Smuzhiyunand handled by corresponding service drivers.
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunWhy use the PCI Express Port Bus Driver?
41*4882a593Smuzhiyun========================================
42*4882a593Smuzhiyun
43*4882a593SmuzhiyunIn existing Linux kernels, the Linux Device Driver Model allows a
44*4882a593Smuzhiyunphysical device to be handled by only a single driver. The PCI
45*4882a593SmuzhiyunExpress Port is a PCI-PCI Bridge device with multiple distinct
46*4882a593Smuzhiyunservices. To maintain a clean and simple solution each service
47*4882a593Smuzhiyunmay have its own software service driver. In this case several
48*4882a593Smuzhiyunservice drivers will compete for a single PCI-PCI Bridge device.
49*4882a593SmuzhiyunFor example, if the PCI Express Root Port native hotplug service
50*4882a593Smuzhiyundriver is loaded first, it claims a PCI-PCI Bridge Root Port. The
51*4882a593Smuzhiyunkernel therefore does not load other service drivers for that Root
52*4882a593SmuzhiyunPort. In other words, it is impossible to have multiple service
53*4882a593Smuzhiyundrivers load and run on a PCI-PCI Bridge device simultaneously
54*4882a593Smuzhiyunusing the current driver model.
55*4882a593Smuzhiyun
56*4882a593SmuzhiyunTo enable multiple service drivers running simultaneously requires
57*4882a593Smuzhiyunhaving a PCI Express Port Bus driver, which manages all populated
58*4882a593SmuzhiyunPCI Express Ports and distributes all provided service requests
59*4882a593Smuzhiyunto the corresponding service drivers as required. Some key
60*4882a593Smuzhiyunadvantages of using the PCI Express Port Bus driver are listed below:
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  - Allow multiple service drivers to run simultaneously on
63*4882a593Smuzhiyun    a PCI-PCI Bridge Port device.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  - Allow service drivers implemented in an independent
66*4882a593Smuzhiyun    staged approach.
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  - Allow one service driver to run on multiple PCI-PCI Bridge
69*4882a593Smuzhiyun    Port devices.
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun  - Manage and distribute resources of a PCI-PCI Bridge Port
72*4882a593Smuzhiyun    device to requested service drivers.
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunConfiguring the PCI Express Port Bus Driver vs. Service Drivers
75*4882a593Smuzhiyun===============================================================
76*4882a593Smuzhiyun
77*4882a593SmuzhiyunIncluding the PCI Express Port Bus Driver Support into the Kernel
78*4882a593Smuzhiyun-----------------------------------------------------------------
79*4882a593Smuzhiyun
80*4882a593SmuzhiyunIncluding the PCI Express Port Bus driver depends on whether the PCI
81*4882a593SmuzhiyunExpress support is included in the kernel config. The kernel will
82*4882a593Smuzhiyunautomatically include the PCI Express Port Bus driver as a kernel
83*4882a593Smuzhiyundriver when the PCI Express support is enabled in the kernel.
84*4882a593Smuzhiyun
85*4882a593SmuzhiyunEnabling Service Driver Support
86*4882a593Smuzhiyun-------------------------------
87*4882a593Smuzhiyun
88*4882a593SmuzhiyunPCI device drivers are implemented based on Linux Device Driver Model.
89*4882a593SmuzhiyunAll service drivers are PCI device drivers. As discussed above, it is
90*4882a593Smuzhiyunimpossible to load any service driver once the kernel has loaded the
91*4882a593SmuzhiyunPCI Express Port Bus Driver. To meet the PCI Express Port Bus Driver
92*4882a593SmuzhiyunModel requires some minimal changes on existing service drivers that
93*4882a593Smuzhiyunimposes no impact on the functionality of existing service drivers.
94*4882a593Smuzhiyun
95*4882a593SmuzhiyunA service driver is required to use the two APIs shown below to
96*4882a593Smuzhiyunregister its service with the PCI Express Port Bus driver (see
97*4882a593Smuzhiyunsection 5.2.1 & 5.2.2). It is important that a service driver
98*4882a593Smuzhiyuninitializes the pcie_port_service_driver data structure, included in
99*4882a593Smuzhiyunheader file /include/linux/pcieport_if.h, before calling these APIs.
100*4882a593SmuzhiyunFailure to do so will result an identity mismatch, which prevents
101*4882a593Smuzhiyunthe PCI Express Port Bus driver from loading a service driver.
102*4882a593Smuzhiyun
103*4882a593Smuzhiyunpcie_port_service_register
104*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~
105*4882a593Smuzhiyun::
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun  int pcie_port_service_register(struct pcie_port_service_driver *new)
108*4882a593Smuzhiyun
109*4882a593SmuzhiyunThis API replaces the Linux Driver Model's pci_register_driver API. A
110*4882a593Smuzhiyunservice driver should always calls pcie_port_service_register at
111*4882a593Smuzhiyunmodule init. Note that after service driver being loaded, calls
112*4882a593Smuzhiyunsuch as pci_enable_device(dev) and pci_set_master(dev) are no longer
113*4882a593Smuzhiyunnecessary since these calls are executed by the PCI Port Bus driver.
114*4882a593Smuzhiyun
115*4882a593Smuzhiyunpcie_port_service_unregister
116*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~
117*4882a593Smuzhiyun::
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun  void pcie_port_service_unregister(struct pcie_port_service_driver *new)
120*4882a593Smuzhiyun
121*4882a593Smuzhiyunpcie_port_service_unregister replaces the Linux Driver Model's
122*4882a593Smuzhiyunpci_unregister_driver. It's always called by service driver when a
123*4882a593Smuzhiyunmodule exits.
124*4882a593Smuzhiyun
125*4882a593SmuzhiyunSample Code
126*4882a593Smuzhiyun~~~~~~~~~~~
127*4882a593Smuzhiyun
128*4882a593SmuzhiyunBelow is sample service driver code to initialize the port service
129*4882a593Smuzhiyundriver data structure.
130*4882a593Smuzhiyun::
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun  static struct pcie_port_service_id service_id[] = { {
133*4882a593Smuzhiyun    .vendor = PCI_ANY_ID,
134*4882a593Smuzhiyun    .device = PCI_ANY_ID,
135*4882a593Smuzhiyun    .port_type = PCIE_RC_PORT,
136*4882a593Smuzhiyun    .service_type = PCIE_PORT_SERVICE_AER,
137*4882a593Smuzhiyun    }, { /* end: all zeroes */ }
138*4882a593Smuzhiyun  };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun  static struct pcie_port_service_driver root_aerdrv = {
141*4882a593Smuzhiyun    .name		= (char *)device_name,
142*4882a593Smuzhiyun    .id_table	= &service_id[0],
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun    .probe		= aerdrv_load,
145*4882a593Smuzhiyun    .remove		= aerdrv_unload,
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun    .suspend	= aerdrv_suspend,
148*4882a593Smuzhiyun    .resume		= aerdrv_resume,
149*4882a593Smuzhiyun  };
150*4882a593Smuzhiyun
151*4882a593SmuzhiyunBelow is a sample code for registering/unregistering a service
152*4882a593Smuzhiyundriver.
153*4882a593Smuzhiyun::
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun  static int __init aerdrv_service_init(void)
156*4882a593Smuzhiyun  {
157*4882a593Smuzhiyun    int retval = 0;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun    retval = pcie_port_service_register(&root_aerdrv);
160*4882a593Smuzhiyun    if (!retval) {
161*4882a593Smuzhiyun      /*
162*4882a593Smuzhiyun      * FIX ME
163*4882a593Smuzhiyun      */
164*4882a593Smuzhiyun    }
165*4882a593Smuzhiyun    return retval;
166*4882a593Smuzhiyun  }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun  static void __exit aerdrv_service_exit(void)
169*4882a593Smuzhiyun  {
170*4882a593Smuzhiyun    pcie_port_service_unregister(&root_aerdrv);
171*4882a593Smuzhiyun  }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun  module_init(aerdrv_service_init);
174*4882a593Smuzhiyun  module_exit(aerdrv_service_exit);
175*4882a593Smuzhiyun
176*4882a593SmuzhiyunPossible Resource Conflicts
177*4882a593Smuzhiyun===========================
178*4882a593Smuzhiyun
179*4882a593SmuzhiyunSince all service drivers of a PCI-PCI Bridge Port device are
180*4882a593Smuzhiyunallowed to run simultaneously, below lists a few of possible resource
181*4882a593Smuzhiyunconflicts with proposed solutions.
182*4882a593Smuzhiyun
183*4882a593SmuzhiyunMSI and MSI-X Vector Resource
184*4882a593Smuzhiyun-----------------------------
185*4882a593Smuzhiyun
186*4882a593SmuzhiyunOnce MSI or MSI-X interrupts are enabled on a device, it stays in this
187*4882a593Smuzhiyunmode until they are disabled again.  Since service drivers of the same
188*4882a593SmuzhiyunPCI-PCI Bridge port share the same physical device, if an individual
189*4882a593Smuzhiyunservice driver enables or disables MSI/MSI-X mode it may result
190*4882a593Smuzhiyununpredictable behavior.
191*4882a593Smuzhiyun
192*4882a593SmuzhiyunTo avoid this situation all service drivers are not permitted to
193*4882a593Smuzhiyunswitch interrupt mode on its device. The PCI Express Port Bus driver
194*4882a593Smuzhiyunis responsible for determining the interrupt mode and this should be
195*4882a593Smuzhiyuntransparent to service drivers. Service drivers need to know only
196*4882a593Smuzhiyunthe vector IRQ assigned to the field irq of struct pcie_device, which
197*4882a593Smuzhiyunis passed in when the PCI Express Port Bus driver probes each service
198*4882a593Smuzhiyundriver. Service drivers should use (struct pcie_device*)dev->irq to
199*4882a593Smuzhiyuncall request_irq/free_irq. In addition, the interrupt mode is stored
200*4882a593Smuzhiyunin the field interrupt_mode of struct pcie_device.
201*4882a593Smuzhiyun
202*4882a593SmuzhiyunPCI Memory/IO Mapped Regions
203*4882a593Smuzhiyun----------------------------
204*4882a593Smuzhiyun
205*4882a593SmuzhiyunService drivers for PCI Express Power Management (PME), Advanced
206*4882a593SmuzhiyunError Reporting (AER), Hot-Plug (HP) and Virtual Channel (VC) access
207*4882a593SmuzhiyunPCI configuration space on the PCI Express port. In all cases the
208*4882a593Smuzhiyunregisters accessed are independent of each other. This patch assumes
209*4882a593Smuzhiyunthat all service drivers will be well behaved and not overwrite
210*4882a593Smuzhiyunother service driver's configuration settings.
211*4882a593Smuzhiyun
212*4882a593SmuzhiyunPCI Config Registers
213*4882a593Smuzhiyun--------------------
214*4882a593Smuzhiyun
215*4882a593SmuzhiyunEach service driver runs its PCI config operations on its own
216*4882a593Smuzhiyuncapability structure except the PCI Express capability structure, in
217*4882a593Smuzhiyunwhich Root Control register and Device Control register are shared
218*4882a593Smuzhiyunbetween PME and AER. This patch assumes that all service drivers
219*4882a593Smuzhiyunwill be well behaved and not overwrite other service driver's
220*4882a593Smuzhiyunconfiguration settings.
221