xref: /OK3568_Linux_fs/kernel/Documentation/ABI/testing/sysfs-driver-habanalabs (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/armcp_kernel_ver
2*4882a593SmuzhiyunDate:           Jan 2019
3*4882a593SmuzhiyunKernelVersion:  5.1
4*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
5*4882a593SmuzhiyunDescription:    Version of the Linux kernel running on the device's CPU.
6*4882a593Smuzhiyun                Will be DEPRECATED in Linux kernel version 5.10, and be
7*4882a593Smuzhiyun                replaced with cpucp_kernel_ver
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/armcp_ver
10*4882a593SmuzhiyunDate:           Jan 2019
11*4882a593SmuzhiyunKernelVersion:  5.1
12*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
13*4882a593SmuzhiyunDescription:    Version of the application running on the device's CPU
14*4882a593Smuzhiyun                Will be DEPRECATED in Linux kernel version 5.10, and be
15*4882a593Smuzhiyun                replaced with cpucp_ver
16*4882a593Smuzhiyun
17*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/clk_max_freq_mhz
18*4882a593SmuzhiyunDate:           Jun 2019
19*4882a593SmuzhiyunKernelVersion:  not yet upstreamed
20*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
21*4882a593SmuzhiyunDescription:    Allows the user to set the maximum clock frequency, in MHz.
22*4882a593Smuzhiyun                The device clock might be set to lower value than the maximum.
23*4882a593Smuzhiyun                The user should read the clk_cur_freq_mhz to see the actual
24*4882a593Smuzhiyun                frequency value of the device clock. This property is valid
25*4882a593Smuzhiyun                only for the Gaudi ASIC family
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/clk_cur_freq_mhz
28*4882a593SmuzhiyunDate:           Jun 2019
29*4882a593SmuzhiyunKernelVersion:  not yet upstreamed
30*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
31*4882a593SmuzhiyunDescription:    Displays the current frequency, in MHz, of the device clock.
32*4882a593Smuzhiyun                This property is valid only for the Gaudi ASIC family
33*4882a593Smuzhiyun
34*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/cpld_ver
35*4882a593SmuzhiyunDate:           Jan 2019
36*4882a593SmuzhiyunKernelVersion:  5.1
37*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
38*4882a593SmuzhiyunDescription:    Version of the Device's CPLD F/W
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/cpucp_kernel_ver
41*4882a593SmuzhiyunDate:           Oct 2020
42*4882a593SmuzhiyunKernelVersion:  5.10
43*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
44*4882a593SmuzhiyunDescription:    Version of the Linux kernel running on the device's CPU
45*4882a593Smuzhiyun
46*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/cpucp_ver
47*4882a593SmuzhiyunDate:           Oct 2020
48*4882a593SmuzhiyunKernelVersion:  5.10
49*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
50*4882a593SmuzhiyunDescription:    Version of the application running on the device's CPU
51*4882a593Smuzhiyun
52*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/device_type
53*4882a593SmuzhiyunDate:           Jan 2019
54*4882a593SmuzhiyunKernelVersion:  5.1
55*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
56*4882a593SmuzhiyunDescription:    Displays the code name of the device according to its type.
57*4882a593Smuzhiyun                The supported values are: "GOYA"
58*4882a593Smuzhiyun
59*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/eeprom
60*4882a593SmuzhiyunDate:           Jan 2019
61*4882a593SmuzhiyunKernelVersion:  5.1
62*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
63*4882a593SmuzhiyunDescription:    A binary file attribute that contains the contents of the
64*4882a593Smuzhiyun                on-board EEPROM
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/fuse_ver
67*4882a593SmuzhiyunDate:           Jan 2019
68*4882a593SmuzhiyunKernelVersion:  5.1
69*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
70*4882a593SmuzhiyunDescription:    Displays the device's version from the eFuse
71*4882a593Smuzhiyun
72*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/hard_reset
73*4882a593SmuzhiyunDate:           Jan 2019
74*4882a593SmuzhiyunKernelVersion:  5.1
75*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
76*4882a593SmuzhiyunDescription:    Interface to trigger a hard-reset operation for the device.
77*4882a593Smuzhiyun                Hard-reset will reset ALL internal components of the device
78*4882a593Smuzhiyun                except for the PCI interface and the internal PLLs
79*4882a593Smuzhiyun
80*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/hard_reset_cnt
81*4882a593SmuzhiyunDate:           Jan 2019
82*4882a593SmuzhiyunKernelVersion:  5.1
83*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
84*4882a593SmuzhiyunDescription:    Displays how many times the device have undergone a hard-reset
85*4882a593Smuzhiyun                operation since the driver was loaded
86*4882a593Smuzhiyun
87*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/high_pll
88*4882a593SmuzhiyunDate:           Jan 2019
89*4882a593SmuzhiyunKernelVersion:  5.1
90*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
91*4882a593SmuzhiyunDescription:    Allows the user to set the maximum clock frequency for MME, TPC
92*4882a593Smuzhiyun                and IC when the power management profile is set to "automatic".
93*4882a593Smuzhiyun                This property is valid only for the Goya ASIC family
94*4882a593Smuzhiyun
95*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/ic_clk
96*4882a593SmuzhiyunDate:           Jan 2019
97*4882a593SmuzhiyunKernelVersion:  5.1
98*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
99*4882a593SmuzhiyunDescription:    Allows the user to set the maximum clock frequency, in Hz, of
100*4882a593Smuzhiyun                the Interconnect fabric. Writes to this parameter affect the
101*4882a593Smuzhiyun                device only when the power management profile is set to "manual"
102*4882a593Smuzhiyun                mode. The device IC clock might be set to lower value than the
103*4882a593Smuzhiyun                maximum. The user should read the ic_clk_curr to see the actual
104*4882a593Smuzhiyun                frequency value of the IC. This property is valid only for the
105*4882a593Smuzhiyun                Goya ASIC family
106*4882a593Smuzhiyun
107*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/ic_clk_curr
108*4882a593SmuzhiyunDate:           Jan 2019
109*4882a593SmuzhiyunKernelVersion:  5.1
110*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
111*4882a593SmuzhiyunDescription:    Displays the current clock frequency, in Hz, of the Interconnect
112*4882a593Smuzhiyun                fabric. This property is valid only for the Goya ASIC family
113*4882a593Smuzhiyun
114*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/infineon_ver
115*4882a593SmuzhiyunDate:           Jan 2019
116*4882a593SmuzhiyunKernelVersion:  5.1
117*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
118*4882a593SmuzhiyunDescription:    Version of the Device's power supply F/W code
119*4882a593Smuzhiyun
120*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/max_power
121*4882a593SmuzhiyunDate:           Jan 2019
122*4882a593SmuzhiyunKernelVersion:  5.1
123*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
124*4882a593SmuzhiyunDescription:    Allows the user to set the maximum power consumption of the
125*4882a593Smuzhiyun                device in milliwatts.
126*4882a593Smuzhiyun
127*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/mme_clk
128*4882a593SmuzhiyunDate:           Jan 2019
129*4882a593SmuzhiyunKernelVersion:  5.1
130*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
131*4882a593SmuzhiyunDescription:    Allows the user to set the maximum clock frequency, in Hz, of
132*4882a593Smuzhiyun                the MME compute engine. Writes to this parameter affect the
133*4882a593Smuzhiyun                device only when the power management profile is set to "manual"
134*4882a593Smuzhiyun                mode. The device MME clock might be set to lower value than the
135*4882a593Smuzhiyun                maximum. The user should read the mme_clk_curr to see the actual
136*4882a593Smuzhiyun                frequency value of the MME. This property is valid only for the
137*4882a593Smuzhiyun                Goya ASIC family
138*4882a593Smuzhiyun
139*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/mme_clk_curr
140*4882a593SmuzhiyunDate:           Jan 2019
141*4882a593SmuzhiyunKernelVersion:  5.1
142*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
143*4882a593SmuzhiyunDescription:    Displays the current clock frequency, in Hz, of the MME compute
144*4882a593Smuzhiyun                engine. This property is valid only for the Goya ASIC family
145*4882a593Smuzhiyun
146*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/pci_addr
147*4882a593SmuzhiyunDate:           Jan 2019
148*4882a593SmuzhiyunKernelVersion:  5.1
149*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
150*4882a593SmuzhiyunDescription:    Displays the PCI address of the device. This is needed so the
151*4882a593Smuzhiyun                user would be able to open a device based on its PCI address
152*4882a593Smuzhiyun
153*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/pm_mng_profile
154*4882a593SmuzhiyunDate:           Jan 2019
155*4882a593SmuzhiyunKernelVersion:  5.1
156*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
157*4882a593SmuzhiyunDescription:    Power management profile. Values are "auto", "manual". In "auto"
158*4882a593Smuzhiyun                mode, the driver will set the maximum clock frequency to a high
159*4882a593Smuzhiyun                value when a user-space process opens the device's file (unless
160*4882a593Smuzhiyun                it was already opened by another process). The driver will set
161*4882a593Smuzhiyun                the max clock frequency to a low value when there are no user
162*4882a593Smuzhiyun                processes that are opened on the device's file. In "manual"
163*4882a593Smuzhiyun                mode, the user sets the maximum clock frequency by writing to
164*4882a593Smuzhiyun                ic_clk, mme_clk and tpc_clk. This property is valid only for
165*4882a593Smuzhiyun                the Goya ASIC family
166*4882a593Smuzhiyun
167*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/preboot_btl_ver
168*4882a593SmuzhiyunDate:           Jan 2019
169*4882a593SmuzhiyunKernelVersion:  5.1
170*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
171*4882a593SmuzhiyunDescription:    Version of the device's preboot F/W code
172*4882a593Smuzhiyun
173*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/soft_reset
174*4882a593SmuzhiyunDate:           Jan 2019
175*4882a593SmuzhiyunKernelVersion:  5.1
176*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
177*4882a593SmuzhiyunDescription:    Interface to trigger a soft-reset operation for the device.
178*4882a593Smuzhiyun                Soft-reset will reset only the compute and DMA engines of the
179*4882a593Smuzhiyun                device
180*4882a593Smuzhiyun
181*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/soft_reset_cnt
182*4882a593SmuzhiyunDate:           Jan 2019
183*4882a593SmuzhiyunKernelVersion:  5.1
184*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
185*4882a593SmuzhiyunDescription:    Displays how many times the device have undergone a soft-reset
186*4882a593Smuzhiyun                operation since the driver was loaded
187*4882a593Smuzhiyun
188*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/status
189*4882a593SmuzhiyunDate:           Jan 2019
190*4882a593SmuzhiyunKernelVersion:  5.1
191*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
192*4882a593SmuzhiyunDescription:    Status of the card: "Operational", "Malfunction", "In reset".
193*4882a593Smuzhiyun
194*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/thermal_ver
195*4882a593SmuzhiyunDate:           Jan 2019
196*4882a593SmuzhiyunKernelVersion:  5.1
197*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
198*4882a593SmuzhiyunDescription:    Version of the Device's thermal daemon
199*4882a593Smuzhiyun
200*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/tpc_clk
201*4882a593SmuzhiyunDate:           Jan 2019
202*4882a593SmuzhiyunKernelVersion:  5.1
203*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
204*4882a593SmuzhiyunDescription:    Allows the user to set the maximum clock frequency, in Hz, of
205*4882a593Smuzhiyun                the TPC compute engines. Writes to this parameter affect the
206*4882a593Smuzhiyun                device only when the power management profile is set to "manual"
207*4882a593Smuzhiyun                mode. The device TPC clock might be set to lower value than the
208*4882a593Smuzhiyun                maximum. The user should read the tpc_clk_curr to see the actual
209*4882a593Smuzhiyun                frequency value of the TPC. This property is valid only for
210*4882a593Smuzhiyun                Goya ASIC family
211*4882a593Smuzhiyun
212*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/tpc_clk_curr
213*4882a593SmuzhiyunDate:           Jan 2019
214*4882a593SmuzhiyunKernelVersion:  5.1
215*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
216*4882a593SmuzhiyunDescription:    Displays the current clock frequency, in Hz, of the TPC compute
217*4882a593Smuzhiyun                engines. This property is valid only for the Goya ASIC family
218*4882a593Smuzhiyun
219*4882a593SmuzhiyunWhat:           /sys/class/habanalabs/hl<n>/uboot_ver
220*4882a593SmuzhiyunDate:           Jan 2019
221*4882a593SmuzhiyunKernelVersion:  5.1
222*4882a593SmuzhiyunContact:        oded.gabbay@gmail.com
223*4882a593SmuzhiyunDescription:    Version of the u-boot running on the device's CPU