1*4882a593SmuzhiyunWhat: /sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode 2*4882a593SmuzhiyunDate: Jul 2018 3*4882a593SmuzhiyunKernelVersion: 4.19 4*4882a593SmuzhiyunContact: Geert Uytterhoeven <geert+renesas@glider.be> 5*4882a593SmuzhiyunDescription: Read/write the current state of DDR Backup Mode, which controls 6*4882a593Smuzhiyun if DDR power rails will be kept powered during system suspend. 7*4882a593Smuzhiyun ("on"/"1" = enabled, "off"/"0" = disabled). 8*4882a593Smuzhiyun Two types of power switches (or control signals) can be used: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun A. With a momentary power switch (or pulse signal), DDR 11*4882a593Smuzhiyun Backup Mode is enabled by default when available, as the 12*4882a593Smuzhiyun PMIC will be configured only during system suspend. 13*4882a593Smuzhiyun B. With a toggle power switch (or level signal), the 14*4882a593Smuzhiyun following steps must be followed exactly: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun 1. Configure PMIC for backup mode, to change the role of 17*4882a593Smuzhiyun the accessory power switch from a power switch to a 18*4882a593Smuzhiyun wake-up switch, 19*4882a593Smuzhiyun 2. Switch accessory power switch off, to prepare for 20*4882a593Smuzhiyun system suspend, which is a manual step not controlled 21*4882a593Smuzhiyun by software, 22*4882a593Smuzhiyun 3. Suspend system, 23*4882a593Smuzhiyun 4. Switch accessory power switch on, to resume the 24*4882a593Smuzhiyun system. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun DDR Backup Mode must be explicitly enabled by the user, 27*4882a593Smuzhiyun to invoke step 1. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt. 30*4882a593SmuzhiyunUsers: User space applications for embedded boards equipped with a 31*4882a593Smuzhiyun BD9571MWV PMIC. 32