1*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/triggerX/master_mode_available 2*4882a593SmuzhiyunKernelVersion: 4.11 3*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 4*4882a593SmuzhiyunDescription: 5*4882a593Smuzhiyun Reading returns the list possible master modes which are: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun - "reset" 9*4882a593Smuzhiyun The UG bit from the TIMx_EGR register is 10*4882a593Smuzhiyun used as trigger output (TRGO). 11*4882a593Smuzhiyun - "enable" 12*4882a593Smuzhiyun The Counter Enable signal CNT_EN is used 13*4882a593Smuzhiyun as trigger output. 14*4882a593Smuzhiyun - "update" 15*4882a593Smuzhiyun The update event is selected as trigger output. 16*4882a593Smuzhiyun For instance a master timer can then be used 17*4882a593Smuzhiyun as a prescaler for a slave timer. 18*4882a593Smuzhiyun - "compare_pulse" 19*4882a593Smuzhiyun The trigger output send a positive pulse 20*4882a593Smuzhiyun when the CC1IF flag is to be set. 21*4882a593Smuzhiyun - "OC1REF" 22*4882a593Smuzhiyun OC1REF signal is used as trigger output. 23*4882a593Smuzhiyun - "OC2REF" 24*4882a593Smuzhiyun OC2REF signal is used as trigger output. 25*4882a593Smuzhiyun - "OC3REF" 26*4882a593Smuzhiyun OC3REF signal is used as trigger output. 27*4882a593Smuzhiyun - "OC4REF" 28*4882a593Smuzhiyun OC4REF signal is used as trigger output. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun Additional modes (on TRGO2 only): 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun - "OC5REF" 33*4882a593Smuzhiyun OC5REF signal is used as trigger output. 34*4882a593Smuzhiyun - "OC6REF" 35*4882a593Smuzhiyun OC6REF signal is used as trigger output. 36*4882a593Smuzhiyun - "compare_pulse_OC4REF": 37*4882a593Smuzhiyun OC4REF rising or falling edges generate pulses. 38*4882a593Smuzhiyun - "compare_pulse_OC6REF": 39*4882a593Smuzhiyun OC6REF rising or falling edges generate pulses. 40*4882a593Smuzhiyun - "compare_pulse_OC4REF_r_or_OC6REF_r": 41*4882a593Smuzhiyun OC4REF or OC6REF rising edges generate pulses. 42*4882a593Smuzhiyun - "compare_pulse_OC4REF_r_or_OC6REF_f": 43*4882a593Smuzhiyun OC4REF rising or OC6REF falling edges generate 44*4882a593Smuzhiyun pulses. 45*4882a593Smuzhiyun - "compare_pulse_OC5REF_r_or_OC6REF_r": 46*4882a593Smuzhiyun OC5REF or OC6REF rising edges generate pulses. 47*4882a593Smuzhiyun - "compare_pulse_OC5REF_r_or_OC6REF_f": 48*4882a593Smuzhiyun OC5REF rising or OC6REF falling edges generate 49*4882a593Smuzhiyun pulses. 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun :: 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun +-----------+ +-------------+ +---------+ 54*4882a593Smuzhiyun | Prescaler +-> | Counter | +-> | Master | TRGO(2) 55*4882a593Smuzhiyun +-----------+ +--+--------+-+ |-> | Control +--> 56*4882a593Smuzhiyun | | || +---------+ 57*4882a593Smuzhiyun +--v--------+-+ OCxREF || +---------+ 58*4882a593Smuzhiyun | Chx compare +----------> | Output | ChX 59*4882a593Smuzhiyun +-----------+-+ | | Control +--> 60*4882a593Smuzhiyun . | | +---------+ 61*4882a593Smuzhiyun . | | . 62*4882a593Smuzhiyun +-----------v-+ OC6REF | . 63*4882a593Smuzhiyun | Ch6 compare +---------+> 64*4882a593Smuzhiyun +-------------+ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun Example with: "compare_pulse_OC4REF_r_or_OC6REF_r":: 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun X 69*4882a593Smuzhiyun X X 70*4882a593Smuzhiyun X . . X 71*4882a593Smuzhiyun X . . X 72*4882a593Smuzhiyun X . . X 73*4882a593Smuzhiyun count X . . . . X 74*4882a593Smuzhiyun . . . . 75*4882a593Smuzhiyun . . . . 76*4882a593Smuzhiyun +---------------+ 77*4882a593Smuzhiyun OC4REF | . . | 78*4882a593Smuzhiyun +-+ . . +-+ 79*4882a593Smuzhiyun . +---+ . 80*4882a593Smuzhiyun OC6REF . | | . 81*4882a593Smuzhiyun +-------+ +-------+ 82*4882a593Smuzhiyun +-+ +-+ 83*4882a593Smuzhiyun TRGO2 | | | | 84*4882a593Smuzhiyun +-+ +---+ +---------+ 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/triggerX/master_mode 87*4882a593SmuzhiyunKernelVersion: 4.11 88*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 89*4882a593SmuzhiyunDescription: 90*4882a593Smuzhiyun Reading returns the current master modes. 91*4882a593Smuzhiyun Writing set the master mode 92*4882a593Smuzhiyun 93*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/triggerX/sampling_frequency 94*4882a593SmuzhiyunKernelVersion: 4.11 95*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 96*4882a593SmuzhiyunDescription: 97*4882a593Smuzhiyun Reading returns the current sampling frequency. 98*4882a593Smuzhiyun Writing an value different of 0 set and start sampling. 99*4882a593Smuzhiyun Writing 0 stop sampling. 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/iio:deviceX/in_count0_preset 102*4882a593SmuzhiyunKernelVersion: 4.12 103*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 104*4882a593SmuzhiyunDescription: 105*4882a593Smuzhiyun Reading returns the current preset value. 106*4882a593Smuzhiyun Writing sets the preset value. 107*4882a593Smuzhiyun When counting up the counter starts from 0 and fires an 108*4882a593Smuzhiyun event when reach preset value. 109*4882a593Smuzhiyun When counting down the counter start from preset value 110*4882a593Smuzhiyun and fire event when reach 0. 111*4882a593Smuzhiyun 112*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available 113*4882a593SmuzhiyunKernelVersion: 4.12 114*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 115*4882a593SmuzhiyunDescription: 116*4882a593Smuzhiyun Reading returns the list possible enable modes. 117*4882a593Smuzhiyun 118*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/iio:deviceX/in_count0_enable_mode 119*4882a593SmuzhiyunKernelVersion: 4.12 120*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 121*4882a593SmuzhiyunDescription: 122*4882a593Smuzhiyun Configure the device counter enable modes, in all case 123*4882a593Smuzhiyun counting direction is set by in_count0_count_direction 124*4882a593Smuzhiyun attribute and the counter is clocked by the internal clock. 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun always: 127*4882a593Smuzhiyun Counter is always ON. 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun gated: 130*4882a593Smuzhiyun Counting is enabled when connected trigger signal 131*4882a593Smuzhiyun level is high else counting is disabled. 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun triggered: 134*4882a593Smuzhiyun Counting is enabled on rising edge of the connected 135*4882a593Smuzhiyun trigger, and remains enabled for the duration of this 136*4882a593Smuzhiyun selected mode. 137*4882a593Smuzhiyun 138*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/iio:deviceX/in_count_trigger_mode_available 139*4882a593SmuzhiyunKernelVersion: 4.13 140*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 141*4882a593SmuzhiyunDescription: 142*4882a593Smuzhiyun Reading returns the list possible trigger modes. 143*4882a593Smuzhiyun 144*4882a593SmuzhiyunWhat: /sys/bus/iio/devices/iio:deviceX/in_count0_trigger_mode 145*4882a593SmuzhiyunKernelVersion: 4.13 146*4882a593SmuzhiyunContact: benjamin.gaignard@st.com 147*4882a593SmuzhiyunDescription: 148*4882a593Smuzhiyun Configure the device counter trigger mode 149*4882a593Smuzhiyun counting direction is set by in_count0_count_direction 150*4882a593Smuzhiyun attribute and the counter is clocked by the connected trigger 151*4882a593Smuzhiyun rising edges. 152