1*4882a593SmuzhiyunWhat: /sys/kernel/debug/moxtet/input 2*4882a593SmuzhiyunDate: March 2019 3*4882a593SmuzhiyunKernelVersion: 5.3 4*4882a593SmuzhiyunContact: Marek Behún <marek.behun@nic.cz> 5*4882a593SmuzhiyunDescription: (Read) Read input from the shift registers, in hexadecimal. 6*4882a593Smuzhiyun Returns N+1 bytes, where N is the number of Moxtet connected 7*4882a593Smuzhiyun modules. The first byte is from the CPU board itself. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun Example:: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 101214 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun == ======================================= 14*4882a593Smuzhiyun 10 CPU board with SD card 15*4882a593Smuzhiyun 12 2 = PCIe module, 1 = IRQ not active 16*4882a593Smuzhiyun 14 4 = Peridot module, 1 = IRQ not active 17*4882a593Smuzhiyun == ======================================= 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunWhat: /sys/kernel/debug/moxtet/output 20*4882a593SmuzhiyunDate: March 2019 21*4882a593SmuzhiyunKernelVersion: 5.3 22*4882a593SmuzhiyunContact: Marek Behún <marek.behun@nic.cz> 23*4882a593SmuzhiyunDescription: (RW) Read last written value to the shift registers, in 24*4882a593Smuzhiyun hexadecimal, or write values to the shift registers, also 25*4882a593Smuzhiyun in hexadecimal. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun Example:: 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 0102 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun == ================================================ 32*4882a593Smuzhiyun 01 01 was last written, or is to be written, to the 33*4882a593Smuzhiyun first module's shift register 34*4882a593Smuzhiyun 02 the same for second module 35*4882a593Smuzhiyun == ================================================ 36