1*4882a593SmuzhiyunWhat: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address 2*4882a593SmuzhiyunDate: April 2017 3*4882a593SmuzhiyunContact: Jeremy Kerr <jk@ozlabs.org> 4*4882a593SmuzhiyunDescription: Configures which IO port the host side of the UART 5*4882a593Smuzhiyun will appear on the host <-> BMC LPC bus. 6*4882a593SmuzhiyunUsers: OpenBMC. Proposed changes should be mailed to 7*4882a593Smuzhiyun openbmc@lists.ozlabs.org 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunWhat: /sys/bus/platform/drivers/aspeed-vuart/*/sirq 10*4882a593SmuzhiyunDate: April 2017 11*4882a593SmuzhiyunContact: Jeremy Kerr <jk@ozlabs.org> 12*4882a593SmuzhiyunDescription: Configures which interrupt number the host side of 13*4882a593Smuzhiyun the UART will appear on the host <-> BMC LPC bus. 14*4882a593SmuzhiyunUsers: OpenBMC. Proposed changes should be mailed to 15*4882a593Smuzhiyun openbmc@lists.ozlabs.org 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunWhat: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity 18*4882a593SmuzhiyunDate: July 2019 19*4882a593SmuzhiyunContact: Oskar Senft <osk@google.com> 20*4882a593SmuzhiyunDescription: Configures the polarity of the serial interrupt to the 21*4882a593Smuzhiyun host via the BMC LPC bus. 22*4882a593Smuzhiyun Set to 0 for active-low or 1 for active-high. 23*4882a593SmuzhiyunUsers: OpenBMC. Proposed changes should be mailed to 24*4882a593Smuzhiyun openbmc@lists.ozlabs.org 25