1*4882a593SmuzhiyunWhat: /sys/devices/system/cpu/dscr_default 2*4882a593SmuzhiyunDate: 13-May-2014 3*4882a593SmuzhiyunKernelVersion: v3.15.0 4*4882a593SmuzhiyunContact: 5*4882a593SmuzhiyunDescription: Writes are equivalent to writing to 6*4882a593Smuzhiyun /sys/devices/system/cpu/cpuN/dscr on all CPUs. 7*4882a593Smuzhiyun Reads return the last written value or 0. 8*4882a593Smuzhiyun This value is not a global default: it is a way to set 9*4882a593Smuzhiyun all per-CPU defaults at the same time. 10*4882a593SmuzhiyunValues: 64 bit unsigned integer (bit field) 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunWhat: /sys/devices/system/cpu/cpu[0-9]+/dscr 13*4882a593SmuzhiyunDate: 13-May-2014 14*4882a593SmuzhiyunKernelVersion: v3.15.0 15*4882a593SmuzhiyunContact: 16*4882a593SmuzhiyunDescription: Default value for the Data Stream Control Register (DSCR) on 17*4882a593Smuzhiyun a CPU. 18*4882a593Smuzhiyun This default value is used when the kernel is executing and 19*4882a593Smuzhiyun for any process that has not set the DSCR itself. 20*4882a593Smuzhiyun If a process ever sets the DSCR (via direct access to the 21*4882a593Smuzhiyun SPR) that value will be persisted for that process and used 22*4882a593Smuzhiyun on any CPU where it executes (overriding the value described 23*4882a593Smuzhiyun here). 24*4882a593Smuzhiyun If set by a process it will be inherited by child processes. 25*4882a593SmuzhiyunValues: 64 bit unsigned integer (bit field) 26