xref: /OK3568_Linux_fs/external/xserver/hw/xfree86/modes/xf86EdidModes.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2006 Luc Verhaegen.
3*4882a593Smuzhiyun  * Copyright 2008 Red Hat, Inc.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sub license,
9*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the
13*4882a593Smuzhiyun  * next paragraph) shall be included in all copies or substantial portions
14*4882a593Smuzhiyun  * of the Software.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19*4882a593Smuzhiyun  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20*4882a593Smuzhiyun  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21*4882a593Smuzhiyun  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22*4882a593Smuzhiyun  * DEALINGS IN THE SOFTWARE.
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /**
26*4882a593Smuzhiyun  * @file This file covers code to convert a xf86MonPtr containing EDID-probed
27*4882a593Smuzhiyun  * information into a list of modes, including applying monitor-specific
28*4882a593Smuzhiyun  * quirks to fix broken EDID data.
29*4882a593Smuzhiyun  */
30*4882a593Smuzhiyun #ifdef HAVE_XORG_CONFIG_H
31*4882a593Smuzhiyun #include <xorg-config.h>
32*4882a593Smuzhiyun #endif
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define _PARSE_EDID_
35*4882a593Smuzhiyun #include "xf86.h"
36*4882a593Smuzhiyun #include "xf86DDC.h"
37*4882a593Smuzhiyun #include <X11/Xatom.h>
38*4882a593Smuzhiyun #include "property.h"
39*4882a593Smuzhiyun #include "propertyst.h"
40*4882a593Smuzhiyun #include "xf86Crtc.h"
41*4882a593Smuzhiyun #include <string.h>
42*4882a593Smuzhiyun #include <math.h>
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static void
handle_detailed_rblank(struct detailed_monitor_section * det_mon,void * data)45*4882a593Smuzhiyun handle_detailed_rblank(struct detailed_monitor_section *det_mon, void *data)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun     if (det_mon->type == DS_RANGES)
48*4882a593Smuzhiyun         if (det_mon->section.ranges.supported_blanking & CVT_REDUCED)
49*4882a593Smuzhiyun             *(Bool *) data = TRUE;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static Bool
xf86MonitorSupportsReducedBlanking(xf86MonPtr DDC)53*4882a593Smuzhiyun xf86MonitorSupportsReducedBlanking(xf86MonPtr DDC)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun     /* EDID 1.4 explicitly defines RB support */
56*4882a593Smuzhiyun     if (DDC->ver.revision >= 4) {
57*4882a593Smuzhiyun         Bool ret = FALSE;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun         xf86ForEachDetailedBlock(DDC, handle_detailed_rblank, &ret);
60*4882a593Smuzhiyun         return ret;
61*4882a593Smuzhiyun     }
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun     /* For anything older, assume digital means RB support. Boo. */
64*4882a593Smuzhiyun     if (DDC->features.input_type)
65*4882a593Smuzhiyun         return TRUE;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun     return FALSE;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static Bool
quirk_prefer_large_60(int scrnIndex,xf86MonPtr DDC)71*4882a593Smuzhiyun quirk_prefer_large_60(int scrnIndex, xf86MonPtr DDC)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun     /* Belinea 10 15 55 */
74*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "MAX", 4) == 0 &&
75*4882a593Smuzhiyun         ((DDC->vendor.prod_id == 1516) || (DDC->vendor.prod_id == 0x77e)))
76*4882a593Smuzhiyun         return TRUE;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun     /* Acer AL1706 */
79*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "ACR", 4) == 0 && DDC->vendor.prod_id == 44358)
80*4882a593Smuzhiyun         return TRUE;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun     /* Bug #10814: Samsung SyncMaster 225BW */
83*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 596)
84*4882a593Smuzhiyun         return TRUE;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun     /* Bug #10545: Samsung SyncMaster 226BW */
87*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 638)
88*4882a593Smuzhiyun         return TRUE;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun     /* Acer F51 */
91*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "API", 4) == 0 &&
92*4882a593Smuzhiyun         DDC->vendor.prod_id == 0x7602)
93*4882a593Smuzhiyun         return TRUE;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun     return FALSE;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static Bool
quirk_prefer_large_75(int scrnIndex,xf86MonPtr DDC)99*4882a593Smuzhiyun quirk_prefer_large_75(int scrnIndex, xf86MonPtr DDC)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun     /* Bug #11603: Funai Electronics PM36B */
102*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
103*4882a593Smuzhiyun         return TRUE;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun     return FALSE;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static Bool
quirk_detailed_h_in_cm(int scrnIndex,xf86MonPtr DDC)109*4882a593Smuzhiyun quirk_detailed_h_in_cm(int scrnIndex, xf86MonPtr DDC)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun     /* Bug #11603: Funai Electronics PM36B */
112*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
113*4882a593Smuzhiyun         return TRUE;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun     return FALSE;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static Bool
quirk_detailed_v_in_cm(int scrnIndex,xf86MonPtr DDC)119*4882a593Smuzhiyun quirk_detailed_v_in_cm(int scrnIndex, xf86MonPtr DDC)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun     /* Bug #11603: Funai Electronics PM36B */
122*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "FCM", 4) == 0 && DDC->vendor.prod_id == 13600)
123*4882a593Smuzhiyun         return TRUE;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun     /* Bug #21000: LGPhilipsLCD LP154W01-TLAJ */
126*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 47360)
127*4882a593Smuzhiyun         return TRUE;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun     /* Bug #10304: LGPhilipsLCD LP154W01-A5 */
130*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 0)
131*4882a593Smuzhiyun         return TRUE;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun     /* Bug #24482: LGPhilipsLCD LP154W01-TLA1 */
134*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "LPL", 4) == 0 &&
135*4882a593Smuzhiyun         DDC->vendor.prod_id == 0x2a00)
136*4882a593Smuzhiyun         return TRUE;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun     /* Bug #28414: HP Compaq NC8430 LP154W01-TLA8 */
139*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "LPL", 4) == 0 && DDC->vendor.prod_id == 5750)
140*4882a593Smuzhiyun         return TRUE;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun     /* Bug #21750: Samsung Syncmaster 2333HD */
143*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 1157)
144*4882a593Smuzhiyun         return TRUE;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun     return FALSE;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static Bool
quirk_detailed_use_maximum_size(int scrnIndex,xf86MonPtr DDC)150*4882a593Smuzhiyun quirk_detailed_use_maximum_size(int scrnIndex, xf86MonPtr DDC)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun     /* ADA 1024x600 7" display */
153*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "ADA", 4) == 0 &&
154*4882a593Smuzhiyun         DDC->vendor.prod_id == 4)
155*4882a593Smuzhiyun         return TRUE;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun     /* Bug #21324: Iiyama Vision Master 450 */
158*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "IVM", 4) == 0 && DDC->vendor.prod_id == 6400)
159*4882a593Smuzhiyun         return TRUE;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun     /* Bug #41141: Acer Aspire One */
162*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "LGD", 4) == 0 &&
163*4882a593Smuzhiyun         DDC->vendor.prod_id == 0x7f01)
164*4882a593Smuzhiyun         return TRUE;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun     /* Sony Vaio Pro 13 */
167*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "MEI", 4) == 0 &&
168*4882a593Smuzhiyun         DDC->vendor.prod_id == 0x96a2)
169*4882a593Smuzhiyun         return TRUE;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun     return FALSE;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static Bool
quirk_135_clock_too_high(int scrnIndex,xf86MonPtr DDC)175*4882a593Smuzhiyun quirk_135_clock_too_high(int scrnIndex, xf86MonPtr DDC)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun     /* Envision Peripherals, Inc. EN-7100e.  See bug #9550. */
178*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "EPI", 4) == 0 && DDC->vendor.prod_id == 59264)
179*4882a593Smuzhiyun         return TRUE;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun     return FALSE;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun static Bool
quirk_first_detailed_preferred(int scrnIndex,xf86MonPtr DDC)185*4882a593Smuzhiyun quirk_first_detailed_preferred(int scrnIndex, xf86MonPtr DDC)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun     /* Philips 107p5 CRT. Reported on xorg@ with pastebin. */
188*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "PHL", 4) == 0 && DDC->vendor.prod_id == 57364)
189*4882a593Smuzhiyun         return TRUE;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun     /* Proview AY765C 17" LCD. See bug #15160 */
192*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "PTS", 4) == 0 && DDC->vendor.prod_id == 765)
193*4882a593Smuzhiyun         return TRUE;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun     /* ACR of some sort RH #284231 */
196*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "ACR", 4) == 0 && DDC->vendor.prod_id == 2423)
197*4882a593Smuzhiyun         return TRUE;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun     /* Peacock Ergovision 19.  See rh#492359 */
200*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "PEA", 4) == 0 && DDC->vendor.prod_id == 9003)
201*4882a593Smuzhiyun         return TRUE;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun     return FALSE;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun static Bool
quirk_detailed_sync_pp(int scrnIndex,xf86MonPtr DDC)207*4882a593Smuzhiyun quirk_detailed_sync_pp(int scrnIndex, xf86MonPtr DDC)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun     /* Bug #12439: Samsung SyncMaster 205BW */
210*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "SAM", 4) == 0 && DDC->vendor.prod_id == 541)
211*4882a593Smuzhiyun         return TRUE;
212*4882a593Smuzhiyun     return FALSE;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun /* This should probably be made more generic */
216*4882a593Smuzhiyun static Bool
quirk_dvi_single_link(int scrnIndex,xf86MonPtr DDC)217*4882a593Smuzhiyun quirk_dvi_single_link(int scrnIndex, xf86MonPtr DDC)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun     /* Red Hat bug #453106: Apple 23" Cinema Display */
220*4882a593Smuzhiyun     if (memcmp(DDC->vendor.name, "APL", 4) == 0 &&
221*4882a593Smuzhiyun         DDC->vendor.prod_id == 0x921c)
222*4882a593Smuzhiyun         return TRUE;
223*4882a593Smuzhiyun     return FALSE;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun typedef struct {
227*4882a593Smuzhiyun     Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
228*4882a593Smuzhiyun     ddc_quirk_t quirk;
229*4882a593Smuzhiyun     const char *description;
230*4882a593Smuzhiyun } ddc_quirk_map_t;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun static const ddc_quirk_map_t ddc_quirks[] = {
233*4882a593Smuzhiyun     {
234*4882a593Smuzhiyun      quirk_prefer_large_60, DDC_QUIRK_PREFER_LARGE_60,
235*4882a593Smuzhiyun      "Detailed timing is not preferred, use largest mode at 60Hz"},
236*4882a593Smuzhiyun     {
237*4882a593Smuzhiyun      quirk_135_clock_too_high, DDC_QUIRK_135_CLOCK_TOO_HIGH,
238*4882a593Smuzhiyun      "Recommended 135MHz pixel clock is too high"},
239*4882a593Smuzhiyun     {
240*4882a593Smuzhiyun      quirk_prefer_large_75, DDC_QUIRK_PREFER_LARGE_75,
241*4882a593Smuzhiyun      "Detailed timing is not preferred, use largest mode at 75Hz"},
242*4882a593Smuzhiyun     {
243*4882a593Smuzhiyun      quirk_detailed_h_in_cm, DDC_QUIRK_DETAILED_H_IN_CM,
244*4882a593Smuzhiyun      "Detailed timings give horizontal size in cm."},
245*4882a593Smuzhiyun     {
246*4882a593Smuzhiyun      quirk_detailed_v_in_cm, DDC_QUIRK_DETAILED_V_IN_CM,
247*4882a593Smuzhiyun      "Detailed timings give vertical size in cm."},
248*4882a593Smuzhiyun     {
249*4882a593Smuzhiyun      quirk_detailed_use_maximum_size, DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE,
250*4882a593Smuzhiyun      "Use maximum size instead of detailed timing sizes."},
251*4882a593Smuzhiyun     {
252*4882a593Smuzhiyun      quirk_first_detailed_preferred, DDC_QUIRK_FIRST_DETAILED_PREFERRED,
253*4882a593Smuzhiyun      "First detailed timing was not marked as preferred."},
254*4882a593Smuzhiyun     {
255*4882a593Smuzhiyun      quirk_detailed_sync_pp, DDC_QUIRK_DETAILED_SYNC_PP,
256*4882a593Smuzhiyun      "Use +hsync +vsync for detailed timing."},
257*4882a593Smuzhiyun     {
258*4882a593Smuzhiyun      quirk_dvi_single_link, DDC_QUIRK_DVI_SINGLE_LINK,
259*4882a593Smuzhiyun      "Forcing maximum pixel clock to single DVI link."},
260*4882a593Smuzhiyun     {
261*4882a593Smuzhiyun      NULL, DDC_QUIRK_NONE,
262*4882a593Smuzhiyun      "No known quirks"},
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun /*
266*4882a593Smuzhiyun  * These more or less come from the DMT spec.  The 720x400 modes are
267*4882a593Smuzhiyun  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
268*4882a593Smuzhiyun  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
269*4882a593Smuzhiyun  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
270*4882a593Smuzhiyun  * mode.
271*4882a593Smuzhiyun  *
272*4882a593Smuzhiyun  * The DMT modes have been fact-checked; the rest are mild guesses.
273*4882a593Smuzhiyun  */
274*4882a593Smuzhiyun #define MODEPREFIX NULL, NULL, NULL, 0, M_T_DRIVER
275*4882a593Smuzhiyun #define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun static const DisplayModeRec DDCEstablishedModes[17] = {
278*4882a593Smuzhiyun     {MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@60Hz */
279*4882a593Smuzhiyun     {MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@56Hz */
280*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@75Hz */
281*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@72Hz */
282*4882a593Smuzhiyun     {MODEPREFIX, 30240, 640, 704, 768, 864, 0, 480, 483, 486, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@67Hz */
283*4882a593Smuzhiyun     {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@60Hz */
284*4882a593Smuzhiyun     {MODEPREFIX, 35500, 720, 738, 846, 900, 0, 400, 421, 423, 449, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 720x400@88Hz */
285*4882a593Smuzhiyun     {MODEPREFIX, 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 720x400@70Hz */
286*4882a593Smuzhiyun     {MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1280x1024@75Hz */
287*4882a593Smuzhiyun     {MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* 1024x768@75Hz */
288*4882a593Smuzhiyun     {MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* 1024x768@70Hz */
289*4882a593Smuzhiyun     {MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* 1024x768@60Hz */
290*4882a593Smuzhiyun     {MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},       /* 1024x768@43Hz */
291*4882a593Smuzhiyun     {MODEPREFIX, 57284, 832, 864, 928, 1152, 0, 624, 625, 628, 667, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},        /* 832x624@75Hz */
292*4882a593Smuzhiyun     {MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@75Hz */
293*4882a593Smuzhiyun     {MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@72Hz */
294*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},    /* 1152x864@75Hz */
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun static DisplayModePtr
DDCModesFromEstablished(int scrnIndex,struct established_timings * timing,ddc_quirk_t quirks)298*4882a593Smuzhiyun DDCModesFromEstablished(int scrnIndex, struct established_timings *timing,
299*4882a593Smuzhiyun                         ddc_quirk_t quirks)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun     DisplayModePtr Modes = NULL, Mode = NULL;
302*4882a593Smuzhiyun     CARD32 bits = (timing->t1) | (timing->t2 << 8) |
303*4882a593Smuzhiyun         ((timing->t_manu & 0x80) << 9);
304*4882a593Smuzhiyun     int i;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun     for (i = 0; i < 17; i++) {
307*4882a593Smuzhiyun         if (bits & (0x01 << i)) {
308*4882a593Smuzhiyun             Mode = xf86DuplicateMode(&DDCEstablishedModes[i]);
309*4882a593Smuzhiyun             Modes = xf86ModesAdd(Modes, Mode);
310*4882a593Smuzhiyun         }
311*4882a593Smuzhiyun     }
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun     return Modes;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun /* Autogenerated from the DMT spec */
317*4882a593Smuzhiyun const DisplayModeRec DMTModes[] = {
318*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 672, 736, 832, 0, 350, 382, 385, 445, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x350@85Hz */
319*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 672, 736, 832, 0, 400, 401, 404, 445, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 640x400@85Hz */
320*4882a593Smuzhiyun     {MODEPREFIX, 35500, 720, 756, 828, 936, 0, 400, 401, 404, 446, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX}, /* 720x400@85Hz */
321*4882a593Smuzhiyun     {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@60Hz */
322*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 664, 704, 832, 0, 480, 489, 492, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@72Hz */
323*4882a593Smuzhiyun     {MODEPREFIX, 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@75Hz */
324*4882a593Smuzhiyun     {MODEPREFIX, 36000, 640, 696, 752, 832, 0, 480, 481, 484, 509, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* 640x480@85Hz */
325*4882a593Smuzhiyun     {MODEPREFIX, 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@56Hz */
326*4882a593Smuzhiyun     {MODEPREFIX, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@60Hz */
327*4882a593Smuzhiyun     {MODEPREFIX, 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@72Hz */
328*4882a593Smuzhiyun     {MODEPREFIX, 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@75Hz */
329*4882a593Smuzhiyun     {MODEPREFIX, 56250, 800, 832, 896, 1048, 0, 600, 601, 604, 631, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 800x600@85Hz */
330*4882a593Smuzhiyun     {MODEPREFIX, 73250, 800, 848, 880, 960, 0, 600, 603, 607, 636, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX}, /* 800x600@120Hz RB */
331*4882a593Smuzhiyun     {MODEPREFIX, 33750, 848, 864, 976, 1088, 0, 480, 486, 494, 517, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 848x480@60Hz */
332*4882a593Smuzhiyun     {MODEPREFIX, 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 772, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},       /* 1024x768@43Hz (interlaced) */
333*4882a593Smuzhiyun     {MODEPREFIX, 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* 1024x768@60Hz */
334*4882a593Smuzhiyun     {MODEPREFIX, 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* 1024x768@70Hz */
335*4882a593Smuzhiyun     {MODEPREFIX, 78750, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* 1024x768@75Hz */
336*4882a593Smuzhiyun     {MODEPREFIX, 94500, 1024, 1072, 1168, 1376, 0, 768, 769, 772, 808, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* 1024x768@85Hz */
337*4882a593Smuzhiyun     {MODEPREFIX, 115500, 1024, 1072, 1104, 1184, 0, 768, 771, 775, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},    /* 1024x768@120Hz RB */
338*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},    /* 1152x864@75Hz */
339*4882a593Smuzhiyun     {MODEPREFIX, 68250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 790, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},     /* 1280x768@60Hz RB */
340*4882a593Smuzhiyun     {MODEPREFIX, 79500, 1280, 1344, 1472, 1664, 0, 768, 771, 778, 798, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},     /* 1280x768@60Hz */
341*4882a593Smuzhiyun     {MODEPREFIX, 102250, 1280, 1360, 1488, 1696, 0, 768, 771, 778, 805, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1280x768@75Hz */
342*4882a593Smuzhiyun     {MODEPREFIX, 117500, 1280, 1360, 1496, 1712, 0, 768, 771, 778, 809, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1280x768@85Hz */
343*4882a593Smuzhiyun     {MODEPREFIX, 140250, 1280, 1328, 1360, 1440, 0, 768, 771, 778, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},    /* 1280x768@120Hz RB */
344*4882a593Smuzhiyun     {MODEPREFIX, 71000, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 823, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},     /* 1280x800@60Hz RB */
345*4882a593Smuzhiyun     {MODEPREFIX, 83500, 1280, 1352, 1480, 1680, 0, 800, 803, 809, 831, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},     /* 1280x800@60Hz */
346*4882a593Smuzhiyun     {MODEPREFIX, 106500, 1280, 1360, 1488, 1696, 0, 800, 803, 809, 838, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1280x800@75Hz */
347*4882a593Smuzhiyun     {MODEPREFIX, 122500, 1280, 1360, 1496, 1712, 0, 800, 803, 809, 843, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1280x800@85Hz */
348*4882a593Smuzhiyun     {MODEPREFIX, 146250, 1280, 1328, 1360, 1440, 0, 800, 803, 809, 847, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},    /* 1280x800@120Hz RB */
349*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1280, 1376, 1488, 1800, 0, 960, 961, 964, 1000, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},   /* 1280x960@60Hz */
350*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1280, 1344, 1504, 1728, 0, 960, 961, 964, 1011, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},   /* 1280x960@85Hz */
351*4882a593Smuzhiyun     {MODEPREFIX, 175500, 1280, 1328, 1360, 1440, 0, 960, 963, 967, 1017, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},   /* 1280x960@120Hz RB */
352*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1280, 1328, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1280x1024@60Hz */
353*4882a593Smuzhiyun     {MODEPREFIX, 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1280x1024@75Hz */
354*4882a593Smuzhiyun     {MODEPREFIX, 157500, 1280, 1344, 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1280x1024@85Hz */
355*4882a593Smuzhiyun     {MODEPREFIX, 187250, 1280, 1328, 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1280x1024@120Hz RB */
356*4882a593Smuzhiyun     {MODEPREFIX, 85500, 1360, 1424, 1536, 1792, 0, 768, 771, 777, 795, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* 1360x768@60Hz */
357*4882a593Smuzhiyun     {MODEPREFIX, 148250, 1360, 1408, 1440, 1520, 0, 768, 771, 776, 813, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},    /* 1360x768@120Hz RB */
358*4882a593Smuzhiyun     {MODEPREFIX, 101000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1400x1050@60Hz RB */
359*4882a593Smuzhiyun     {MODEPREFIX, 121750, 1400, 1488, 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1400x1050@60Hz */
360*4882a593Smuzhiyun     {MODEPREFIX, 156000, 1400, 1504, 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1400x1050@75Hz */
361*4882a593Smuzhiyun     {MODEPREFIX, 179500, 1400, 1504, 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1400x1050@85Hz */
362*4882a593Smuzhiyun     {MODEPREFIX, 208000, 1400, 1448, 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1400x1050@120Hz RB */
363*4882a593Smuzhiyun     {MODEPREFIX, 88750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 926, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},     /* 1440x900@60Hz RB */
364*4882a593Smuzhiyun     {MODEPREFIX, 106500, 1440, 1520, 1672, 1904, 0, 900, 903, 909, 934, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1440x900@60Hz */
365*4882a593Smuzhiyun     {MODEPREFIX, 136750, 1440, 1536, 1688, 1936, 0, 900, 903, 909, 942, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1440x900@75Hz */
366*4882a593Smuzhiyun     {MODEPREFIX, 157000, 1440, 1544, 1696, 1952, 0, 900, 903, 909, 948, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},    /* 1440x900@85Hz */
367*4882a593Smuzhiyun     {MODEPREFIX, 182750, 1440, 1488, 1520, 1600, 0, 900, 903, 909, 953, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},    /* 1440x900@120Hz RB */
368*4882a593Smuzhiyun     {MODEPREFIX, 162000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1600x1200@60Hz */
369*4882a593Smuzhiyun     {MODEPREFIX, 175500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1600x1200@65Hz */
370*4882a593Smuzhiyun     {MODEPREFIX, 189000, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1600x1200@70Hz */
371*4882a593Smuzhiyun     {MODEPREFIX, 202500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1600x1200@75Hz */
372*4882a593Smuzhiyun     {MODEPREFIX, 229500, 1600, 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* 1600x1200@85Hz */
373*4882a593Smuzhiyun     {MODEPREFIX, 268250, 1600, 1648, 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1600x1200@120Hz RB */
374*4882a593Smuzhiyun     {MODEPREFIX, 119000, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1680x1050@60Hz RB */
375*4882a593Smuzhiyun     {MODEPREFIX, 146250, 1680, 1784, 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1680x1050@60Hz */
376*4882a593Smuzhiyun     {MODEPREFIX, 187000, 1680, 1800, 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1680x1050@75Hz */
377*4882a593Smuzhiyun     {MODEPREFIX, 214750, 1680, 1808, 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1680x1050@85Hz */
378*4882a593Smuzhiyun     {MODEPREFIX, 245500, 1680, 1728, 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1680x1050@120Hz RB */
379*4882a593Smuzhiyun     {MODEPREFIX, 204750, 1792, 1920, 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1792x1344@60Hz */
380*4882a593Smuzhiyun     {MODEPREFIX, 261000, 1792, 1888, 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1792x1344@75Hz */
381*4882a593Smuzhiyun     {MODEPREFIX, 333250, 1792, 1840, 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1792x1344@120Hz RB */
382*4882a593Smuzhiyun     {MODEPREFIX, 218250, 1856, 1952, 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1856x1392@60Hz */
383*4882a593Smuzhiyun     {MODEPREFIX, 288000, 1856, 1984, 2208, 2560, 0, 1392, 1393, 1396, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1856x1392@75Hz */
384*4882a593Smuzhiyun     {MODEPREFIX, 356500, 1856, 1904, 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1856x1392@120Hz RB */
385*4882a593Smuzhiyun     {MODEPREFIX, 154000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1920x1200@60Hz RB */
386*4882a593Smuzhiyun     {MODEPREFIX, 193250, 1920, 2056, 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1920x1200@60Hz */
387*4882a593Smuzhiyun     {MODEPREFIX, 245250, 1920, 2056, 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1920x1200@75Hz */
388*4882a593Smuzhiyun     {MODEPREFIX, 281250, 1920, 2064, 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1920x1200@85Hz */
389*4882a593Smuzhiyun     {MODEPREFIX, 317000, 1920, 1968, 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1920x1200@120Hz RB */
390*4882a593Smuzhiyun     {MODEPREFIX, 234000, 1920, 2048, 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1920x1440@60Hz */
391*4882a593Smuzhiyun     {MODEPREFIX, 297000, 1920, 2064, 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 1920x1440@75Hz */
392*4882a593Smuzhiyun     {MODEPREFIX, 380500, 1920, 1968, 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 1920x1440@120Hz RB */
393*4882a593Smuzhiyun     {MODEPREFIX, 268500, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 2560x1600@60Hz RB */
394*4882a593Smuzhiyun     {MODEPREFIX, 348500, 2560, 2752, 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 2560x1600@60Hz */
395*4882a593Smuzhiyun     {MODEPREFIX, 443250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 2560x1600@75Hz */
396*4882a593Smuzhiyun     {MODEPREFIX, 505250, 2560, 2768, 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX},        /* 2560x1600@85Hz */
397*4882a593Smuzhiyun     {MODEPREFIX, 552750, 2560, 2608, 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX},        /* 2560x1600@120Hz RB */
398*4882a593Smuzhiyun };
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun #define LEVEL_DMT 0
401*4882a593Smuzhiyun #define LEVEL_GTF 1
402*4882a593Smuzhiyun #define LEVEL_CVT 2
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun static int
MonitorStandardTimingLevel(xf86MonPtr DDC)405*4882a593Smuzhiyun MonitorStandardTimingLevel(xf86MonPtr DDC)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun     if (DDC->ver.revision >= 2) {
408*4882a593Smuzhiyun         if (DDC->ver.revision >= 4 && CVT_SUPPORTED(DDC->features.msc)) {
409*4882a593Smuzhiyun             return LEVEL_CVT;
410*4882a593Smuzhiyun         }
411*4882a593Smuzhiyun         return LEVEL_GTF;
412*4882a593Smuzhiyun     }
413*4882a593Smuzhiyun     return LEVEL_DMT;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun static int
ModeRefresh(const DisplayModeRec * mode)417*4882a593Smuzhiyun ModeRefresh(const DisplayModeRec * mode)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun     return (int) (xf86ModeVRefresh(mode) + 0.5);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun /*
423*4882a593Smuzhiyun  * If rb is not set, then we'll not consider reduced-blanking modes as
424*4882a593Smuzhiyun  * part of the DMT pool.  For the 'standard' EDID mode descriptor there's
425*4882a593Smuzhiyun  * no way to specify whether the mode should be RB or not.
426*4882a593Smuzhiyun  */
427*4882a593Smuzhiyun DisplayModePtr
FindDMTMode(int hsize,int vsize,int refresh,Bool rb)428*4882a593Smuzhiyun FindDMTMode(int hsize, int vsize, int refresh, Bool rb)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun     int i;
431*4882a593Smuzhiyun     const DisplayModeRec *ret;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun     for (i = 0; i < ARRAY_SIZE(DMTModes); i++) {
434*4882a593Smuzhiyun         ret = &DMTModes[i];
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun         if (!rb && xf86ModeIsReduced(ret))
437*4882a593Smuzhiyun             continue;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun         if (ret->HDisplay == hsize &&
440*4882a593Smuzhiyun             ret->VDisplay == vsize && refresh == ModeRefresh(ret))
441*4882a593Smuzhiyun             return xf86DuplicateMode(ret);
442*4882a593Smuzhiyun     }
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun     return NULL;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun /*
448*4882a593Smuzhiyun  * Appendix B of the EDID 1.4 spec defines the right thing to do here.
449*4882a593Smuzhiyun  * If the timing given here matches a mode defined in the VESA DMT standard,
450*4882a593Smuzhiyun  * we _must_ use that.  If the device supports CVT modes, then we should
451*4882a593Smuzhiyun  * generate a CVT timing.  If both of the above fail, use GTF.
452*4882a593Smuzhiyun  *
453*4882a593Smuzhiyun  * There are some wrinkles here.  EDID 1.1 and 1.0 sinks can't really
454*4882a593Smuzhiyun  * "support" GTF, since it wasn't a standard yet; so if they ask for a
455*4882a593Smuzhiyun  * timing in this section that isn't defined in DMT, returning a GTF mode
456*4882a593Smuzhiyun  * may not actually be valid.  EDID 1.3 sinks often report support for
457*4882a593Smuzhiyun  * some CVT modes, but they are not required to support CVT timings for
458*4882a593Smuzhiyun  * modes in the standard timing descriptor, so we should _not_ treat them
459*4882a593Smuzhiyun  * as CVT-compliant (unless specified in an extension block I suppose).
460*4882a593Smuzhiyun  *
461*4882a593Smuzhiyun  * EDID 1.4 requires that all sink devices support both GTF and CVT timings
462*4882a593Smuzhiyun  * for modes in this section, but does say that CVT is preferred.
463*4882a593Smuzhiyun  */
464*4882a593Smuzhiyun static DisplayModePtr
DDCModesFromStandardTiming(DisplayModePtr pool,struct std_timings * timing,ddc_quirk_t quirks,int timing_level,Bool rb)465*4882a593Smuzhiyun DDCModesFromStandardTiming(DisplayModePtr pool, struct std_timings *timing,
466*4882a593Smuzhiyun                            ddc_quirk_t quirks,
467*4882a593Smuzhiyun                            int timing_level, Bool rb)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun     DisplayModePtr Modes = NULL, Mode = NULL;
470*4882a593Smuzhiyun     int i, hsize, vsize, refresh;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun     for (i = 0; i < STD_TIMINGS; i++) {
473*4882a593Smuzhiyun         DisplayModePtr p = NULL;
474*4882a593Smuzhiyun         hsize = timing[i].hsize;
475*4882a593Smuzhiyun         vsize = timing[i].vsize;
476*4882a593Smuzhiyun         refresh = timing[i].refresh;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun         /* HDTV hack, part one */
479*4882a593Smuzhiyun         if (refresh == 60 &&
480*4882a593Smuzhiyun             ((hsize == 1360 && vsize == 765) ||
481*4882a593Smuzhiyun              (hsize == 1368 && vsize == 769))) {
482*4882a593Smuzhiyun             hsize = 1366;
483*4882a593Smuzhiyun             vsize = 768;
484*4882a593Smuzhiyun         }
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun         /* If we already have a detailed timing for this size, don't add more */
487*4882a593Smuzhiyun         for (p = pool; p; p = p->next) {
488*4882a593Smuzhiyun             if (p->HDisplay == hsize && p->VDisplay == vsize &&
489*4882a593Smuzhiyun                 refresh == round(xf86ModeVRefresh(p)))
490*4882a593Smuzhiyun                 break;
491*4882a593Smuzhiyun         }
492*4882a593Smuzhiyun         if (p)
493*4882a593Smuzhiyun             continue;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun         /* HDTV hack, because you can't say 1366 */
496*4882a593Smuzhiyun         if (refresh == 60 && hsize == 1366 && vsize == 768) {
497*4882a593Smuzhiyun             Mode = xf86CVTMode(1366, 768, 60, FALSE, FALSE);
498*4882a593Smuzhiyun             Mode->HDisplay = 1366;
499*4882a593Smuzhiyun             Mode->HSyncStart--;
500*4882a593Smuzhiyun             Mode->HSyncEnd--;
501*4882a593Smuzhiyun         }
502*4882a593Smuzhiyun         else if (hsize && vsize && refresh) {
503*4882a593Smuzhiyun             Mode = FindDMTMode(hsize, vsize, refresh, rb);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun             if (!Mode) {
506*4882a593Smuzhiyun                 if (timing_level == LEVEL_CVT)
507*4882a593Smuzhiyun                     /* pass rb here too? */
508*4882a593Smuzhiyun                     Mode = xf86CVTMode(hsize, vsize, refresh, FALSE, FALSE);
509*4882a593Smuzhiyun                 else if (timing_level == LEVEL_GTF)
510*4882a593Smuzhiyun                     Mode = xf86GTFMode(hsize, vsize, refresh, FALSE, FALSE);
511*4882a593Smuzhiyun             }
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun         }
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun         if (Mode) {
516*4882a593Smuzhiyun             Mode->type = M_T_DRIVER;
517*4882a593Smuzhiyun             Modes = xf86ModesAdd(Modes, Mode);
518*4882a593Smuzhiyun         }
519*4882a593Smuzhiyun         Mode = NULL;
520*4882a593Smuzhiyun     }
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun     return Modes;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun static void
DDCModeDoInterlaceQuirks(DisplayModePtr mode)526*4882a593Smuzhiyun DDCModeDoInterlaceQuirks(DisplayModePtr mode)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun     /*
529*4882a593Smuzhiyun      * EDID is delightfully ambiguous about how interlaced modes are to be
530*4882a593Smuzhiyun      * encoded.  X's internal representation is of frame height, but some
531*4882a593Smuzhiyun      * HDTV detailed timings are encoded as field height.
532*4882a593Smuzhiyun      *
533*4882a593Smuzhiyun      * The format list here is from CEA, in frame size.  Technically we
534*4882a593Smuzhiyun      * should be checking refresh rate too.  Whatever.
535*4882a593Smuzhiyun      */
536*4882a593Smuzhiyun     static const struct {
537*4882a593Smuzhiyun         int w, h;
538*4882a593Smuzhiyun     } cea_interlaced[] = {
539*4882a593Smuzhiyun         {1920, 1080},
540*4882a593Smuzhiyun         {720, 480},
541*4882a593Smuzhiyun         {1440, 480},
542*4882a593Smuzhiyun         {2880, 480},
543*4882a593Smuzhiyun         {720, 576},
544*4882a593Smuzhiyun         {1440, 576},
545*4882a593Smuzhiyun         {2880, 576},
546*4882a593Smuzhiyun     };
547*4882a593Smuzhiyun     int i;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun     for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
550*4882a593Smuzhiyun         if ((mode->HDisplay == cea_interlaced[i].w) &&
551*4882a593Smuzhiyun             (mode->VDisplay == cea_interlaced[i].h / 2)) {
552*4882a593Smuzhiyun             mode->VDisplay *= 2;
553*4882a593Smuzhiyun             mode->VSyncStart *= 2;
554*4882a593Smuzhiyun             mode->VSyncEnd *= 2;
555*4882a593Smuzhiyun             mode->VTotal *= 2;
556*4882a593Smuzhiyun             mode->VTotal |= 1;
557*4882a593Smuzhiyun         }
558*4882a593Smuzhiyun     }
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun     mode->Flags |= V_INTERLACE;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun /*
564*4882a593Smuzhiyun  *
565*4882a593Smuzhiyun  */
566*4882a593Smuzhiyun static DisplayModePtr
DDCModeFromDetailedTiming(int scrnIndex,struct detailed_timings * timing,Bool preferred,ddc_quirk_t quirks)567*4882a593Smuzhiyun DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
568*4882a593Smuzhiyun                           Bool preferred, ddc_quirk_t quirks)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun     DisplayModePtr Mode;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun     /*
573*4882a593Smuzhiyun      * Refuse to create modes that are insufficiently large.  64 is a random
574*4882a593Smuzhiyun      * number, maybe the spec says something about what the minimum is.  In
575*4882a593Smuzhiyun      * particular I see this frequently with _old_ EDID, 1.0 or so, so maybe
576*4882a593Smuzhiyun      * our parser is just being too aggresive there.
577*4882a593Smuzhiyun      */
578*4882a593Smuzhiyun     if (timing->h_active < 64 || timing->v_active < 64) {
579*4882a593Smuzhiyun         xf86DrvMsg(scrnIndex, X_INFO,
580*4882a593Smuzhiyun                    "%s: Ignoring tiny %dx%d mode\n", __func__,
581*4882a593Smuzhiyun                    timing->h_active, timing->v_active);
582*4882a593Smuzhiyun         return NULL;
583*4882a593Smuzhiyun     }
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun     /* We don't do stereo */
586*4882a593Smuzhiyun     if (timing->stereo) {
587*4882a593Smuzhiyun         xf86DrvMsg(scrnIndex, X_INFO,
588*4882a593Smuzhiyun                    "%s: Ignoring: We don't handle stereo.\n", __func__);
589*4882a593Smuzhiyun         return NULL;
590*4882a593Smuzhiyun     }
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun     /* We only do seperate sync currently */
593*4882a593Smuzhiyun     if (timing->sync != 0x03) {
594*4882a593Smuzhiyun         xf86DrvMsg(scrnIndex, X_INFO,
595*4882a593Smuzhiyun                    "%s: %dx%d Warning: We only handle separate"
596*4882a593Smuzhiyun                    " sync.\n", __func__, timing->h_active, timing->v_active);
597*4882a593Smuzhiyun     }
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun     Mode = xnfcalloc(1, sizeof(DisplayModeRec));
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun     Mode->type = M_T_DRIVER;
602*4882a593Smuzhiyun     if (preferred)
603*4882a593Smuzhiyun         Mode->type |= M_T_PREFERRED;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun     if ((quirks & DDC_QUIRK_135_CLOCK_TOO_HIGH) && timing->clock == 135000000)
606*4882a593Smuzhiyun         Mode->Clock = 108880;
607*4882a593Smuzhiyun     else
608*4882a593Smuzhiyun         Mode->Clock = timing->clock / 1000.0;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun     Mode->HDisplay = timing->h_active;
611*4882a593Smuzhiyun     Mode->HSyncStart = timing->h_active + timing->h_sync_off;
612*4882a593Smuzhiyun     Mode->HSyncEnd = Mode->HSyncStart + timing->h_sync_width;
613*4882a593Smuzhiyun     Mode->HTotal = timing->h_active + timing->h_blanking;
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun     Mode->VDisplay = timing->v_active;
616*4882a593Smuzhiyun     Mode->VSyncStart = timing->v_active + timing->v_sync_off;
617*4882a593Smuzhiyun     Mode->VSyncEnd = Mode->VSyncStart + timing->v_sync_width;
618*4882a593Smuzhiyun     Mode->VTotal = timing->v_active + timing->v_blanking;
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun     /* perform basic check on the detail timing */
621*4882a593Smuzhiyun     if (Mode->HSyncEnd > Mode->HTotal || Mode->VSyncEnd > Mode->VTotal) {
622*4882a593Smuzhiyun         free(Mode);
623*4882a593Smuzhiyun         return NULL;
624*4882a593Smuzhiyun     }
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun     /* We ignore h/v_size and h/v_border for now. */
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun     if (timing->interlaced)
629*4882a593Smuzhiyun         DDCModeDoInterlaceQuirks(Mode);
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_DETAILED_SYNC_PP)
632*4882a593Smuzhiyun         Mode->Flags |= V_PVSYNC | V_PHSYNC;
633*4882a593Smuzhiyun     else {
634*4882a593Smuzhiyun         if (timing->misc & 0x02)
635*4882a593Smuzhiyun             Mode->Flags |= V_PVSYNC;
636*4882a593Smuzhiyun         else
637*4882a593Smuzhiyun             Mode->Flags |= V_NVSYNC;
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun         if (timing->misc & 0x01)
640*4882a593Smuzhiyun             Mode->Flags |= V_PHSYNC;
641*4882a593Smuzhiyun         else
642*4882a593Smuzhiyun             Mode->Flags |= V_NHSYNC;
643*4882a593Smuzhiyun     }
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun     xf86SetModeDefaultName(Mode);
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun     return Mode;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun static DisplayModePtr
DDCModesFromCVT(int scrnIndex,struct cvt_timings * t)651*4882a593Smuzhiyun DDCModesFromCVT(int scrnIndex, struct cvt_timings *t)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun     DisplayModePtr modes = NULL;
654*4882a593Smuzhiyun     int i;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun     for (i = 0; i < 4; i++) {
657*4882a593Smuzhiyun         if (t[i].height) {
658*4882a593Smuzhiyun             if (t[i].rates & 0x10)
659*4882a593Smuzhiyun                 modes = xf86ModesAdd(modes,
660*4882a593Smuzhiyun                                      xf86CVTMode(t[i].width, t[i].height, 50, 0,
661*4882a593Smuzhiyun                                                  0));
662*4882a593Smuzhiyun             if (t[i].rates & 0x08)
663*4882a593Smuzhiyun                 modes = xf86ModesAdd(modes,
664*4882a593Smuzhiyun                                      xf86CVTMode(t[i].width, t[i].height, 60, 0,
665*4882a593Smuzhiyun                                                  0));
666*4882a593Smuzhiyun             if (t[i].rates & 0x04)
667*4882a593Smuzhiyun                 modes = xf86ModesAdd(modes,
668*4882a593Smuzhiyun                                      xf86CVTMode(t[i].width, t[i].height, 75, 0,
669*4882a593Smuzhiyun                                                  0));
670*4882a593Smuzhiyun             if (t[i].rates & 0x02)
671*4882a593Smuzhiyun                 modes = xf86ModesAdd(modes,
672*4882a593Smuzhiyun                                      xf86CVTMode(t[i].width, t[i].height, 85, 0,
673*4882a593Smuzhiyun                                                  0));
674*4882a593Smuzhiyun             if (t[i].rates & 0x01)
675*4882a593Smuzhiyun                 modes = xf86ModesAdd(modes,
676*4882a593Smuzhiyun                                      xf86CVTMode(t[i].width, t[i].height, 60, 1,
677*4882a593Smuzhiyun                                                  0));
678*4882a593Smuzhiyun         }
679*4882a593Smuzhiyun         else
680*4882a593Smuzhiyun             break;
681*4882a593Smuzhiyun     }
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun     return modes;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun static const struct {
687*4882a593Smuzhiyun     short w;
688*4882a593Smuzhiyun     short h;
689*4882a593Smuzhiyun     short r;
690*4882a593Smuzhiyun     short rb;
691*4882a593Smuzhiyun } EstIIIModes[] = {
692*4882a593Smuzhiyun         /* byte 6 */
693*4882a593Smuzhiyun     {640, 350, 85, 0},
694*4882a593Smuzhiyun     {640, 400, 85, 0},
695*4882a593Smuzhiyun     {720, 400, 85, 0},
696*4882a593Smuzhiyun     {640, 480, 85, 0},
697*4882a593Smuzhiyun     {848, 480, 60, 0},
698*4882a593Smuzhiyun     {800, 600, 85, 0},
699*4882a593Smuzhiyun     {1024, 768, 85, 0},
700*4882a593Smuzhiyun     {1152, 864, 75, 0},
701*4882a593Smuzhiyun         /* byte 7 */
702*4882a593Smuzhiyun     {1280, 768, 60, 1},
703*4882a593Smuzhiyun     {1280, 768, 60, 0},
704*4882a593Smuzhiyun     {1280, 768, 75, 0},
705*4882a593Smuzhiyun     {1280, 768, 85, 0},
706*4882a593Smuzhiyun     {1280, 960, 60, 0},
707*4882a593Smuzhiyun     {1280, 960, 85, 0},
708*4882a593Smuzhiyun     {1280, 1024, 60, 0},
709*4882a593Smuzhiyun     {1280, 1024, 85, 0},
710*4882a593Smuzhiyun         /* byte 8 */
711*4882a593Smuzhiyun     {1360, 768, 60, 0},
712*4882a593Smuzhiyun     {1440, 900, 60, 1},
713*4882a593Smuzhiyun     {1440, 900, 60, 0},
714*4882a593Smuzhiyun     {1440, 900, 75, 0},
715*4882a593Smuzhiyun     {1440, 900, 85, 0},
716*4882a593Smuzhiyun     {1400, 1050, 60, 1},
717*4882a593Smuzhiyun     {1400, 1050, 60, 0},
718*4882a593Smuzhiyun     {1400, 1050, 75, 0},
719*4882a593Smuzhiyun         /* byte 9 */
720*4882a593Smuzhiyun     {1400, 1050, 85, 0},
721*4882a593Smuzhiyun     {1680, 1050, 60, 1},
722*4882a593Smuzhiyun     {1680, 1050, 60, 0},
723*4882a593Smuzhiyun     {1680, 1050, 75, 0},
724*4882a593Smuzhiyun     {1680, 1050, 85, 0},
725*4882a593Smuzhiyun     {1600, 1200, 60, 0},
726*4882a593Smuzhiyun     {1600, 1200, 65, 0},
727*4882a593Smuzhiyun     {1600, 1200, 70, 0},
728*4882a593Smuzhiyun         /* byte 10 */
729*4882a593Smuzhiyun     {1600, 1200, 75, 0},
730*4882a593Smuzhiyun     {1600, 1200, 85, 0},
731*4882a593Smuzhiyun     {1792, 1344, 60, 0},
732*4882a593Smuzhiyun     {1792, 1344, 75, 0},
733*4882a593Smuzhiyun     {1856, 1392, 60, 0},
734*4882a593Smuzhiyun     {1856, 1392, 75, 0},
735*4882a593Smuzhiyun     {1920, 1200, 60, 1},
736*4882a593Smuzhiyun     {1920, 1200, 60, 0},
737*4882a593Smuzhiyun         /* byte 11 */
738*4882a593Smuzhiyun     {1920, 1200, 75, 0},
739*4882a593Smuzhiyun     {1920, 1200, 85, 0},
740*4882a593Smuzhiyun     {1920, 1440, 60, 0},
741*4882a593Smuzhiyun     {1920, 1440, 75, 0},
742*4882a593Smuzhiyun         /* fill up last byte */
743*4882a593Smuzhiyun     {0,0,0,0},
744*4882a593Smuzhiyun     {0,0,0,0},
745*4882a593Smuzhiyun     {0,0,0,0},
746*4882a593Smuzhiyun     {0,0,0,0},
747*4882a593Smuzhiyun };
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun static DisplayModePtr
DDCModesFromEstIII(unsigned char * est)750*4882a593Smuzhiyun DDCModesFromEstIII(unsigned char *est)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun     DisplayModePtr modes = NULL;
753*4882a593Smuzhiyun     int i, j, m;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun     for (i = 0; i < 6; i++) {
756*4882a593Smuzhiyun         for (j = 7; j >= 0; j--) {
757*4882a593Smuzhiyun             if (est[i] & (1 << j)) {
758*4882a593Smuzhiyun                 m = (i * 8) + (7 - j);
759*4882a593Smuzhiyun                 if (EstIIIModes[m].w)
760*4882a593Smuzhiyun                     modes = xf86ModesAdd(modes,
761*4882a593Smuzhiyun                                      FindDMTMode(EstIIIModes[m].w,
762*4882a593Smuzhiyun                                                  EstIIIModes[m].h,
763*4882a593Smuzhiyun                                                  EstIIIModes[m].r,
764*4882a593Smuzhiyun                                                  EstIIIModes[m].rb));
765*4882a593Smuzhiyun             }
766*4882a593Smuzhiyun         }
767*4882a593Smuzhiyun     }
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun     return modes;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun /*
773*4882a593Smuzhiyun  * This is only valid when the sink claims to be continuous-frequency
774*4882a593Smuzhiyun  * but does not supply a detailed range descriptor.  Such sinks are
775*4882a593Smuzhiyun  * arguably broken.  Currently the mode validation code isn't aware of
776*4882a593Smuzhiyun  * this; the non-RANDR code even punts the decision of optional sync
777*4882a593Smuzhiyun  * range checking to the driver.  Loss.
778*4882a593Smuzhiyun  */
779*4882a593Smuzhiyun static void
DDCGuessRangesFromModes(int scrnIndex,MonPtr Monitor,DisplayModePtr Modes)780*4882a593Smuzhiyun DDCGuessRangesFromModes(int scrnIndex, MonPtr Monitor, DisplayModePtr Modes)
781*4882a593Smuzhiyun {
782*4882a593Smuzhiyun     DisplayModePtr Mode = Modes;
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun     if (!Monitor || !Modes)
785*4882a593Smuzhiyun         return;
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun     /* set up the ranges for scanning through the modes */
788*4882a593Smuzhiyun     Monitor->nHsync = 1;
789*4882a593Smuzhiyun     Monitor->hsync[0].lo = 1024.0;
790*4882a593Smuzhiyun     Monitor->hsync[0].hi = 0.0;
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun     Monitor->nVrefresh = 1;
793*4882a593Smuzhiyun     Monitor->vrefresh[0].lo = 1024.0;
794*4882a593Smuzhiyun     Monitor->vrefresh[0].hi = 0.0;
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun     while (Mode) {
797*4882a593Smuzhiyun         if (!Mode->HSync)
798*4882a593Smuzhiyun             Mode->HSync = ((float) Mode->Clock) / ((float) Mode->HTotal);
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun         if (!Mode->VRefresh)
801*4882a593Smuzhiyun             Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
802*4882a593Smuzhiyun                 ((float) (Mode->HTotal * Mode->VTotal));
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun         if (Mode->HSync < Monitor->hsync[0].lo)
805*4882a593Smuzhiyun             Monitor->hsync[0].lo = Mode->HSync;
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun         if (Mode->HSync > Monitor->hsync[0].hi)
808*4882a593Smuzhiyun             Monitor->hsync[0].hi = Mode->HSync;
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun         if (Mode->VRefresh < Monitor->vrefresh[0].lo)
811*4882a593Smuzhiyun             Monitor->vrefresh[0].lo = Mode->VRefresh;
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun         if (Mode->VRefresh > Monitor->vrefresh[0].hi)
814*4882a593Smuzhiyun             Monitor->vrefresh[0].hi = Mode->VRefresh;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun         Mode = Mode->next;
817*4882a593Smuzhiyun     }
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun ddc_quirk_t
xf86DDCDetectQuirks(int scrnIndex,xf86MonPtr DDC,Bool verbose)821*4882a593Smuzhiyun xf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose)
822*4882a593Smuzhiyun {
823*4882a593Smuzhiyun     ddc_quirk_t quirks;
824*4882a593Smuzhiyun     int i;
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun     quirks = DDC_QUIRK_NONE;
827*4882a593Smuzhiyun     for (i = 0; ddc_quirks[i].detect; i++) {
828*4882a593Smuzhiyun         if (ddc_quirks[i].detect(scrnIndex, DDC)) {
829*4882a593Smuzhiyun             if (verbose) {
830*4882a593Smuzhiyun                 xf86DrvMsg(scrnIndex, X_INFO, "    EDID quirk: %s\n",
831*4882a593Smuzhiyun                            ddc_quirks[i].description);
832*4882a593Smuzhiyun             }
833*4882a593Smuzhiyun             quirks |= ddc_quirks[i].quirk;
834*4882a593Smuzhiyun         }
835*4882a593Smuzhiyun     }
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun     return quirks;
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun void
xf86DetTimingApplyQuirks(struct detailed_monitor_section * det_mon,ddc_quirk_t quirks,int hsize,int vsize)841*4882a593Smuzhiyun xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
842*4882a593Smuzhiyun                          ddc_quirk_t quirks, int hsize, int vsize)
843*4882a593Smuzhiyun {
844*4882a593Smuzhiyun     if (det_mon->type != DT)
845*4882a593Smuzhiyun         return;
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_DETAILED_H_IN_CM)
848*4882a593Smuzhiyun         det_mon->section.d_timings.h_size *= 10;
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_DETAILED_V_IN_CM)
851*4882a593Smuzhiyun         det_mon->section.d_timings.v_size *= 10;
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
854*4882a593Smuzhiyun         det_mon->section.d_timings.h_size = 10 * hsize;
855*4882a593Smuzhiyun         det_mon->section.d_timings.v_size = 10 * vsize;
856*4882a593Smuzhiyun     }
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun /**
860*4882a593Smuzhiyun  * Applies monitor-specific quirks to the decoded EDID information.
861*4882a593Smuzhiyun  *
862*4882a593Smuzhiyun  * Note that some quirks applying to the mode list are still implemented in
863*4882a593Smuzhiyun  * xf86DDCGetModes.
864*4882a593Smuzhiyun  */
865*4882a593Smuzhiyun void
xf86DDCApplyQuirks(int scrnIndex,xf86MonPtr DDC)866*4882a593Smuzhiyun xf86DDCApplyQuirks(int scrnIndex, xf86MonPtr DDC)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun     ddc_quirk_t quirks = xf86DDCDetectQuirks(scrnIndex, DDC, FALSE);
869*4882a593Smuzhiyun     int i;
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun     for (i = 0; i < DET_TIMINGS; i++) {
872*4882a593Smuzhiyun         xf86DetTimingApplyQuirks(DDC->det_mon + i, quirks,
873*4882a593Smuzhiyun                                  DDC->features.hsize, DDC->features.vsize);
874*4882a593Smuzhiyun     }
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun /**
878*4882a593Smuzhiyun  * Walks the modes list, finding the mode with the largest area which is
879*4882a593Smuzhiyun  * closest to the target refresh rate, and marks it as the only preferred mode.
880*4882a593Smuzhiyun */
881*4882a593Smuzhiyun static void
xf86DDCSetPreferredRefresh(int scrnIndex,DisplayModePtr modes,float target_refresh)882*4882a593Smuzhiyun xf86DDCSetPreferredRefresh(int scrnIndex, DisplayModePtr modes,
883*4882a593Smuzhiyun                            float target_refresh)
884*4882a593Smuzhiyun {
885*4882a593Smuzhiyun     DisplayModePtr mode, best = modes;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun     for (mode = modes; mode; mode = mode->next) {
888*4882a593Smuzhiyun         mode->type &= ~M_T_PREFERRED;
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun         if (mode == best)
891*4882a593Smuzhiyun             continue;
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun         if (mode->HDisplay * mode->VDisplay > best->HDisplay * best->VDisplay) {
894*4882a593Smuzhiyun             best = mode;
895*4882a593Smuzhiyun             continue;
896*4882a593Smuzhiyun         }
897*4882a593Smuzhiyun         if (mode->HDisplay * mode->VDisplay == best->HDisplay * best->VDisplay) {
898*4882a593Smuzhiyun             double mode_refresh = xf86ModeVRefresh(mode);
899*4882a593Smuzhiyun             double best_refresh = xf86ModeVRefresh(best);
900*4882a593Smuzhiyun             double mode_dist = fabs(mode_refresh - target_refresh);
901*4882a593Smuzhiyun             double best_dist = fabs(best_refresh - target_refresh);
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun             if (mode_dist < best_dist) {
904*4882a593Smuzhiyun                 best = mode;
905*4882a593Smuzhiyun                 continue;
906*4882a593Smuzhiyun             }
907*4882a593Smuzhiyun         }
908*4882a593Smuzhiyun     }
909*4882a593Smuzhiyun     if (best)
910*4882a593Smuzhiyun         best->type |= M_T_PREFERRED;
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun #define CEA_VIDEO_MODES_NUM  64
914*4882a593Smuzhiyun static const DisplayModeRec CEAVideoModes[CEA_VIDEO_MODES_NUM] = {
915*4882a593Smuzhiyun     {MODEPREFIX, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 1:640x480@60Hz */
916*4882a593Smuzhiyun     {MODEPREFIX, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 2:720x480@60Hz */
917*4882a593Smuzhiyun     {MODEPREFIX, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 3:720x480@60Hz */
918*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* VIC 4: 1280x720@60Hz */
919*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},   /* VIC 5:1920x1080i@60Hz */
920*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 6:1440x480i@60Hz */
921*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 7:1440x480i@60Hz */
922*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 8:1440x240@60Hz */
923*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1478, 1602, 1716, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 9:1440x240@60Hz */
924*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 10:2880x480i@60Hz */
925*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 11:2880x480i@60Hz */
926*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 12:2880x240@60Hz */
927*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 13:2880x240@60Hz */
928*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 14:1440x480@60Hz */
929*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 15:1440x480@60Hz */
930*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* VIC 16:1920x1080@60Hz */
931*4882a593Smuzhiyun     {MODEPREFIX, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 17:720x576@50Hz */
932*4882a593Smuzhiyun     {MODEPREFIX, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 18:720x576@50Hz */
933*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* VIC 19: 1280x720@50Hz */
934*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},   /* VIC 20:1920x1080i@50Hz */
935*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 21:1440x576i@50Hz */
936*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 22:1440x576i@50Hz */
937*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 23:1440x288@50Hz */
938*4882a593Smuzhiyun     {MODEPREFIX, 27000, 1440, 1464, 1590, 1728, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 24:1440x288@50Hz */
939*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 25:2880x576i@50Hz */
940*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 26:2880x576i@50Hz */
941*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 27:2880x288@50Hz */
942*4882a593Smuzhiyun     {MODEPREFIX, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 28:2880x288@50Hz */
943*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 29:1440x576@50Hz */
944*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 30:1440x576@50Hz */
945*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* VIC 31:1920x1080@50Hz */
946*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 32:1920x1080@24Hz */
947*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 33:1920x1080@25Hz */
948*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX}, /* VIC 34:1920x1080@30Hz */
949*4882a593Smuzhiyun     {MODEPREFIX, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},    /* VIC 35:2880x480@60Hz */
950*4882a593Smuzhiyun     {MODEPREFIX, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},    /* VIC 36:2880x480@60Hz */
951*4882a593Smuzhiyun     {MODEPREFIX, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},    /* VIC 37:2880x576@50Hz */
952*4882a593Smuzhiyun     {MODEPREFIX, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},    /* VIC 38:2880x576@50Hz */
953*4882a593Smuzhiyun     {MODEPREFIX, 72000, 1920, 1952, 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, V_PHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},   /* VIC 39:1920x1080i@50Hz */
954*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},  /* VIC 40:1920x1080i@100Hz */
955*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},    /* VIC 41:1280x720@100Hz */
956*4882a593Smuzhiyun     {MODEPREFIX, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 42:720x576@100Hz */
957*4882a593Smuzhiyun     {MODEPREFIX, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 43:720x576@100Hz */
958*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 44:1440x576i@100Hz */
959*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},     /* VIC 45:1440x576i@100Hz */
960*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX},  /* VIC 46:1920x1080i@120Hz */
961*4882a593Smuzhiyun     {MODEPREFIX, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},    /* VIC 47:1280x720@120Hz */
962*4882a593Smuzhiyun     {MODEPREFIX, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 48:720x480@120Hz */
963*4882a593Smuzhiyun     {MODEPREFIX, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX}, /* VIC 49:720x480@120Hz */
964*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 50:1440x480i@120Hz */
965*4882a593Smuzhiyun     {MODEPREFIX, 54000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},       /* VIC 51:1440x480i@120Hz */
966*4882a593Smuzhiyun     {MODEPREFIX, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},        /* VIC 52:720x576@200Hz */
967*4882a593Smuzhiyun     {MODEPREFIX, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},        /* VIC 53:720x576@200Hz */
968*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},      /* VIC 54:1440x576i@200Hz */
969*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1440, 1464, 1590, 1728, 0, 576, 580, 586, 625, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},      /* VIC 55:1440x576i@200Hz */
970*4882a593Smuzhiyun     {MODEPREFIX, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},        /* VIC 56:720x480@240Hz */
971*4882a593Smuzhiyun     {MODEPREFIX, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX},        /* VIC 57:720x480@240Hz */
972*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},      /* VIC 58:1440x480i@240 */
973*4882a593Smuzhiyun     {MODEPREFIX, 108000, 1440, 1478, 1602, 1716, 0, 480, 488, 494, 525, 0, V_NHSYNC | V_NVSYNC | V_INTERLACE, MODESUFFIX},      /* VIC 59:1440x480i@240 */
974*4882a593Smuzhiyun     {MODEPREFIX, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* VIC 60: 1280x720@24Hz */
975*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* VIC 61: 1280x720@25Hz */
976*4882a593Smuzhiyun     {MODEPREFIX, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},     /* VIC 62: 1280x720@30Hz */
977*4882a593Smuzhiyun     {MODEPREFIX, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* VIC 63: 1920x1080@120Hz */
978*4882a593Smuzhiyun     {MODEPREFIX, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX},        /* VIC 64:1920x1080@100Hz */
979*4882a593Smuzhiyun };
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun /* chose mode line by cea short video descriptor*/
982*4882a593Smuzhiyun static void
handle_cea_svd(struct cea_video_block * video,void * data)983*4882a593Smuzhiyun handle_cea_svd(struct cea_video_block *video, void *data)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun     DisplayModePtr Mode;
986*4882a593Smuzhiyun     DisplayModePtr *Modes = (DisplayModePtr *) data;
987*4882a593Smuzhiyun     int vid;
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun     vid = video->video_code & 0x7f;
990*4882a593Smuzhiyun     if (vid >= 1 && vid <= CEA_VIDEO_MODES_NUM) {
991*4882a593Smuzhiyun         Mode = xf86DuplicateMode(CEAVideoModes + (vid - 1));
992*4882a593Smuzhiyun         *Modes = xf86ModesAdd(*Modes, Mode);
993*4882a593Smuzhiyun     }
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun 
996*4882a593Smuzhiyun static DisplayModePtr
DDCModesFromCEAExtension(int scrnIndex,xf86MonPtr mon_ptr)997*4882a593Smuzhiyun DDCModesFromCEAExtension(int scrnIndex, xf86MonPtr mon_ptr)
998*4882a593Smuzhiyun {
999*4882a593Smuzhiyun     DisplayModePtr Modes = NULL;
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun     xf86ForEachVideoBlock(mon_ptr, handle_cea_svd, &Modes);
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun     return Modes;
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun struct det_modes_parameter {
1007*4882a593Smuzhiyun     xf86MonPtr DDC;
1008*4882a593Smuzhiyun     ddc_quirk_t quirks;
1009*4882a593Smuzhiyun     DisplayModePtr Modes;
1010*4882a593Smuzhiyun     Bool rb;
1011*4882a593Smuzhiyun     Bool preferred;
1012*4882a593Smuzhiyun     int timing_level;
1013*4882a593Smuzhiyun };
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun static void
handle_detailed_modes(struct detailed_monitor_section * det_mon,void * data)1016*4882a593Smuzhiyun handle_detailed_modes(struct detailed_monitor_section *det_mon, void *data)
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun     DisplayModePtr Mode;
1019*4882a593Smuzhiyun     struct det_modes_parameter *p = (struct det_modes_parameter *) data;
1020*4882a593Smuzhiyun 
1021*4882a593Smuzhiyun     xf86DetTimingApplyQuirks(det_mon, p->quirks,
1022*4882a593Smuzhiyun                              p->DDC->features.hsize, p->DDC->features.vsize);
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun     switch (det_mon->type) {
1025*4882a593Smuzhiyun     case DT:
1026*4882a593Smuzhiyun         Mode = DDCModeFromDetailedTiming(p->DDC->scrnIndex,
1027*4882a593Smuzhiyun                                          &det_mon->section.d_timings,
1028*4882a593Smuzhiyun                                          p->preferred, p->quirks);
1029*4882a593Smuzhiyun         p->preferred = FALSE;
1030*4882a593Smuzhiyun         p->Modes = xf86ModesAdd(p->Modes, Mode);
1031*4882a593Smuzhiyun         break;
1032*4882a593Smuzhiyun     case DS_STD_TIMINGS:
1033*4882a593Smuzhiyun         Mode = DDCModesFromStandardTiming(p->Modes,
1034*4882a593Smuzhiyun                                           det_mon->section.std_t,
1035*4882a593Smuzhiyun                                           p->quirks, p->timing_level, p->rb);
1036*4882a593Smuzhiyun         p->Modes = xf86ModesAdd(p->Modes, Mode);
1037*4882a593Smuzhiyun         break;
1038*4882a593Smuzhiyun     case DS_CVT:
1039*4882a593Smuzhiyun         Mode = DDCModesFromCVT(p->DDC->scrnIndex, det_mon->section.cvt);
1040*4882a593Smuzhiyun         p->Modes = xf86ModesAdd(p->Modes, Mode);
1041*4882a593Smuzhiyun         break;
1042*4882a593Smuzhiyun     case DS_EST_III:
1043*4882a593Smuzhiyun         Mode = DDCModesFromEstIII(det_mon->section.est_iii);
1044*4882a593Smuzhiyun         p->Modes = xf86ModesAdd(p->Modes, Mode);
1045*4882a593Smuzhiyun         break;
1046*4882a593Smuzhiyun     default:
1047*4882a593Smuzhiyun         break;
1048*4882a593Smuzhiyun     }
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun 
1051*4882a593Smuzhiyun DisplayModePtr
xf86DDCGetModes(int scrnIndex,xf86MonPtr DDC)1052*4882a593Smuzhiyun xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC)
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun     DisplayModePtr Modes = NULL, Mode;
1055*4882a593Smuzhiyun     ddc_quirk_t quirks;
1056*4882a593Smuzhiyun     Bool preferred, rb;
1057*4882a593Smuzhiyun     int timing_level;
1058*4882a593Smuzhiyun     struct det_modes_parameter p;
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun     xf86DrvMsg(scrnIndex, X_INFO, "EDID vendor \"%s\", prod id %d\n",
1061*4882a593Smuzhiyun                DDC->vendor.name, DDC->vendor.prod_id);
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun     quirks = xf86DDCDetectQuirks(scrnIndex, DDC, TRUE);
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun     preferred = PREFERRED_TIMING_MODE(DDC->features.msc);
1066*4882a593Smuzhiyun     if (DDC->ver.revision >= 4)
1067*4882a593Smuzhiyun         preferred = TRUE;
1068*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_FIRST_DETAILED_PREFERRED)
1069*4882a593Smuzhiyun         preferred = TRUE;
1070*4882a593Smuzhiyun     if (quirks & (DDC_QUIRK_PREFER_LARGE_60 | DDC_QUIRK_PREFER_LARGE_75))
1071*4882a593Smuzhiyun         preferred = FALSE;
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun     rb = xf86MonitorSupportsReducedBlanking(DDC);
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun     timing_level = MonitorStandardTimingLevel(DDC);
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun     p.quirks = quirks;
1078*4882a593Smuzhiyun     p.DDC = DDC;
1079*4882a593Smuzhiyun     p.Modes = Modes;
1080*4882a593Smuzhiyun     p.rb = rb;
1081*4882a593Smuzhiyun     p.preferred = preferred;
1082*4882a593Smuzhiyun     p.timing_level = timing_level;
1083*4882a593Smuzhiyun     xf86ForEachDetailedBlock(DDC, handle_detailed_modes, &p);
1084*4882a593Smuzhiyun     Modes = p.Modes;
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun     /* Add cea-extension mode timings */
1087*4882a593Smuzhiyun     Mode = DDCModesFromCEAExtension(scrnIndex, DDC);
1088*4882a593Smuzhiyun     Modes = xf86ModesAdd(Modes, Mode);
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun     /* Add established timings */
1091*4882a593Smuzhiyun     Mode = DDCModesFromEstablished(scrnIndex, &DDC->timings1, quirks);
1092*4882a593Smuzhiyun     Modes = xf86ModesAdd(Modes, Mode);
1093*4882a593Smuzhiyun 
1094*4882a593Smuzhiyun     /* Add standard timings */
1095*4882a593Smuzhiyun     Mode = DDCModesFromStandardTiming(Modes, DDC->timings2, quirks,
1096*4882a593Smuzhiyun                                       timing_level, rb);
1097*4882a593Smuzhiyun     Modes = xf86ModesAdd(Modes, Mode);
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_PREFER_LARGE_60)
1100*4882a593Smuzhiyun         xf86DDCSetPreferredRefresh(scrnIndex, Modes, 60);
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun     if (quirks & DDC_QUIRK_PREFER_LARGE_75)
1103*4882a593Smuzhiyun         xf86DDCSetPreferredRefresh(scrnIndex, Modes, 75);
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun     Modes = xf86PruneDuplicateModes(Modes);
1106*4882a593Smuzhiyun 
1107*4882a593Smuzhiyun     return Modes;
1108*4882a593Smuzhiyun }
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun struct det_mon_parameter {
1111*4882a593Smuzhiyun     MonPtr Monitor;
1112*4882a593Smuzhiyun     ddc_quirk_t quirks;
1113*4882a593Smuzhiyun     Bool have_hsync;
1114*4882a593Smuzhiyun     Bool have_vrefresh;
1115*4882a593Smuzhiyun     Bool have_maxpixclock;
1116*4882a593Smuzhiyun };
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun static void
handle_detailed_monset(struct detailed_monitor_section * det_mon,void * data)1119*4882a593Smuzhiyun handle_detailed_monset(struct detailed_monitor_section *det_mon, void *data)
1120*4882a593Smuzhiyun {
1121*4882a593Smuzhiyun     int clock;
1122*4882a593Smuzhiyun     struct det_mon_parameter *p = (struct det_mon_parameter *) data;
1123*4882a593Smuzhiyun     int scrnIndex = ((xf86MonPtr) (p->Monitor->DDC))->scrnIndex;
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun     switch (det_mon->type) {
1126*4882a593Smuzhiyun     case DS_RANGES:
1127*4882a593Smuzhiyun         if (!p->have_hsync) {
1128*4882a593Smuzhiyun             if (!p->Monitor->nHsync)
1129*4882a593Smuzhiyun                 xf86DrvMsg(scrnIndex, X_INFO,
1130*4882a593Smuzhiyun                            "Using EDID range info for horizontal sync\n");
1131*4882a593Smuzhiyun             p->Monitor->hsync[p->Monitor->nHsync].lo =
1132*4882a593Smuzhiyun                 det_mon->section.ranges.min_h;
1133*4882a593Smuzhiyun             p->Monitor->hsync[p->Monitor->nHsync].hi =
1134*4882a593Smuzhiyun                 det_mon->section.ranges.max_h;
1135*4882a593Smuzhiyun             p->Monitor->nHsync++;
1136*4882a593Smuzhiyun         }
1137*4882a593Smuzhiyun         else {
1138*4882a593Smuzhiyun             xf86DrvMsg(scrnIndex, X_INFO,
1139*4882a593Smuzhiyun                        "Using hsync ranges from config file\n");
1140*4882a593Smuzhiyun         }
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun         if (!p->have_vrefresh) {
1143*4882a593Smuzhiyun             if (!p->Monitor->nVrefresh)
1144*4882a593Smuzhiyun                 xf86DrvMsg(scrnIndex, X_INFO,
1145*4882a593Smuzhiyun                            "Using EDID range info for vertical refresh\n");
1146*4882a593Smuzhiyun             p->Monitor->vrefresh[p->Monitor->nVrefresh].lo =
1147*4882a593Smuzhiyun                 det_mon->section.ranges.min_v;
1148*4882a593Smuzhiyun             p->Monitor->vrefresh[p->Monitor->nVrefresh].hi =
1149*4882a593Smuzhiyun                 det_mon->section.ranges.max_v;
1150*4882a593Smuzhiyun             p->Monitor->nVrefresh++;
1151*4882a593Smuzhiyun         }
1152*4882a593Smuzhiyun         else {
1153*4882a593Smuzhiyun             xf86DrvMsg(scrnIndex, X_INFO,
1154*4882a593Smuzhiyun                        "Using vrefresh ranges from config file\n");
1155*4882a593Smuzhiyun         }
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun         clock = det_mon->section.ranges.max_clock * 1000;
1158*4882a593Smuzhiyun         if (p->quirks & DDC_QUIRK_DVI_SINGLE_LINK)
1159*4882a593Smuzhiyun             clock = min(clock, 165000);
1160*4882a593Smuzhiyun         if (!p->have_maxpixclock && clock > p->Monitor->maxPixClock)
1161*4882a593Smuzhiyun             p->Monitor->maxPixClock = clock;
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun         break;
1164*4882a593Smuzhiyun     default:
1165*4882a593Smuzhiyun         break;
1166*4882a593Smuzhiyun     }
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun 
1169*4882a593Smuzhiyun /*
1170*4882a593Smuzhiyun  * Fill out MonPtr with xf86MonPtr information.
1171*4882a593Smuzhiyun  */
1172*4882a593Smuzhiyun void
xf86EdidMonitorSet(int scrnIndex,MonPtr Monitor,xf86MonPtr DDC)1173*4882a593Smuzhiyun xf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun     DisplayModePtr Modes = NULL, Mode;
1176*4882a593Smuzhiyun     struct det_mon_parameter p;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun     if (!Monitor || !DDC)
1179*4882a593Smuzhiyun         return;
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun     Monitor->DDC = DDC;
1182*4882a593Smuzhiyun 
1183*4882a593Smuzhiyun     if (Monitor->widthmm <= 0 || Monitor->heightmm <= 0) {
1184*4882a593Smuzhiyun         Monitor->widthmm = 10 * DDC->features.hsize;
1185*4882a593Smuzhiyun         Monitor->heightmm = 10 * DDC->features.vsize;
1186*4882a593Smuzhiyun     }
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun     Monitor->reducedblanking = xf86MonitorSupportsReducedBlanking(DDC);
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun     Modes = xf86DDCGetModes(scrnIndex, DDC);
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun     /* Go through the detailed monitor sections */
1193*4882a593Smuzhiyun     p.Monitor = Monitor;
1194*4882a593Smuzhiyun     p.quirks = xf86DDCDetectQuirks(scrnIndex, Monitor->DDC, FALSE);
1195*4882a593Smuzhiyun     p.have_hsync = (Monitor->nHsync != 0);
1196*4882a593Smuzhiyun     p.have_vrefresh = (Monitor->nVrefresh != 0);
1197*4882a593Smuzhiyun     p.have_maxpixclock = (Monitor->maxPixClock != 0);
1198*4882a593Smuzhiyun     xf86ForEachDetailedBlock(DDC, handle_detailed_monset, &p);
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun     if (Modes) {
1201*4882a593Smuzhiyun         /* Print Modes */
1202*4882a593Smuzhiyun         xf86DrvMsg(scrnIndex, X_INFO, "Printing DDC gathered Modelines:\n");
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun         Mode = Modes;
1205*4882a593Smuzhiyun         while (Mode) {
1206*4882a593Smuzhiyun             xf86PrintModeline(scrnIndex, Mode);
1207*4882a593Smuzhiyun             Mode = Mode->next;
1208*4882a593Smuzhiyun         }
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun         /* Do we still need ranges to be filled in? */
1211*4882a593Smuzhiyun         if (!Monitor->nHsync || !Monitor->nVrefresh)
1212*4882a593Smuzhiyun             DDCGuessRangesFromModes(scrnIndex, Monitor, Modes);
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun         /* add to MonPtr */
1215*4882a593Smuzhiyun         if (Monitor->Modes) {
1216*4882a593Smuzhiyun             Monitor->Last->next = Modes;
1217*4882a593Smuzhiyun             Modes->prev = Monitor->Last;
1218*4882a593Smuzhiyun         }
1219*4882a593Smuzhiyun         else {
1220*4882a593Smuzhiyun             Monitor->Modes = Modes;
1221*4882a593Smuzhiyun         }
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun         Monitor->Modes = xf86PruneDuplicateModes(Monitor->Modes);
1224*4882a593Smuzhiyun 
1225*4882a593Smuzhiyun         /* Update pointer to last mode */
1226*4882a593Smuzhiyun         for (Mode = Monitor->Modes; Mode && Mode->next; Mode = Mode->next) {}
1227*4882a593Smuzhiyun         Monitor->Last = Mode;
1228*4882a593Smuzhiyun     }
1229*4882a593Smuzhiyun }
1230