1*4882a593Smuzhiyun 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * XFree86 int10 module 4*4882a593Smuzhiyun * execute BIOS int 10h calls in x86 real mode environment 5*4882a593Smuzhiyun * Copyright 1999 Egbert Eich 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _XF86INT10_H 9*4882a593Smuzhiyun #define _XF86INT10_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <X11/Xmd.h> 12*4882a593Smuzhiyun #include <X11/Xdefs.h> 13*4882a593Smuzhiyun #include "xf86Pci.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define SEG_ADDR(x) (((x) >> 4) & 0x00F000) 16*4882a593Smuzhiyun #define SEG_OFF(x) ((x) & 0x0FFFF) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define SET_BIOS_SCRATCH 0x1 19*4882a593Smuzhiyun #define RESTORE_BIOS_SCRATCH 0x2 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* int10 info structure */ 22*4882a593Smuzhiyun typedef struct { 23*4882a593Smuzhiyun int entityIndex; 24*4882a593Smuzhiyun uint16_t BIOSseg; 25*4882a593Smuzhiyun uint16_t inb40time; 26*4882a593Smuzhiyun ScrnInfoPtr pScrn; 27*4882a593Smuzhiyun void *cpuRegs; 28*4882a593Smuzhiyun char *BIOSScratch; 29*4882a593Smuzhiyun int Flags; 30*4882a593Smuzhiyun void *private; 31*4882a593Smuzhiyun struct _int10Mem *mem; 32*4882a593Smuzhiyun int num; 33*4882a593Smuzhiyun int ax; 34*4882a593Smuzhiyun int bx; 35*4882a593Smuzhiyun int cx; 36*4882a593Smuzhiyun int dx; 37*4882a593Smuzhiyun int si; 38*4882a593Smuzhiyun int di; 39*4882a593Smuzhiyun int es; 40*4882a593Smuzhiyun int bp; 41*4882a593Smuzhiyun int flags; 42*4882a593Smuzhiyun int stackseg; 43*4882a593Smuzhiyun struct pci_device *dev; 44*4882a593Smuzhiyun struct pci_io_handle *io; 45*4882a593Smuzhiyun } xf86Int10InfoRec, *xf86Int10InfoPtr; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun typedef struct _int10Mem { 48*4882a593Smuzhiyun uint8_t (*rb) (xf86Int10InfoPtr, int); 49*4882a593Smuzhiyun uint16_t (*rw) (xf86Int10InfoPtr, int); 50*4882a593Smuzhiyun uint32_t (*rl) (xf86Int10InfoPtr, int); 51*4882a593Smuzhiyun void (*wb) (xf86Int10InfoPtr, int, uint8_t); 52*4882a593Smuzhiyun void (*ww) (xf86Int10InfoPtr, int, uint16_t); 53*4882a593Smuzhiyun void (*wl) (xf86Int10InfoPtr, int, uint32_t); 54*4882a593Smuzhiyun } int10MemRec, *int10MemPtr; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun typedef struct { 57*4882a593Smuzhiyun uint8_t save_msr; 58*4882a593Smuzhiyun uint8_t save_pos102; 59*4882a593Smuzhiyun uint8_t save_vse; 60*4882a593Smuzhiyun uint8_t save_46e8; 61*4882a593Smuzhiyun } legacyVGARec, *legacyVGAPtr; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* OS dependent functions */ 64*4882a593Smuzhiyun extern _X_EXPORT xf86Int10InfoPtr xf86InitInt10(int entityIndex); 65*4882a593Smuzhiyun extern _X_EXPORT xf86Int10InfoPtr xf86ExtendedInitInt10(int entityIndex, 66*4882a593Smuzhiyun int Flags); 67*4882a593Smuzhiyun extern _X_EXPORT void xf86FreeInt10(xf86Int10InfoPtr pInt); 68*4882a593Smuzhiyun extern _X_EXPORT void *xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, 69*4882a593Smuzhiyun int *off); 70*4882a593Smuzhiyun extern _X_EXPORT void xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, 71*4882a593Smuzhiyun int num); 72*4882a593Smuzhiyun extern _X_EXPORT void *xf86int10Addr(xf86Int10InfoPtr pInt, uint32_t addr); 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* x86 executor related functions */ 75*4882a593Smuzhiyun extern _X_EXPORT void xf86ExecX86int10(xf86Int10InfoPtr pInt); 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #ifdef _INT10_PRIVATE 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define I_S_DEFAULT_INT_VECT 0xFF065 80*4882a593Smuzhiyun #define SYS_SIZE 0x100000 81*4882a593Smuzhiyun #define SYS_BIOS 0xF0000 82*4882a593Smuzhiyun #if 1 83*4882a593Smuzhiyun #define BIOS_SIZE 0x10000 84*4882a593Smuzhiyun #else /* a bug in DGUX requires this - let's try it */ 85*4882a593Smuzhiyun #define BIOS_SIZE (0x10000 - 1) 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun #define LOW_PAGE_SIZE 0x600 88*4882a593Smuzhiyun #define V_RAM 0xA0000 89*4882a593Smuzhiyun #define VRAM_SIZE 0x20000 90*4882a593Smuzhiyun #define V_BIOS_SIZE 0x10000 91*4882a593Smuzhiyun #define V_BIOS 0xC0000 92*4882a593Smuzhiyun #define BIOS_SCRATCH_OFF 0x449 93*4882a593Smuzhiyun #define BIOS_SCRATCH_END 0x466 94*4882a593Smuzhiyun #define BIOS_SCRATCH_LEN (BIOS_SCRATCH_END - BIOS_SCRATCH_OFF + 1) 95*4882a593Smuzhiyun #define HIGH_MEM V_BIOS 96*4882a593Smuzhiyun #define HIGH_MEM_SIZE (SYS_BIOS - HIGH_MEM) 97*4882a593Smuzhiyun #define SEG_ADR(type, seg, reg) type((seg << 4) + (X86_##reg)) 98*4882a593Smuzhiyun #define SEG_EADR(type, seg, reg) type((seg << 4) + (X86_E##reg)) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define X86_TF_MASK 0x00000100 101*4882a593Smuzhiyun #define X86_IF_MASK 0x00000200 102*4882a593Smuzhiyun #define X86_IOPL_MASK 0x00003000 103*4882a593Smuzhiyun #define X86_NT_MASK 0x00004000 104*4882a593Smuzhiyun #define X86_VM_MASK 0x00020000 105*4882a593Smuzhiyun #define X86_AC_MASK 0x00040000 106*4882a593Smuzhiyun #define X86_VIF_MASK 0x00080000 /* virtual interrupt flag */ 107*4882a593Smuzhiyun #define X86_VIP_MASK 0x00100000 /* virtual interrupt pending */ 108*4882a593Smuzhiyun #define X86_ID_MASK 0x00200000 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define MEM_RB(name, addr) (*name->mem->rb)(name, addr) 111*4882a593Smuzhiyun #define MEM_RW(name, addr) (*name->mem->rw)(name, addr) 112*4882a593Smuzhiyun #define MEM_RL(name, addr) (*name->mem->rl)(name, addr) 113*4882a593Smuzhiyun #define MEM_WB(name, addr, val) (*name->mem->wb)(name, addr, val) 114*4882a593Smuzhiyun #define MEM_WW(name, addr, val) (*name->mem->ww)(name, addr, val) 115*4882a593Smuzhiyun #define MEM_WL(name, addr, val) (*name->mem->wl)(name, addr, val) 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* OS dependent functions */ 118*4882a593Smuzhiyun extern _X_EXPORT Bool MapCurrentInt10(xf86Int10InfoPtr pInt); 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* x86 executor related functions */ 121*4882a593Smuzhiyun extern _X_EXPORT Bool xf86Int10ExecSetup(xf86Int10InfoPtr pInt); 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* int.c */ 124*4882a593Smuzhiyun extern _X_EXPORT xf86Int10InfoPtr Int10Current; 125*4882a593Smuzhiyun int int_handler(xf86Int10InfoPtr pInt); 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* helper_exec.c */ 128*4882a593Smuzhiyun int setup_int(xf86Int10InfoPtr pInt); 129*4882a593Smuzhiyun void finish_int(xf86Int10InfoPtr, int sig); 130*4882a593Smuzhiyun uint32_t getIntVect(xf86Int10InfoPtr pInt, int num); 131*4882a593Smuzhiyun void pushw(xf86Int10InfoPtr pInt, uint16_t val); 132*4882a593Smuzhiyun int run_bios_int(int num, xf86Int10InfoPtr pInt); 133*4882a593Smuzhiyun void dump_code(xf86Int10InfoPtr pInt); 134*4882a593Smuzhiyun void dump_registers(xf86Int10InfoPtr pInt); 135*4882a593Smuzhiyun void stack_trace(xf86Int10InfoPtr pInt); 136*4882a593Smuzhiyun uint8_t bios_checksum(const uint8_t *start, int size); 137*4882a593Smuzhiyun void LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga); 138*4882a593Smuzhiyun void UnlockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga); 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #if defined (_PC) 141*4882a593Smuzhiyun extern _X_EXPORT void xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, 142*4882a593Smuzhiyun Bool save); 143*4882a593Smuzhiyun #endif 144*4882a593Smuzhiyun int port_rep_inb(xf86Int10InfoPtr pInt, 145*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 146*4882a593Smuzhiyun int port_rep_inw(xf86Int10InfoPtr pInt, 147*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 148*4882a593Smuzhiyun int port_rep_inl(xf86Int10InfoPtr pInt, 149*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 150*4882a593Smuzhiyun int port_rep_outb(xf86Int10InfoPtr pInt, 151*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 152*4882a593Smuzhiyun int port_rep_outw(xf86Int10InfoPtr pInt, 153*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 154*4882a593Smuzhiyun int port_rep_outl(xf86Int10InfoPtr pInt, 155*4882a593Smuzhiyun uint16_t port, uint32_t base, int d_f, uint32_t count); 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun uint8_t x_inb(uint16_t port); 158*4882a593Smuzhiyun uint16_t x_inw(uint16_t port); 159*4882a593Smuzhiyun void x_outb(uint16_t port, uint8_t val); 160*4882a593Smuzhiyun void x_outw(uint16_t port, uint16_t val); 161*4882a593Smuzhiyun uint32_t x_inl(uint16_t port); 162*4882a593Smuzhiyun void x_outl(uint16_t port, uint32_t val); 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun uint8_t Mem_rb(uint32_t addr); 165*4882a593Smuzhiyun uint16_t Mem_rw(uint32_t addr); 166*4882a593Smuzhiyun uint32_t Mem_rl(uint32_t addr); 167*4882a593Smuzhiyun void Mem_wb(uint32_t addr, uint8_t val); 168*4882a593Smuzhiyun void Mem_ww(uint32_t addr, uint16_t val); 169*4882a593Smuzhiyun void Mem_wl(uint32_t addr, uint32_t val); 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* helper_mem.c */ 172*4882a593Smuzhiyun void setup_int_vect(xf86Int10InfoPtr pInt); 173*4882a593Smuzhiyun int setup_system_bios(void *base_addr); 174*4882a593Smuzhiyun void reset_int_vect(xf86Int10InfoPtr pInt); 175*4882a593Smuzhiyun void set_return_trap(xf86Int10InfoPtr pInt); 176*4882a593Smuzhiyun extern _X_EXPORT void *xf86HandleInt10Options(ScrnInfoPtr pScrn, 177*4882a593Smuzhiyun int entityIndex); 178*4882a593Smuzhiyun Bool int10skip(const void *options); 179*4882a593Smuzhiyun Bool int10_check_bios(int scrnIndex, int codeSeg, 180*4882a593Smuzhiyun const unsigned char *vbiosMem); 181*4882a593Smuzhiyun Bool initPrimary(const void *options); 182*4882a593Smuzhiyun extern _X_EXPORT BusType xf86int10GetBiosLocationType(const xf86Int10InfoPtr 183*4882a593Smuzhiyun pInt); 184*4882a593Smuzhiyun extern _X_EXPORT Bool xf86int10GetBiosSegment(xf86Int10InfoPtr pInt, 185*4882a593Smuzhiyun void *base); 186*4882a593Smuzhiyun #ifdef DEBUG 187*4882a593Smuzhiyun void dprint(unsigned long start, unsigned long size); 188*4882a593Smuzhiyun #endif 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun #endif /* _INT10_PRIVATE */ 191*4882a593Smuzhiyun #endif /* _XF86INT10_H */ 192