1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * edid.h: defines to parse an EDID block 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file contains all information to interpret a standard EDIC block 5*4882a593Smuzhiyun * transmitted by a display device via DDC (Display Data Channel). So far 6*4882a593Smuzhiyun * there is no information to deal with optional EDID blocks. 7*4882a593Smuzhiyun * DDC is a Trademark of VESA (Video Electronics Standard Association). 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef _EDID_H_ 13*4882a593Smuzhiyun #define _EDID_H_ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <X11/Xmd.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifndef _X_EXPORT 18*4882a593Smuzhiyun #include <X11/Xfuncproto.h> 19*4882a593Smuzhiyun #endif 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* read complete EDID record */ 22*4882a593Smuzhiyun #define EDID1_LEN 128 23*4882a593Smuzhiyun #define BITS_PER_BYTE 9 24*4882a593Smuzhiyun #define NUM BITS_PER_BYTE*EDID1_LEN 25*4882a593Smuzhiyun #define HEADER 6 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define STD_TIMINGS 8 28*4882a593Smuzhiyun #define DET_TIMINGS 4 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #ifdef _PARSE_EDID_ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* header: 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 */ 33*4882a593Smuzhiyun #define HEADER_SECTION 0 34*4882a593Smuzhiyun #define HEADER_LENGTH 8 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* vendor section */ 37*4882a593Smuzhiyun #define VENDOR_SECTION (HEADER_SECTION + HEADER_LENGTH) 38*4882a593Smuzhiyun #define V_MANUFACTURER 0 39*4882a593Smuzhiyun #define V_PROD_ID (V_MANUFACTURER + 2) 40*4882a593Smuzhiyun #define V_SERIAL (V_PROD_ID + 2) 41*4882a593Smuzhiyun #define V_WEEK (V_SERIAL + 4) 42*4882a593Smuzhiyun #define V_YEAR (V_WEEK + 1) 43*4882a593Smuzhiyun #define VENDOR_LENGTH (V_YEAR + 1) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* EDID version */ 46*4882a593Smuzhiyun #define VERSION_SECTION (VENDOR_SECTION + VENDOR_LENGTH) 47*4882a593Smuzhiyun #define V_VERSION 0 48*4882a593Smuzhiyun #define V_REVISION (V_VERSION + 1) 49*4882a593Smuzhiyun #define VERSION_LENGTH (V_REVISION + 1) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* display information */ 52*4882a593Smuzhiyun #define DISPLAY_SECTION (VERSION_SECTION + VERSION_LENGTH) 53*4882a593Smuzhiyun #define D_INPUT 0 54*4882a593Smuzhiyun #define D_HSIZE (D_INPUT + 1) 55*4882a593Smuzhiyun #define D_VSIZE (D_HSIZE + 1) 56*4882a593Smuzhiyun #define D_GAMMA (D_VSIZE + 1) 57*4882a593Smuzhiyun #define FEAT_S (D_GAMMA + 1) 58*4882a593Smuzhiyun #define D_RG_LOW (FEAT_S + 1) 59*4882a593Smuzhiyun #define D_BW_LOW (D_RG_LOW + 1) 60*4882a593Smuzhiyun #define D_REDX (D_BW_LOW + 1) 61*4882a593Smuzhiyun #define D_REDY (D_REDX + 1) 62*4882a593Smuzhiyun #define D_GREENX (D_REDY + 1) 63*4882a593Smuzhiyun #define D_GREENY (D_GREENX + 1) 64*4882a593Smuzhiyun #define D_BLUEX (D_GREENY + 1) 65*4882a593Smuzhiyun #define D_BLUEY (D_BLUEX + 1) 66*4882a593Smuzhiyun #define D_WHITEX (D_BLUEY + 1) 67*4882a593Smuzhiyun #define D_WHITEY (D_WHITEX + 1) 68*4882a593Smuzhiyun #define DISPLAY_LENGTH (D_WHITEY + 1) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* supported VESA and other standard timings */ 71*4882a593Smuzhiyun #define ESTABLISHED_TIMING_SECTION (DISPLAY_SECTION + DISPLAY_LENGTH) 72*4882a593Smuzhiyun #define E_T1 0 73*4882a593Smuzhiyun #define E_T2 (E_T1 + 1) 74*4882a593Smuzhiyun #define E_TMANU (E_T2 + 1) 75*4882a593Smuzhiyun #define E_TIMING_LENGTH (E_TMANU + 1) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* non predefined standard timings supported by display */ 78*4882a593Smuzhiyun #define STD_TIMING_SECTION (ESTABLISHED_TIMING_SECTION + E_TIMING_LENGTH) 79*4882a593Smuzhiyun #define STD_TIMING_INFO_LEN 2 80*4882a593Smuzhiyun #define STD_TIMING_INFO_NUM STD_TIMINGS 81*4882a593Smuzhiyun #define STD_TIMING_LENGTH (STD_TIMING_INFO_LEN * STD_TIMING_INFO_NUM) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* detailed timing info of non standard timings */ 84*4882a593Smuzhiyun #define DET_TIMING_SECTION (STD_TIMING_SECTION + STD_TIMING_LENGTH) 85*4882a593Smuzhiyun #define DET_TIMING_INFO_LEN 18 86*4882a593Smuzhiyun #define MONITOR_DESC_LEN DET_TIMING_INFO_LEN 87*4882a593Smuzhiyun #define DET_TIMING_INFO_NUM DET_TIMINGS 88*4882a593Smuzhiyun #define DET_TIMING_LENGTH (DET_TIMING_INFO_LEN * DET_TIMING_INFO_NUM) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* number of EDID sections to follow */ 91*4882a593Smuzhiyun #define NO_EDID (DET_TIMING_SECTION + DET_TIMING_LENGTH) 92*4882a593Smuzhiyun /* one byte checksum */ 93*4882a593Smuzhiyun #define CHECKSUM (NO_EDID + 1) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #if (CHECKSUM != (EDID1_LEN - 1)) 96*4882a593Smuzhiyun #error "EDID1 length != 128!" 97*4882a593Smuzhiyun #endif 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #define SECTION(x,y) (Uchar *)(x + y) 100*4882a593Smuzhiyun #define GET_ARRAY(y) ((Uchar *)(c + y)) 101*4882a593Smuzhiyun #define GET(y) *(Uchar *)(c + y) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* extract information from vendor section */ 104*4882a593Smuzhiyun #define _PROD_ID(x) x[0] + (x[1] << 8); 105*4882a593Smuzhiyun #define PROD_ID _PROD_ID(GET_ARRAY(V_PROD_ID)) 106*4882a593Smuzhiyun #define _SERIAL_NO(x) x[0] + (x[1] << 8) + (x[2] << 16) + (x[3] << 24) 107*4882a593Smuzhiyun #define SERIAL_NO _SERIAL_NO(GET_ARRAY(V_SERIAL)) 108*4882a593Smuzhiyun #define _YEAR(x) (x & 0xFF) + 1990 109*4882a593Smuzhiyun #define YEAR _YEAR(GET(V_YEAR)) 110*4882a593Smuzhiyun #define WEEK GET(V_WEEK) & 0xFF 111*4882a593Smuzhiyun #define _L1(x) ((x[0] & 0x7C) >> 2) + '@' 112*4882a593Smuzhiyun #define _L2(x) ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@' 113*4882a593Smuzhiyun #define _L3(x) (x[1] & 0x1F) + '@'; 114*4882a593Smuzhiyun #define L1 _L1(GET_ARRAY(V_MANUFACTURER)) 115*4882a593Smuzhiyun #define L2 _L2(GET_ARRAY(V_MANUFACTURER)) 116*4882a593Smuzhiyun #define L3 _L3(GET_ARRAY(V_MANUFACTURER)) 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* extract information from version section */ 119*4882a593Smuzhiyun #define VERSION GET(V_VERSION) 120*4882a593Smuzhiyun #define REVISION GET(V_REVISION) 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* extract information from display section */ 123*4882a593Smuzhiyun #define _INPUT_TYPE(x) ((x & 0x80) >> 7) 124*4882a593Smuzhiyun #define INPUT_TYPE _INPUT_TYPE(GET(D_INPUT)) 125*4882a593Smuzhiyun #define _INPUT_VOLTAGE(x) ((x & 0x60) >> 5) 126*4882a593Smuzhiyun #define INPUT_VOLTAGE _INPUT_VOLTAGE(GET(D_INPUT)) 127*4882a593Smuzhiyun #define _SETUP(x) ((x & 0x10) >> 4) 128*4882a593Smuzhiyun #define SETUP _SETUP(GET(D_INPUT)) 129*4882a593Smuzhiyun #define _SYNC(x) (x & 0x0F) 130*4882a593Smuzhiyun #define SYNC _SYNC(GET(D_INPUT)) 131*4882a593Smuzhiyun #define _DFP(x) (x & 0x01) 132*4882a593Smuzhiyun #define DFP _DFP(GET(D_INPUT)) 133*4882a593Smuzhiyun #define _BPC(x) ((x & 0x70) >> 4) 134*4882a593Smuzhiyun #define BPC _BPC(GET(D_INPUT)) 135*4882a593Smuzhiyun #define _DIGITAL_INTERFACE(x) (x & 0x0F) 136*4882a593Smuzhiyun #define DIGITAL_INTERFACE _DIGITAL_INTERFACE(GET(D_INPUT)) 137*4882a593Smuzhiyun #define _GAMMA(x) (x == 0xff ? 0.0 : ((x + 100.0)/100.0)) 138*4882a593Smuzhiyun #define GAMMA _GAMMA(GET(D_GAMMA)) 139*4882a593Smuzhiyun #define HSIZE_MAX GET(D_HSIZE) 140*4882a593Smuzhiyun #define VSIZE_MAX GET(D_VSIZE) 141*4882a593Smuzhiyun #define _DPMS(x) ((x & 0xE0) >> 5) 142*4882a593Smuzhiyun #define DPMS _DPMS(GET(FEAT_S)) 143*4882a593Smuzhiyun #define _DISPLAY_TYPE(x) ((x & 0x18) >> 3) 144*4882a593Smuzhiyun #define DISPLAY_TYPE _DISPLAY_TYPE(GET(FEAT_S)) 145*4882a593Smuzhiyun #define _MSC(x) (x & 0x7) 146*4882a593Smuzhiyun #define MSC _MSC(GET(FEAT_S)) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* color characteristics */ 149*4882a593Smuzhiyun #define CC_L(x,y) ((x & (0x03 << y)) >> y) 150*4882a593Smuzhiyun #define CC_H(x) (x << 2) 151*4882a593Smuzhiyun #define I_CC(x,y,z) CC_H(y) | CC_L(x,z) 152*4882a593Smuzhiyun #define F_CC(x) ((x)/1024.0) 153*4882a593Smuzhiyun #define REDX F_CC(I_CC((GET(D_RG_LOW)),(GET(D_REDX)),6)) 154*4882a593Smuzhiyun #define REDY F_CC(I_CC((GET(D_RG_LOW)),(GET(D_REDY)),4)) 155*4882a593Smuzhiyun #define GREENX F_CC(I_CC((GET(D_RG_LOW)),(GET(D_GREENX)),2)) 156*4882a593Smuzhiyun #define GREENY F_CC(I_CC((GET(D_RG_LOW)),(GET(D_GREENY)),0)) 157*4882a593Smuzhiyun #define BLUEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_BLUEX)),6)) 158*4882a593Smuzhiyun #define BLUEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_BLUEY)),4)) 159*4882a593Smuzhiyun #define WHITEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEX)),2)) 160*4882a593Smuzhiyun #define WHITEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEY)),0)) 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun /* extract information from standard timing section */ 163*4882a593Smuzhiyun #define T1 GET(E_T1) 164*4882a593Smuzhiyun #define T2 GET(E_T2) 165*4882a593Smuzhiyun #define T_MANU GET(E_TMANU) 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun /* extract information from estabished timing section */ 168*4882a593Smuzhiyun #define _VALID_TIMING(x) !(((x[0] == 0x01) && (x[1] == 0x01)) \ 169*4882a593Smuzhiyun || ((x[0] == 0x00) && (x[1] == 0x00)) \ 170*4882a593Smuzhiyun || ((x[0] == 0x20) && (x[1] == 0x20)) ) 171*4882a593Smuzhiyun #define VALID_TIMING _VALID_TIMING(c) 172*4882a593Smuzhiyun #define _HSIZE1(x) ((x[0] + 31) * 8) 173*4882a593Smuzhiyun #define HSIZE1 _HSIZE1(c) 174*4882a593Smuzhiyun #define RATIO(x) ((x[1] & 0xC0) >> 6) 175*4882a593Smuzhiyun #define RATIO1_1 0 176*4882a593Smuzhiyun /* EDID Ver. 1.3 redefined this */ 177*4882a593Smuzhiyun #define RATIO16_10 RATIO1_1 178*4882a593Smuzhiyun #define RATIO4_3 1 179*4882a593Smuzhiyun #define RATIO5_4 2 180*4882a593Smuzhiyun #define RATIO16_9 3 181*4882a593Smuzhiyun #define _VSIZE1(x,y,r) switch(RATIO(x)){ \ 182*4882a593Smuzhiyun case RATIO1_1: y = ((v->version > 1 || v->revision > 2) \ 183*4882a593Smuzhiyun ? (_HSIZE1(x) * 10) / 16 : _HSIZE1(x)); break; \ 184*4882a593Smuzhiyun case RATIO4_3: y = _HSIZE1(x) * 3 / 4; break; \ 185*4882a593Smuzhiyun case RATIO5_4: y = _HSIZE1(x) * 4 / 5; break; \ 186*4882a593Smuzhiyun case RATIO16_9: y = _HSIZE1(x) * 9 / 16; break; \ 187*4882a593Smuzhiyun } 188*4882a593Smuzhiyun #define VSIZE1(x) _VSIZE1(c,x,v) 189*4882a593Smuzhiyun #define _REFRESH_R(x) (x[1] & 0x3F) + 60 190*4882a593Smuzhiyun #define REFRESH_R _REFRESH_R(c) 191*4882a593Smuzhiyun #define _ID_LOW(x) x[0] 192*4882a593Smuzhiyun #define ID_LOW _ID_LOW(c) 193*4882a593Smuzhiyun #define _ID_HIGH(x) (x[1] << 8) 194*4882a593Smuzhiyun #define ID_HIGH _ID_HIGH(c) 195*4882a593Smuzhiyun #define STD_TIMING_ID (ID_LOW | ID_HIGH) 196*4882a593Smuzhiyun #define _NEXT_STD_TIMING(x) (x = (x + STD_TIMING_INFO_LEN)) 197*4882a593Smuzhiyun #define NEXT_STD_TIMING _NEXT_STD_TIMING(c) 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun /* EDID Ver. >= 1.2 */ 200*4882a593Smuzhiyun /** 201*4882a593Smuzhiyun * Returns true if the pointer is the start of a monitor descriptor block 202*4882a593Smuzhiyun * instead of a detailed timing descriptor. 203*4882a593Smuzhiyun * 204*4882a593Smuzhiyun * Checking the reserved pad fields for zeroes fails on some monitors with 205*4882a593Smuzhiyun * broken empty ASCII strings. Only the first two bytes are reliable. 206*4882a593Smuzhiyun */ 207*4882a593Smuzhiyun #define _IS_MONITOR_DESC(x) (x[0] == 0 && x[1] == 0) 208*4882a593Smuzhiyun #define IS_MONITOR_DESC _IS_MONITOR_DESC(c) 209*4882a593Smuzhiyun #define _PIXEL_CLOCK(x) (x[0] + (x[1] << 8)) * 10000 210*4882a593Smuzhiyun #define PIXEL_CLOCK _PIXEL_CLOCK(c) 211*4882a593Smuzhiyun #define _H_ACTIVE(x) (x[2] + ((x[4] & 0xF0) << 4)) 212*4882a593Smuzhiyun #define H_ACTIVE _H_ACTIVE(c) 213*4882a593Smuzhiyun #define _H_BLANK(x) (x[3] + ((x[4] & 0x0F) << 8)) 214*4882a593Smuzhiyun #define H_BLANK _H_BLANK(c) 215*4882a593Smuzhiyun #define _V_ACTIVE(x) (x[5] + ((x[7] & 0xF0) << 4)) 216*4882a593Smuzhiyun #define V_ACTIVE _V_ACTIVE(c) 217*4882a593Smuzhiyun #define _V_BLANK(x) (x[6] + ((x[7] & 0x0F) << 8)) 218*4882a593Smuzhiyun #define V_BLANK _V_BLANK(c) 219*4882a593Smuzhiyun #define _H_SYNC_OFF(x) (x[8] + ((x[11] & 0xC0) << 2)) 220*4882a593Smuzhiyun #define H_SYNC_OFF _H_SYNC_OFF(c) 221*4882a593Smuzhiyun #define _H_SYNC_WIDTH(x) (x[9] + ((x[11] & 0x30) << 4)) 222*4882a593Smuzhiyun #define H_SYNC_WIDTH _H_SYNC_WIDTH(c) 223*4882a593Smuzhiyun #define _V_SYNC_OFF(x) ((x[10] >> 4) + ((x[11] & 0x0C) << 2)) 224*4882a593Smuzhiyun #define V_SYNC_OFF _V_SYNC_OFF(c) 225*4882a593Smuzhiyun #define _V_SYNC_WIDTH(x) ((x[10] & 0x0F) + ((x[11] & 0x03) << 4)) 226*4882a593Smuzhiyun #define V_SYNC_WIDTH _V_SYNC_WIDTH(c) 227*4882a593Smuzhiyun #define _H_SIZE(x) (x[12] + ((x[14] & 0xF0) << 4)) 228*4882a593Smuzhiyun #define H_SIZE _H_SIZE(c) 229*4882a593Smuzhiyun #define _V_SIZE(x) (x[13] + ((x[14] & 0x0F) << 8)) 230*4882a593Smuzhiyun #define V_SIZE _V_SIZE(c) 231*4882a593Smuzhiyun #define _H_BORDER(x) (x[15]) 232*4882a593Smuzhiyun #define H_BORDER _H_BORDER(c) 233*4882a593Smuzhiyun #define _V_BORDER(x) (x[16]) 234*4882a593Smuzhiyun #define V_BORDER _V_BORDER(c) 235*4882a593Smuzhiyun #define _INTERLACED(x) ((x[17] & 0x80) >> 7) 236*4882a593Smuzhiyun #define INTERLACED _INTERLACED(c) 237*4882a593Smuzhiyun #define _STEREO(x) ((x[17] & 0x60) >> 5) 238*4882a593Smuzhiyun #define STEREO _STEREO(c) 239*4882a593Smuzhiyun #define _STEREO1(x) (x[17] & 0x1) 240*4882a593Smuzhiyun #define STEREO1 _STEREO(c) 241*4882a593Smuzhiyun #define _SYNC_T(x) ((x[17] & 0x18) >> 3) 242*4882a593Smuzhiyun #define SYNC_T _SYNC_T(c) 243*4882a593Smuzhiyun #define _MISC(x) ((x[17] & 0x06) >> 1) 244*4882a593Smuzhiyun #define MISC _MISC(c) 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun #define _MONITOR_DESC_TYPE(x) x[3] 247*4882a593Smuzhiyun #define MONITOR_DESC_TYPE _MONITOR_DESC_TYPE(c) 248*4882a593Smuzhiyun #define SERIAL_NUMBER 0xFF 249*4882a593Smuzhiyun #define ASCII_STR 0xFE 250*4882a593Smuzhiyun #define MONITOR_RANGES 0xFD 251*4882a593Smuzhiyun #define _MIN_V_OFFSET(x) ((!!(x[4] & 0x01)) * 255) 252*4882a593Smuzhiyun #define _MAX_V_OFFSET(x) ((!!(x[4] & 0x02)) * 255) 253*4882a593Smuzhiyun #define _MIN_H_OFFSET(x) ((!!(x[4] & 0x04)) * 255) 254*4882a593Smuzhiyun #define _MAX_H_OFFSET(x) ((!!(x[4] & 0x08)) * 255) 255*4882a593Smuzhiyun #define _MIN_V(x) x[5] 256*4882a593Smuzhiyun #define MIN_V (_MIN_V(c) + _MIN_V_OFFSET(c)) 257*4882a593Smuzhiyun #define _MAX_V(x) x[6] 258*4882a593Smuzhiyun #define MAX_V (_MAX_V(c) + _MAX_V_OFFSET(c)) 259*4882a593Smuzhiyun #define _MIN_H(x) x[7] 260*4882a593Smuzhiyun #define MIN_H (_MIN_H(c) + _MIN_H_OFFSET(c)) 261*4882a593Smuzhiyun #define _MAX_H(x) x[8] 262*4882a593Smuzhiyun #define MAX_H (_MAX_H(c) + _MAX_H_OFFSET(c)) 263*4882a593Smuzhiyun #define _MAX_CLOCK(x) x[9] 264*4882a593Smuzhiyun #define MAX_CLOCK _MAX_CLOCK(c) 265*4882a593Smuzhiyun #define _DEFAULT_GTF(x) (x[10] == 0x00) 266*4882a593Smuzhiyun #define DEFAULT_GTF _DEFAULT_GTF(c) 267*4882a593Smuzhiyun #define _RANGE_LIMITS_ONLY(x) (x[10] == 0x01) 268*4882a593Smuzhiyun #define RANGE_LIMITS_ONLY _RANGE_LIMITS_ONLY(c) 269*4882a593Smuzhiyun #define _HAVE_2ND_GTF(x) (x[10] == 0x02) 270*4882a593Smuzhiyun #define HAVE_2ND_GTF _HAVE_2ND_GTF(c) 271*4882a593Smuzhiyun #define _F_2ND_GTF(x) (x[12] * 2) 272*4882a593Smuzhiyun #define F_2ND_GTF _F_2ND_GTF(c) 273*4882a593Smuzhiyun #define _C_2ND_GTF(x) (x[13] / 2) 274*4882a593Smuzhiyun #define C_2ND_GTF _C_2ND_GTF(c) 275*4882a593Smuzhiyun #define _M_2ND_GTF(x) (x[14] + (x[15] << 8)) 276*4882a593Smuzhiyun #define M_2ND_GTF _M_2ND_GTF(c) 277*4882a593Smuzhiyun #define _K_2ND_GTF(x) (x[16]) 278*4882a593Smuzhiyun #define K_2ND_GTF _K_2ND_GTF(c) 279*4882a593Smuzhiyun #define _J_2ND_GTF(x) (x[17] / 2) 280*4882a593Smuzhiyun #define J_2ND_GTF _J_2ND_GTF(c) 281*4882a593Smuzhiyun #define _HAVE_CVT(x) (x[10] == 0x04) 282*4882a593Smuzhiyun #define HAVE_CVT _HAVE_CVT(c) 283*4882a593Smuzhiyun #define _MAX_CLOCK_KHZ(x) (x[12] >> 2) 284*4882a593Smuzhiyun #define MAX_CLOCK_KHZ (MAX_CLOCK * 10000) - (_MAX_CLOCK_KHZ(c) * 250) 285*4882a593Smuzhiyun #define _MAXWIDTH(x) ((x[13] == 0 ? 0 : x[13] + ((x[12] & 0x03) << 8)) * 8) 286*4882a593Smuzhiyun #define MAXWIDTH _MAXWIDTH(c) 287*4882a593Smuzhiyun #define _SUPPORTED_ASPECT(x) x[14] 288*4882a593Smuzhiyun #define SUPPORTED_ASPECT _SUPPORTED_ASPECT(c) 289*4882a593Smuzhiyun #define SUPPORTED_ASPECT_4_3 0x80 290*4882a593Smuzhiyun #define SUPPORTED_ASPECT_16_9 0x40 291*4882a593Smuzhiyun #define SUPPORTED_ASPECT_16_10 0x20 292*4882a593Smuzhiyun #define SUPPORTED_ASPECT_5_4 0x10 293*4882a593Smuzhiyun #define SUPPORTED_ASPECT_15_9 0x08 294*4882a593Smuzhiyun #define _PREFERRED_ASPECT(x) ((x[15] & 0xe0) >> 5) 295*4882a593Smuzhiyun #define PREFERRED_ASPECT _PREFERRED_ASPECT(c) 296*4882a593Smuzhiyun #define PREFERRED_ASPECT_4_3 0 297*4882a593Smuzhiyun #define PREFERRED_ASPECT_16_9 1 298*4882a593Smuzhiyun #define PREFERRED_ASPECT_16_10 2 299*4882a593Smuzhiyun #define PREFERRED_ASPECT_5_4 3 300*4882a593Smuzhiyun #define PREFERRED_ASPECT_15_9 4 301*4882a593Smuzhiyun #define _SUPPORTED_BLANKING(x) ((x[15] & 0x18) >> 3) 302*4882a593Smuzhiyun #define SUPPORTED_BLANKING _SUPPORTED_BLANKING(c) 303*4882a593Smuzhiyun #define CVT_STANDARD 0x01 304*4882a593Smuzhiyun #define CVT_REDUCED 0x02 305*4882a593Smuzhiyun #define _SUPPORTED_SCALING(x) ((x[16] & 0xf0) >> 4) 306*4882a593Smuzhiyun #define SUPPORTED_SCALING _SUPPORTED_SCALING(c) 307*4882a593Smuzhiyun #define SCALING_HSHRINK 0x08 308*4882a593Smuzhiyun #define SCALING_HSTRETCH 0x04 309*4882a593Smuzhiyun #define SCALING_VSHRINK 0x02 310*4882a593Smuzhiyun #define SCALING_VSTRETCH 0x01 311*4882a593Smuzhiyun #define _PREFERRED_REFRESH(x) x[17] 312*4882a593Smuzhiyun #define PREFERRED_REFRESH _PREFERRED_REFRESH(c) 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun #define MONITOR_NAME 0xFC 315*4882a593Smuzhiyun #define ADD_COLOR_POINT 0xFB 316*4882a593Smuzhiyun #define WHITEX F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEX)),2)) 317*4882a593Smuzhiyun #define WHITEY F_CC(I_CC((GET(D_BW_LOW)),(GET(D_WHITEY)),0)) 318*4882a593Smuzhiyun #define _WHITEX_ADD(x,y) F_CC(I_CC(((*(x + y))),(*(x + y + 1)),2)) 319*4882a593Smuzhiyun #define _WHITEY_ADD(x,y) F_CC(I_CC(((*(x + y))),(*(x + y + 2)),0)) 320*4882a593Smuzhiyun #define _WHITE_INDEX1(x) x[5] 321*4882a593Smuzhiyun #define WHITE_INDEX1 _WHITE_INDEX1(c) 322*4882a593Smuzhiyun #define _WHITE_INDEX2(x) x[10] 323*4882a593Smuzhiyun #define WHITE_INDEX2 _WHITE_INDEX2(c) 324*4882a593Smuzhiyun #define WHITEX1 _WHITEX_ADD(c,6) 325*4882a593Smuzhiyun #define WHITEY1 _WHITEY_ADD(c,6) 326*4882a593Smuzhiyun #define WHITEX2 _WHITEX_ADD(c,12) 327*4882a593Smuzhiyun #define WHITEY2 _WHITEY_ADD(c,12) 328*4882a593Smuzhiyun #define _WHITE_GAMMA1(x) _GAMMA(x[9]) 329*4882a593Smuzhiyun #define WHITE_GAMMA1 _WHITE_GAMMA1(c) 330*4882a593Smuzhiyun #define _WHITE_GAMMA2(x) _GAMMA(x[14]) 331*4882a593Smuzhiyun #define WHITE_GAMMA2 _WHITE_GAMMA2(c) 332*4882a593Smuzhiyun #define ADD_STD_TIMINGS 0xFA 333*4882a593Smuzhiyun #define COLOR_MANAGEMENT_DATA 0xF9 334*4882a593Smuzhiyun #define CVT_3BYTE_DATA 0xF8 335*4882a593Smuzhiyun #define ADD_EST_TIMINGS 0xF7 336*4882a593Smuzhiyun #define ADD_DUMMY 0x10 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun #define _NEXT_DT_MD_SECTION(x) (x = (x + DET_TIMING_INFO_LEN)) 339*4882a593Smuzhiyun #define NEXT_DT_MD_SECTION _NEXT_DT_MD_SECTION(c) 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun #endif /* _PARSE_EDID_ */ 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun /* input type */ 344*4882a593Smuzhiyun #define DIGITAL(x) x 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun /* DFP */ 347*4882a593Smuzhiyun #define DFP1(x) x 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun /* input voltage level */ 350*4882a593Smuzhiyun #define V070 0 /* 0.700V/0.300V */ 351*4882a593Smuzhiyun #define V071 1 /* 0.714V/0.286V */ 352*4882a593Smuzhiyun #define V100 2 /* 1.000V/0.400V */ 353*4882a593Smuzhiyun #define V007 3 /* 0.700V/0.000V */ 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun /* Signal level setup */ 356*4882a593Smuzhiyun #define SIG_SETUP(x) (x) 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun /* sync characteristics */ 359*4882a593Smuzhiyun #define SEP_SYNC(x) (x & 0x08) 360*4882a593Smuzhiyun #define COMP_SYNC(x) (x & 0x04) 361*4882a593Smuzhiyun #define SYNC_O_GREEN(x) (x & 0x02) 362*4882a593Smuzhiyun #define SYNC_SERR(x) (x & 0x01) 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun /* DPMS features */ 365*4882a593Smuzhiyun #define DPMS_STANDBY(x) (x & 0x04) 366*4882a593Smuzhiyun #define DPMS_SUSPEND(x) (x & 0x02) 367*4882a593Smuzhiyun #define DPMS_OFF(x) (x & 0x01) 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun /* display type, analog */ 370*4882a593Smuzhiyun #define DISP_MONO 0 371*4882a593Smuzhiyun #define DISP_RGB 1 372*4882a593Smuzhiyun #define DISP_MULTCOLOR 2 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun /* display color encodings, digital */ 375*4882a593Smuzhiyun #define DISP_YCRCB444 0x01 376*4882a593Smuzhiyun #define DISP_YCRCB422 0x02 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun /* Msc stuff EDID Ver > 1.1 */ 379*4882a593Smuzhiyun #define STD_COLOR_SPACE(x) (x & 0x4) 380*4882a593Smuzhiyun #define PREFERRED_TIMING_MODE(x) (x & 0x2) 381*4882a593Smuzhiyun #define GFT_SUPPORTED(x) (x & 0x1) 382*4882a593Smuzhiyun #define GTF_SUPPORTED(x) (x & 0x1) 383*4882a593Smuzhiyun #define CVT_SUPPORTED(x) (x & 0x1) 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* detailed timing misc */ 386*4882a593Smuzhiyun #define IS_INTERLACED(x) (x) 387*4882a593Smuzhiyun #define IS_STEREO(x) (x) 388*4882a593Smuzhiyun #define IS_RIGHT_STEREO(x) (x & 0x01) 389*4882a593Smuzhiyun #define IS_LEFT_STEREO(x) (x & 0x02) 390*4882a593Smuzhiyun #define IS_4WAY_STEREO(x) (x & 0x03) 391*4882a593Smuzhiyun #define IS_RIGHT_ON_SYNC(x) IS_RIGHT_STEREO(x) 392*4882a593Smuzhiyun #define IS_LEFT_ON_SYNC(x) IS_LEFT_STEREO(x) 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun typedef unsigned int Uint; 395*4882a593Smuzhiyun typedef unsigned char Uchar; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun struct vendor { 398*4882a593Smuzhiyun char name[4]; 399*4882a593Smuzhiyun int prod_id; 400*4882a593Smuzhiyun Uint serial; 401*4882a593Smuzhiyun int week; 402*4882a593Smuzhiyun int year; 403*4882a593Smuzhiyun }; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun struct edid_version { 406*4882a593Smuzhiyun int version; 407*4882a593Smuzhiyun int revision; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun struct disp_features { 411*4882a593Smuzhiyun unsigned int input_type:1; 412*4882a593Smuzhiyun unsigned int input_voltage:2; 413*4882a593Smuzhiyun unsigned int input_setup:1; 414*4882a593Smuzhiyun unsigned int input_sync:5; 415*4882a593Smuzhiyun unsigned int input_dfp:1; 416*4882a593Smuzhiyun unsigned int input_bpc:3; 417*4882a593Smuzhiyun unsigned int input_interface:4; 418*4882a593Smuzhiyun /* 15 bit hole */ 419*4882a593Smuzhiyun int hsize; 420*4882a593Smuzhiyun int vsize; 421*4882a593Smuzhiyun float gamma; 422*4882a593Smuzhiyun unsigned int dpms:3; 423*4882a593Smuzhiyun unsigned int display_type:2; 424*4882a593Smuzhiyun unsigned int msc:3; 425*4882a593Smuzhiyun float redx; 426*4882a593Smuzhiyun float redy; 427*4882a593Smuzhiyun float greenx; 428*4882a593Smuzhiyun float greeny; 429*4882a593Smuzhiyun float bluex; 430*4882a593Smuzhiyun float bluey; 431*4882a593Smuzhiyun float whitex; 432*4882a593Smuzhiyun float whitey; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun struct established_timings { 436*4882a593Smuzhiyun Uchar t1; 437*4882a593Smuzhiyun Uchar t2; 438*4882a593Smuzhiyun Uchar t_manu; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun struct std_timings { 442*4882a593Smuzhiyun int hsize; 443*4882a593Smuzhiyun int vsize; 444*4882a593Smuzhiyun int refresh; 445*4882a593Smuzhiyun CARD16 id; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun struct detailed_timings { 449*4882a593Smuzhiyun int clock; 450*4882a593Smuzhiyun int h_active; 451*4882a593Smuzhiyun int h_blanking; 452*4882a593Smuzhiyun int v_active; 453*4882a593Smuzhiyun int v_blanking; 454*4882a593Smuzhiyun int h_sync_off; 455*4882a593Smuzhiyun int h_sync_width; 456*4882a593Smuzhiyun int v_sync_off; 457*4882a593Smuzhiyun int v_sync_width; 458*4882a593Smuzhiyun int h_size; 459*4882a593Smuzhiyun int v_size; 460*4882a593Smuzhiyun int h_border; 461*4882a593Smuzhiyun int v_border; 462*4882a593Smuzhiyun unsigned int interlaced:1; 463*4882a593Smuzhiyun unsigned int stereo:2; 464*4882a593Smuzhiyun unsigned int sync:2; 465*4882a593Smuzhiyun unsigned int misc:2; 466*4882a593Smuzhiyun unsigned int stereo_1:1; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun #define DT 0 470*4882a593Smuzhiyun #define DS_SERIAL 0xFF 471*4882a593Smuzhiyun #define DS_ASCII_STR 0xFE 472*4882a593Smuzhiyun #define DS_NAME 0xFC 473*4882a593Smuzhiyun #define DS_RANGES 0xFD 474*4882a593Smuzhiyun #define DS_WHITE_P 0xFB 475*4882a593Smuzhiyun #define DS_STD_TIMINGS 0xFA 476*4882a593Smuzhiyun #define DS_CMD 0xF9 477*4882a593Smuzhiyun #define DS_CVT 0xF8 478*4882a593Smuzhiyun #define DS_EST_III 0xF7 479*4882a593Smuzhiyun #define DS_DUMMY 0x10 480*4882a593Smuzhiyun #define DS_UNKOWN 0x100 /* type is an int */ 481*4882a593Smuzhiyun #define DS_VENDOR 0x101 482*4882a593Smuzhiyun #define DS_VENDOR_MAX 0x110 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun /* 485*4882a593Smuzhiyun * Display range limit Descriptor of EDID version1, reversion 4 486*4882a593Smuzhiyun */ 487*4882a593Smuzhiyun typedef enum { 488*4882a593Smuzhiyun DR_DEFAULT_GTF, 489*4882a593Smuzhiyun DR_LIMITS_ONLY, 490*4882a593Smuzhiyun DR_SECONDARY_GTF, 491*4882a593Smuzhiyun DR_CVT_SUPPORTED = 4, 492*4882a593Smuzhiyun } DR_timing_flags; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun struct monitor_ranges { 495*4882a593Smuzhiyun int min_v; 496*4882a593Smuzhiyun int max_v; 497*4882a593Smuzhiyun int min_h; 498*4882a593Smuzhiyun int max_h; 499*4882a593Smuzhiyun int max_clock; /* in mhz */ 500*4882a593Smuzhiyun int gtf_2nd_f; 501*4882a593Smuzhiyun int gtf_2nd_c; 502*4882a593Smuzhiyun int gtf_2nd_m; 503*4882a593Smuzhiyun int gtf_2nd_k; 504*4882a593Smuzhiyun int gtf_2nd_j; 505*4882a593Smuzhiyun int max_clock_khz; 506*4882a593Smuzhiyun int maxwidth; /* in pixels */ 507*4882a593Smuzhiyun char supported_aspect; 508*4882a593Smuzhiyun char preferred_aspect; 509*4882a593Smuzhiyun char supported_blanking; 510*4882a593Smuzhiyun char supported_scaling; 511*4882a593Smuzhiyun int preferred_refresh; /* in hz */ 512*4882a593Smuzhiyun DR_timing_flags display_range_timing_flags; 513*4882a593Smuzhiyun }; 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun struct whitePoints { 516*4882a593Smuzhiyun int index; 517*4882a593Smuzhiyun float white_x; 518*4882a593Smuzhiyun float white_y; 519*4882a593Smuzhiyun float white_gamma; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun struct cvt_timings { 523*4882a593Smuzhiyun int width; 524*4882a593Smuzhiyun int height; 525*4882a593Smuzhiyun int rate; 526*4882a593Smuzhiyun int rates; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun /* 530*4882a593Smuzhiyun * Be careful when adding new sections; this structure can't grow, it's 531*4882a593Smuzhiyun * embedded in the middle of xf86Monitor which is ABI. Sizes below are 532*4882a593Smuzhiyun * in bytes, for ILP32 systems. If all else fails just copy the section 533*4882a593Smuzhiyun * literally like serial and friends. 534*4882a593Smuzhiyun */ 535*4882a593Smuzhiyun struct detailed_monitor_section { 536*4882a593Smuzhiyun int type; 537*4882a593Smuzhiyun union { 538*4882a593Smuzhiyun struct detailed_timings d_timings; /* 56 */ 539*4882a593Smuzhiyun Uchar serial[13]; 540*4882a593Smuzhiyun Uchar ascii_data[13]; 541*4882a593Smuzhiyun Uchar name[13]; 542*4882a593Smuzhiyun struct monitor_ranges ranges; /* 60 */ 543*4882a593Smuzhiyun struct std_timings std_t[5]; /* 80 */ 544*4882a593Smuzhiyun struct whitePoints wp[2]; /* 32 */ 545*4882a593Smuzhiyun /* color management data */ 546*4882a593Smuzhiyun struct cvt_timings cvt[4]; /* 64 */ 547*4882a593Smuzhiyun Uchar est_iii[6]; /* 6 */ 548*4882a593Smuzhiyun } section; /* max: 80 */ 549*4882a593Smuzhiyun }; 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun /* flags */ 552*4882a593Smuzhiyun #define MONITOR_EDID_COMPLETE_RAWDATA 0x01 553*4882a593Smuzhiyun /* old, don't use */ 554*4882a593Smuzhiyun #define EDID_COMPLETE_RAWDATA 0x01 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun /* 557*4882a593Smuzhiyun * For DisplayID devices, only the scrnIndex, flags, and rawData fields 558*4882a593Smuzhiyun * are meaningful. For EDID, they all are. 559*4882a593Smuzhiyun */ 560*4882a593Smuzhiyun typedef struct { 561*4882a593Smuzhiyun int scrnIndex; 562*4882a593Smuzhiyun struct vendor vendor; 563*4882a593Smuzhiyun struct edid_version ver; 564*4882a593Smuzhiyun struct disp_features features; 565*4882a593Smuzhiyun struct established_timings timings1; 566*4882a593Smuzhiyun struct std_timings timings2[8]; 567*4882a593Smuzhiyun struct detailed_monitor_section det_mon[4]; 568*4882a593Smuzhiyun unsigned long flags; 569*4882a593Smuzhiyun int no_sections; 570*4882a593Smuzhiyun Uchar *rawData; 571*4882a593Smuzhiyun } xf86Monitor, *xf86MonPtr; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun extern _X_EXPORT xf86MonPtr ConfiguredMonitor; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun #define EXT_TAG 0 576*4882a593Smuzhiyun #define EXT_REV 1 577*4882a593Smuzhiyun #define CEA_EXT 0x02 578*4882a593Smuzhiyun #define VTB_EXT 0x10 579*4882a593Smuzhiyun #define DI_EXT 0x40 580*4882a593Smuzhiyun #define LS_EXT 0x50 581*4882a593Smuzhiyun #define MI_EXT 0x60 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun #define CEA_EXT_MIN_DATA_OFFSET 4 584*4882a593Smuzhiyun #define CEA_EXT_MAX_DATA_OFFSET 127 585*4882a593Smuzhiyun #define CEA_EXT_DET_TIMING_NUM 6 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun #define IEEE_ID_HDMI 0x000C03 588*4882a593Smuzhiyun #define CEA_AUDIO_BLK 1 589*4882a593Smuzhiyun #define CEA_VIDEO_BLK 2 590*4882a593Smuzhiyun #define CEA_VENDOR_BLK 3 591*4882a593Smuzhiyun #define CEA_SPEAKER_ALLOC_BLK 4 592*4882a593Smuzhiyun #define CEA_VESA_DTC_BLK 5 593*4882a593Smuzhiyun #define VENDOR_SUPPORT_AI(x) ((x) >> 7) 594*4882a593Smuzhiyun #define VENDOR_SUPPORT_DC_48bit(x) ( ( (x) >> 6) & 0x01) 595*4882a593Smuzhiyun #define VENDOR_SUPPORT_DC_36bit(x) ( ( (x) >> 5) & 0x01) 596*4882a593Smuzhiyun #define VENDOR_SUPPORT_DC_30bit(x) ( ( (x) >> 4) & 0x01) 597*4882a593Smuzhiyun #define VENDOR_SUPPORT_DC_Y444(x) ( ( (x) >> 3) & 0x01) 598*4882a593Smuzhiyun #define VENDOR_LATENCY_PRESENT(x) ( (x) >> 7) 599*4882a593Smuzhiyun #define VENDOR_LATENCY_PRESENT_I(x) ( ( (x) >> 6) & 0x01) 600*4882a593Smuzhiyun #define HDMI_MAX_TMDS_UNIT (5000) 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun struct cea_video_block { 603*4882a593Smuzhiyun Uchar video_code; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun struct cea_audio_block_descriptor { 607*4882a593Smuzhiyun Uchar audio_code[3]; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun struct cea_audio_block { 611*4882a593Smuzhiyun struct cea_audio_block_descriptor descriptor[10]; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun struct cea_vendor_block_hdmi { 615*4882a593Smuzhiyun Uchar portB:4; 616*4882a593Smuzhiyun Uchar portA:4; 617*4882a593Smuzhiyun Uchar portD:4; 618*4882a593Smuzhiyun Uchar portC:4; 619*4882a593Smuzhiyun Uchar support_flags; 620*4882a593Smuzhiyun Uchar max_tmds_clock; 621*4882a593Smuzhiyun Uchar latency_present; 622*4882a593Smuzhiyun Uchar video_latency; 623*4882a593Smuzhiyun Uchar audio_latency; 624*4882a593Smuzhiyun Uchar interlaced_video_latency; 625*4882a593Smuzhiyun Uchar interlaced_audio_latency; 626*4882a593Smuzhiyun }; 627*4882a593Smuzhiyun 628*4882a593Smuzhiyun struct cea_vendor_block { 629*4882a593Smuzhiyun unsigned char ieee_id[3]; 630*4882a593Smuzhiyun union { 631*4882a593Smuzhiyun struct cea_vendor_block_hdmi hdmi; 632*4882a593Smuzhiyun /* any other vendor blocks we know about */ 633*4882a593Smuzhiyun }; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun struct cea_speaker_block { 637*4882a593Smuzhiyun Uchar FLR:1; 638*4882a593Smuzhiyun Uchar LFE:1; 639*4882a593Smuzhiyun Uchar FC:1; 640*4882a593Smuzhiyun Uchar RLR:1; 641*4882a593Smuzhiyun Uchar RC:1; 642*4882a593Smuzhiyun Uchar FLRC:1; 643*4882a593Smuzhiyun Uchar RLRC:1; 644*4882a593Smuzhiyun Uchar FLRW:1; 645*4882a593Smuzhiyun Uchar FLRH:1; 646*4882a593Smuzhiyun Uchar TC:1; 647*4882a593Smuzhiyun Uchar FCH:1; 648*4882a593Smuzhiyun Uchar Resv:5; 649*4882a593Smuzhiyun Uchar ResvByte; 650*4882a593Smuzhiyun }; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun struct cea_data_block { 653*4882a593Smuzhiyun Uchar len:5; 654*4882a593Smuzhiyun Uchar tag:3; 655*4882a593Smuzhiyun union { 656*4882a593Smuzhiyun struct cea_video_block video; 657*4882a593Smuzhiyun struct cea_audio_block audio; 658*4882a593Smuzhiyun struct cea_vendor_block vendor; 659*4882a593Smuzhiyun struct cea_speaker_block speaker; 660*4882a593Smuzhiyun } u; 661*4882a593Smuzhiyun }; 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun struct cea_ext_body { 664*4882a593Smuzhiyun Uchar tag; 665*4882a593Smuzhiyun Uchar rev; 666*4882a593Smuzhiyun Uchar dt_offset; 667*4882a593Smuzhiyun Uchar flags; 668*4882a593Smuzhiyun struct cea_data_block data_collection; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun 671*4882a593Smuzhiyun #endif /* _EDID_H_ */ 672