xref: /OK3568_Linux_fs/external/xserver/hw/xfree86/common/xf86PciInfo.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun 
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 1995-2003 by The XFree86 Project, Inc.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
13*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  * Except as contained in this notice, the name of the copyright holder(s)
24*4882a593Smuzhiyun  * and author(s) shall not be used in advertising or otherwise to promote
25*4882a593Smuzhiyun  * the sale, use or other dealings in this Software without prior written
26*4882a593Smuzhiyun  * authorization from the copyright holder(s) and author(s).
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun  * This file contains macros for the PCI Vendor and Device IDs for video
31*4882a593Smuzhiyun  * cards plus a few other things that are needed in drivers or elsewhere.
32*4882a593Smuzhiyun  * This information is used in several ways:
33*4882a593Smuzhiyun  *   1. It is used by drivers and/or other code.
34*4882a593Smuzhiyun  *   2. It is used by the pciid2c.pl script to determine what vendor data to
35*4882a593Smuzhiyun  *      include in the pcidata module that the X server loads.
36*4882a593Smuzhiyun  *   3. A side-effect of 2. affects how config-generation works for
37*4882a593Smuzhiyun  *      otherwise "unknown" cards.
38*4882a593Smuzhiyun  *
39*4882a593Smuzhiyun  * Don't add entries here for vendors that don't make video cards,
40*4882a593Smuzhiyun  * or for non-video devices unless they're needed by a driver or elsewhere.
41*4882a593Smuzhiyun  * A comprehensive set of PCI vendor, device and subsystem data is
42*4882a593Smuzhiyun  * auto-generated from the ../etc/pci.ids file using the pciids2c.pl script,
43*4882a593Smuzhiyun  * and is used in scanpci utility.  Don't modify the pci.ids file.  If
44*4882a593Smuzhiyun  * new/corrected entries are required, add them to ../etc/extrapci.ids.
45*4882a593Smuzhiyun  */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #ifndef _XF86_PCIINFO_H
48*4882a593Smuzhiyun #define _XF86_PCIINFO_H
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #warning "xf86PciInfo.h is deprecated.  For greater compatibility, drivers should include necessary PCI IDs locally rather than relying on this file from xorg-server."
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* PCI Pseudo Vendor */
53*4882a593Smuzhiyun #define PCI_VENDOR_GENERIC		0x00FF
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define PCI_VENDOR_REAL3D		0x003D
56*4882a593Smuzhiyun #define PCI_VENDOR_COMPAQ		0x0E11
57*4882a593Smuzhiyun #define PCI_VENDOR_ATI			0x1002
58*4882a593Smuzhiyun #define PCI_VENDOR_AVANCE		0x1005
59*4882a593Smuzhiyun #define PCI_VENDOR_TSENG		0x100C
60*4882a593Smuzhiyun #define PCI_VENDOR_NS			0x100B
61*4882a593Smuzhiyun #define PCI_VENDOR_WEITEK		0x100E
62*4882a593Smuzhiyun #define PCI_VENDOR_VIDEOLOGIC		0x1010
63*4882a593Smuzhiyun #define PCI_VENDOR_DIGITAL		0x1011
64*4882a593Smuzhiyun #define PCI_VENDOR_CIRRUS		0x1013
65*4882a593Smuzhiyun #define PCI_VENDOR_AMD			0x1022
66*4882a593Smuzhiyun #define PCI_VENDOR_TRIDENT		0x1023
67*4882a593Smuzhiyun #define PCI_VENDOR_ALI			0x1025
68*4882a593Smuzhiyun #define PCI_VENDOR_DELL			0x1028
69*4882a593Smuzhiyun #define PCI_VENDOR_MATROX		0x102B
70*4882a593Smuzhiyun #define PCI_VENDOR_CHIPSTECH		0x102C
71*4882a593Smuzhiyun #define PCI_VENDOR_MIRO			0x1031
72*4882a593Smuzhiyun #define PCI_VENDOR_NEC			0x1033
73*4882a593Smuzhiyun #define PCI_VENDOR_SIS			0x1039
74*4882a593Smuzhiyun #define PCI_VENDOR_HP			0x103C
75*4882a593Smuzhiyun #define PCI_VENDOR_SGS			0x104A
76*4882a593Smuzhiyun #define PCI_VENDOR_TI			0x104C
77*4882a593Smuzhiyun #define PCI_VENDOR_SONY			0x104D
78*4882a593Smuzhiyun #define PCI_VENDOR_OAK			0x104E
79*4882a593Smuzhiyun #define PCI_VENDOR_MOTOROLA		0x1057
80*4882a593Smuzhiyun #define PCI_VENDOR_NUMNINE		0x105D
81*4882a593Smuzhiyun #define PCI_VENDOR_CYRIX		0x1078
82*4882a593Smuzhiyun #define PCI_VENDOR_SUN			0x108E
83*4882a593Smuzhiyun #define PCI_VENDOR_DIAMOND		0x1092
84*4882a593Smuzhiyun #define PCI_VENDOR_BROOKTREE		0x109E
85*4882a593Smuzhiyun #define PCI_VENDOR_NEOMAGIC		0x10C8
86*4882a593Smuzhiyun #define PCI_VENDOR_NVIDIA		0x10DE
87*4882a593Smuzhiyun #define PCI_VENDOR_IMS			0x10E0
88*4882a593Smuzhiyun #define PCI_VENDOR_INTEGRAPHICS 	0x10EA
89*4882a593Smuzhiyun #define PCI_VENDOR_ALLIANCE		0x1142
90*4882a593Smuzhiyun #define PCI_VENDOR_RENDITION		0x1163
91*4882a593Smuzhiyun #define PCI_VENDOR_3DFX			0x121A
92*4882a593Smuzhiyun #define PCI_VENDOR_SMI			0x126F
93*4882a593Smuzhiyun #define PCI_VENDOR_TRITECH		0x1292
94*4882a593Smuzhiyun #define PCI_VENDOR_NVIDIA_SGS		0x12D2
95*4882a593Smuzhiyun #define PCI_VENDOR_VMWARE		0x15AD
96*4882a593Smuzhiyun #define PCI_VENDOR_AST			0x1A03
97*4882a593Smuzhiyun #define PCI_VENDOR_3DLABS		0x3D3D
98*4882a593Smuzhiyun #define PCI_VENDOR_AVANCE_2		0x4005
99*4882a593Smuzhiyun #define PCI_VENDOR_HERCULES		0x4843
100*4882a593Smuzhiyun #define PCI_VENDOR_S3			0x5333
101*4882a593Smuzhiyun #define PCI_VENDOR_INTEL		0x8086
102*4882a593Smuzhiyun #define PCI_VENDOR_ARK			0xEDD8
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* Generic */
105*4882a593Smuzhiyun #define PCI_CHIP_VGA			0x0000
106*4882a593Smuzhiyun #define PCI_CHIP_8514			0x0001
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /* Real 3D */
109*4882a593Smuzhiyun #define PCI_CHIP_I740_PCI		0x00D1
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun /* Compaq */
112*4882a593Smuzhiyun #define PCI_CHIP_QV1280			0x3033
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun /* ATI */
115*4882a593Smuzhiyun #define PCI_CHIP_RV380_3150             0x3150
116*4882a593Smuzhiyun #define PCI_CHIP_RV380_3151             0x3151
117*4882a593Smuzhiyun #define PCI_CHIP_RV380_3152             0x3152
118*4882a593Smuzhiyun #define PCI_CHIP_RV380_3153             0x3153
119*4882a593Smuzhiyun #define PCI_CHIP_RV380_3154             0x3154
120*4882a593Smuzhiyun #define PCI_CHIP_RV380_3156             0x3156
121*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E50             0x3E50
122*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E51             0x3E51
123*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E52             0x3E52
124*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E53             0x3E53
125*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E54             0x3E54
126*4882a593Smuzhiyun #define PCI_CHIP_RV380_3E56             0x3E56
127*4882a593Smuzhiyun #define PCI_CHIP_RS100_4136		0x4136
128*4882a593Smuzhiyun #define PCI_CHIP_RS200_4137		0x4137
129*4882a593Smuzhiyun #define PCI_CHIP_R300_AD		0x4144
130*4882a593Smuzhiyun #define PCI_CHIP_R300_AE		0x4145
131*4882a593Smuzhiyun #define PCI_CHIP_R300_AF		0x4146
132*4882a593Smuzhiyun #define PCI_CHIP_R300_AG		0x4147
133*4882a593Smuzhiyun #define PCI_CHIP_R350_AH                0x4148
134*4882a593Smuzhiyun #define PCI_CHIP_R350_AI                0x4149
135*4882a593Smuzhiyun #define PCI_CHIP_R350_AJ                0x414A
136*4882a593Smuzhiyun #define PCI_CHIP_R350_AK                0x414B
137*4882a593Smuzhiyun #define PCI_CHIP_RV350_AP               0x4150
138*4882a593Smuzhiyun #define PCI_CHIP_RV350_AQ               0x4151
139*4882a593Smuzhiyun #define PCI_CHIP_RV360_AR               0x4152
140*4882a593Smuzhiyun #define PCI_CHIP_RV350_AS               0x4153
141*4882a593Smuzhiyun #define PCI_CHIP_RV350_AT               0x4154
142*4882a593Smuzhiyun #define PCI_CHIP_RV350_4155             0x4155
143*4882a593Smuzhiyun #define PCI_CHIP_RV350_AV               0x4156
144*4882a593Smuzhiyun #define PCI_CHIP_MACH32			0x4158
145*4882a593Smuzhiyun #define PCI_CHIP_RS250_4237		0x4237
146*4882a593Smuzhiyun #define PCI_CHIP_R200_BB		0x4242
147*4882a593Smuzhiyun #define PCI_CHIP_R200_BC		0x4243
148*4882a593Smuzhiyun #define PCI_CHIP_RS100_4336		0x4336
149*4882a593Smuzhiyun #define PCI_CHIP_RS200_4337		0x4337
150*4882a593Smuzhiyun #define PCI_CHIP_MACH64CT		0x4354
151*4882a593Smuzhiyun #define PCI_CHIP_MACH64CX		0x4358
152*4882a593Smuzhiyun #define PCI_CHIP_RS250_4437		0x4437
153*4882a593Smuzhiyun #define PCI_CHIP_MACH64ET		0x4554
154*4882a593Smuzhiyun #define PCI_CHIP_MACH64GB		0x4742
155*4882a593Smuzhiyun #define PCI_CHIP_MACH64GD		0x4744
156*4882a593Smuzhiyun #define PCI_CHIP_MACH64GI		0x4749
157*4882a593Smuzhiyun #define PCI_CHIP_MACH64GL		0x474C
158*4882a593Smuzhiyun #define PCI_CHIP_MACH64GM		0x474D
159*4882a593Smuzhiyun #define PCI_CHIP_MACH64GN		0x474E
160*4882a593Smuzhiyun #define PCI_CHIP_MACH64GO		0x474F
161*4882a593Smuzhiyun #define PCI_CHIP_MACH64GP		0x4750
162*4882a593Smuzhiyun #define PCI_CHIP_MACH64GQ		0x4751
163*4882a593Smuzhiyun #define PCI_CHIP_MACH64GR		0x4752
164*4882a593Smuzhiyun #define PCI_CHIP_MACH64GS		0x4753
165*4882a593Smuzhiyun #define PCI_CHIP_MACH64GT		0x4754
166*4882a593Smuzhiyun #define PCI_CHIP_MACH64GU		0x4755
167*4882a593Smuzhiyun #define PCI_CHIP_MACH64GV		0x4756
168*4882a593Smuzhiyun #define PCI_CHIP_MACH64GW		0x4757
169*4882a593Smuzhiyun #define PCI_CHIP_MACH64GX		0x4758
170*4882a593Smuzhiyun #define PCI_CHIP_MACH64GY		0x4759
171*4882a593Smuzhiyun #define PCI_CHIP_MACH64GZ		0x475A
172*4882a593Smuzhiyun #define PCI_CHIP_RV250_Id		0x4964
173*4882a593Smuzhiyun #define PCI_CHIP_RV250_Ie		0x4965
174*4882a593Smuzhiyun #define PCI_CHIP_RV250_If		0x4966
175*4882a593Smuzhiyun #define PCI_CHIP_RV250_Ig		0x4967
176*4882a593Smuzhiyun #define PCI_CHIP_R420_JH                0x4A48
177*4882a593Smuzhiyun #define PCI_CHIP_R420_JI                0x4A49
178*4882a593Smuzhiyun #define PCI_CHIP_R420_JJ                0x4A4A
179*4882a593Smuzhiyun #define PCI_CHIP_R420_JK                0x4A4B
180*4882a593Smuzhiyun #define PCI_CHIP_R420_JL                0x4A4C
181*4882a593Smuzhiyun #define PCI_CHIP_R420_JM                0x4A4D
182*4882a593Smuzhiyun #define PCI_CHIP_R420_JN                0x4A4E
183*4882a593Smuzhiyun #define PCI_CHIP_R420_4A4F              0x4A4F
184*4882a593Smuzhiyun #define PCI_CHIP_R420_JP                0x4A50
185*4882a593Smuzhiyun #define PCI_CHIP_R420_4A54              0x4A54
186*4882a593Smuzhiyun #define PCI_CHIP_R481_4B49              0x4B49
187*4882a593Smuzhiyun #define PCI_CHIP_R481_4B4A              0x4B4A
188*4882a593Smuzhiyun #define PCI_CHIP_R481_4B4B              0x4B4B
189*4882a593Smuzhiyun #define PCI_CHIP_R481_4B4C              0x4B4C
190*4882a593Smuzhiyun #define PCI_CHIP_MACH64LB		0x4C42
191*4882a593Smuzhiyun #define PCI_CHIP_MACH64LD		0x4C44
192*4882a593Smuzhiyun #define PCI_CHIP_RAGE128LE		0x4C45
193*4882a593Smuzhiyun #define PCI_CHIP_RAGE128LF		0x4C46
194*4882a593Smuzhiyun #define PCI_CHIP_MACH64LG		0x4C47
195*4882a593Smuzhiyun #define PCI_CHIP_MACH64LI		0x4C49
196*4882a593Smuzhiyun #define PCI_CHIP_MACH64LM		0x4C4D
197*4882a593Smuzhiyun #define PCI_CHIP_MACH64LN		0x4C4E
198*4882a593Smuzhiyun #define PCI_CHIP_MACH64LP		0x4C50
199*4882a593Smuzhiyun #define PCI_CHIP_MACH64LQ		0x4C51
200*4882a593Smuzhiyun #define PCI_CHIP_MACH64LR		0x4C52
201*4882a593Smuzhiyun #define PCI_CHIP_MACH64LS		0x4C53
202*4882a593Smuzhiyun #define PCI_CHIP_RADEON_LW		0x4C57
203*4882a593Smuzhiyun #define PCI_CHIP_RADEON_LX		0x4C58
204*4882a593Smuzhiyun #define PCI_CHIP_RADEON_LY		0x4C59
205*4882a593Smuzhiyun #define PCI_CHIP_RADEON_LZ		0x4C5A
206*4882a593Smuzhiyun #define PCI_CHIP_RV250_Ld		0x4C64
207*4882a593Smuzhiyun #define PCI_CHIP_RV250_Le		0x4C65
208*4882a593Smuzhiyun #define PCI_CHIP_RV250_Lf		0x4C66
209*4882a593Smuzhiyun #define PCI_CHIP_RV250_Lg		0x4C67
210*4882a593Smuzhiyun #define PCI_CHIP_RV250_Ln		0x4C6E
211*4882a593Smuzhiyun #define PCI_CHIP_RAGE128MF		0x4D46
212*4882a593Smuzhiyun #define PCI_CHIP_RAGE128ML		0x4D4C
213*4882a593Smuzhiyun #define PCI_CHIP_R300_ND		0x4E44
214*4882a593Smuzhiyun #define PCI_CHIP_R300_NE		0x4E45
215*4882a593Smuzhiyun #define PCI_CHIP_R300_NF		0x4E46
216*4882a593Smuzhiyun #define PCI_CHIP_R300_NG		0x4E47
217*4882a593Smuzhiyun #define PCI_CHIP_R350_NH                0x4E48
218*4882a593Smuzhiyun #define PCI_CHIP_R350_NI                0x4E49
219*4882a593Smuzhiyun #define PCI_CHIP_R360_NJ                0x4E4A
220*4882a593Smuzhiyun #define PCI_CHIP_R350_NK                0x4E4B
221*4882a593Smuzhiyun #define PCI_CHIP_RV350_NP               0x4E50
222*4882a593Smuzhiyun #define PCI_CHIP_RV350_NQ               0x4E51
223*4882a593Smuzhiyun #define PCI_CHIP_RV350_NR               0x4E52
224*4882a593Smuzhiyun #define PCI_CHIP_RV350_NS               0x4E53
225*4882a593Smuzhiyun #define PCI_CHIP_RV350_NT               0x4E54
226*4882a593Smuzhiyun #define PCI_CHIP_RV350_NV               0x4E56
227*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PA		0x5041
228*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PB		0x5042
229*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PC		0x5043
230*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PD		0x5044
231*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PE		0x5045
232*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PF		0x5046
233*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PG		0x5047
234*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PH		0x5048
235*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PI		0x5049
236*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PJ		0x504A
237*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PK		0x504B
238*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PL		0x504C
239*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PM		0x504D
240*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PN		0x504E
241*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PO		0x504F
242*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PP		0x5050
243*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PQ		0x5051
244*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PR		0x5052
245*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PS		0x5053
246*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PT		0x5054
247*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PU		0x5055
248*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PV		0x5056
249*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PW		0x5057
250*4882a593Smuzhiyun #define PCI_CHIP_RAGE128PX		0x5058
251*4882a593Smuzhiyun #define PCI_CHIP_RADEON_QD		0x5144
252*4882a593Smuzhiyun #define PCI_CHIP_RADEON_QE		0x5145
253*4882a593Smuzhiyun #define PCI_CHIP_RADEON_QF		0x5146
254*4882a593Smuzhiyun #define PCI_CHIP_RADEON_QG		0x5147
255*4882a593Smuzhiyun #define PCI_CHIP_R200_QH		0x5148
256*4882a593Smuzhiyun #define PCI_CHIP_R200_QI		0x5149
257*4882a593Smuzhiyun #define PCI_CHIP_R200_QJ		0x514A
258*4882a593Smuzhiyun #define PCI_CHIP_R200_QK		0x514B
259*4882a593Smuzhiyun #define PCI_CHIP_R200_QL		0x514C
260*4882a593Smuzhiyun #define PCI_CHIP_R200_QM		0x514D
261*4882a593Smuzhiyun #define PCI_CHIP_R200_QN		0x514E
262*4882a593Smuzhiyun #define PCI_CHIP_R200_QO		0x514F
263*4882a593Smuzhiyun #define PCI_CHIP_RV200_QW		0x5157
264*4882a593Smuzhiyun #define PCI_CHIP_RV200_QX		0x5158
265*4882a593Smuzhiyun #define PCI_CHIP_RV100_QY		0x5159
266*4882a593Smuzhiyun #define PCI_CHIP_RV100_QZ		0x515A
267*4882a593Smuzhiyun #define PCI_CHIP_RN50_515E		0x515E
268*4882a593Smuzhiyun #define PCI_CHIP_RAGE128RE		0x5245
269*4882a593Smuzhiyun #define PCI_CHIP_RAGE128RF		0x5246
270*4882a593Smuzhiyun #define PCI_CHIP_RAGE128RG		0x5247
271*4882a593Smuzhiyun #define PCI_CHIP_RAGE128RK		0x524B
272*4882a593Smuzhiyun #define PCI_CHIP_RAGE128RL		0x524C
273*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SE		0x5345
274*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SF		0x5346
275*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SG		0x5347
276*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SH		0x5348
277*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SK		0x534B
278*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SL		0x534C
279*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SM		0x534D
280*4882a593Smuzhiyun #define PCI_CHIP_RAGE128SN		0x534E
281*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TF		0x5446
282*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TL		0x544C
283*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TR		0x5452
284*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TS		0x5453
285*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TT		0x5454
286*4882a593Smuzhiyun #define PCI_CHIP_RAGE128TU		0x5455
287*4882a593Smuzhiyun #define PCI_CHIP_RV370_5460             0x5460
288*4882a593Smuzhiyun #define PCI_CHIP_RV370_5461             0x5461
289*4882a593Smuzhiyun #define PCI_CHIP_RV370_5462             0x5462
290*4882a593Smuzhiyun #define PCI_CHIP_RV370_5463             0x5463
291*4882a593Smuzhiyun #define PCI_CHIP_RV370_5464             0x5464
292*4882a593Smuzhiyun #define PCI_CHIP_RV370_5465             0x5465
293*4882a593Smuzhiyun #define PCI_CHIP_RV370_5466             0x5466
294*4882a593Smuzhiyun #define PCI_CHIP_RV370_5467             0x5467
295*4882a593Smuzhiyun #define PCI_CHIP_R423_UH                0x5548
296*4882a593Smuzhiyun #define PCI_CHIP_R423_UI                0x5549
297*4882a593Smuzhiyun #define PCI_CHIP_R423_UJ                0x554A
298*4882a593Smuzhiyun #define PCI_CHIP_R423_UK                0x554B
299*4882a593Smuzhiyun #define PCI_CHIP_R430_554C              0x554C
300*4882a593Smuzhiyun #define PCI_CHIP_R430_554D              0x554D
301*4882a593Smuzhiyun #define PCI_CHIP_R430_554E              0x554E
302*4882a593Smuzhiyun #define PCI_CHIP_R430_554F              0x554F
303*4882a593Smuzhiyun #define PCI_CHIP_R423_5550              0x5550
304*4882a593Smuzhiyun #define PCI_CHIP_R423_UQ                0x5551
305*4882a593Smuzhiyun #define PCI_CHIP_R423_UR                0x5552
306*4882a593Smuzhiyun #define PCI_CHIP_R423_UT                0x5554
307*4882a593Smuzhiyun #define PCI_CHIP_RV410_564A             0x564A
308*4882a593Smuzhiyun #define PCI_CHIP_RV410_564B             0x564B
309*4882a593Smuzhiyun #define PCI_CHIP_RV410_564F             0x564F
310*4882a593Smuzhiyun #define PCI_CHIP_RV410_5652             0x5652
311*4882a593Smuzhiyun #define PCI_CHIP_RV410_5653             0x5653
312*4882a593Smuzhiyun #define PCI_CHIP_MACH64VT		0x5654
313*4882a593Smuzhiyun #define PCI_CHIP_MACH64VU		0x5655
314*4882a593Smuzhiyun #define PCI_CHIP_MACH64VV		0x5656
315*4882a593Smuzhiyun #define PCI_CHIP_RS300_5834		0x5834
316*4882a593Smuzhiyun #define PCI_CHIP_RS300_5835		0x5835
317*4882a593Smuzhiyun #define PCI_CHIP_RS300_5836		0x5836
318*4882a593Smuzhiyun #define PCI_CHIP_RS300_5837		0x5837
319*4882a593Smuzhiyun #define PCI_CHIP_RS480_5954             0x5954
320*4882a593Smuzhiyun #define PCI_CHIP_RS480_5955             0x5955
321*4882a593Smuzhiyun #define PCI_CHIP_RV280_5960		0x5960
322*4882a593Smuzhiyun #define PCI_CHIP_RV280_5961		0x5961
323*4882a593Smuzhiyun #define PCI_CHIP_RV280_5962		0x5962
324*4882a593Smuzhiyun #define PCI_CHIP_RV280_5964		0x5964
325*4882a593Smuzhiyun #define PCI_CHIP_RV280_5965 		0x5965
326*4882a593Smuzhiyun #define PCI_CHIP_RN50_5969		0x5969
327*4882a593Smuzhiyun #define PCI_CHIP_RS482_5974             0x5974
328*4882a593Smuzhiyun #define PCI_CHIP_RS482_5975             0x5975
329*4882a593Smuzhiyun #define PCI_CHIP_RS400_5A41             0x5A41
330*4882a593Smuzhiyun #define PCI_CHIP_RS400_5A42             0x5A42
331*4882a593Smuzhiyun #define PCI_CHIP_RC410_5A61             0x5A61
332*4882a593Smuzhiyun #define PCI_CHIP_RC410_5A62             0x5A62
333*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B60             0x5B60
334*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B61             0x5B61
335*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B62             0x5B62
336*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B63             0x5B63
337*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B64             0x5B64
338*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B65             0x5B65
339*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B66             0x5B66
340*4882a593Smuzhiyun #define PCI_CHIP_RV370_5B67             0x5B67
341*4882a593Smuzhiyun #define PCI_CHIP_RV280_5C61		0x5C61
342*4882a593Smuzhiyun #define PCI_CHIP_RV280_5C63		0x5C63
343*4882a593Smuzhiyun #define PCI_CHIP_R430_5D48              0x5D48
344*4882a593Smuzhiyun #define PCI_CHIP_R430_5D49              0x5D49
345*4882a593Smuzhiyun #define PCI_CHIP_R430_5D4A              0x5D4A
346*4882a593Smuzhiyun #define PCI_CHIP_R480_5D4C              0x5D4C
347*4882a593Smuzhiyun #define PCI_CHIP_R480_5D4D              0x5D4D
348*4882a593Smuzhiyun #define PCI_CHIP_R480_5D4E              0x5D4E
349*4882a593Smuzhiyun #define PCI_CHIP_R480_5D4F              0x5D4F
350*4882a593Smuzhiyun #define PCI_CHIP_R480_5D50              0x5D50
351*4882a593Smuzhiyun #define PCI_CHIP_R480_5D52              0x5D52
352*4882a593Smuzhiyun #define PCI_CHIP_R423_5D57              0x5D57
353*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E48             0x5E48
354*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E4A             0x5E4A
355*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E4B             0x5E4B
356*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E4C             0x5E4C
357*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E4D             0x5E4D
358*4882a593Smuzhiyun #define PCI_CHIP_RV410_5E4F             0x5E4F
359*4882a593Smuzhiyun #define PCI_CHIP_RS350_7834             0x7834
360*4882a593Smuzhiyun #define PCI_CHIP_RS350_7835             0x7835
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun /* ASPEED Technology (AST) */
363*4882a593Smuzhiyun #define PCI_CHIP_AST2000		0x2000
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun /* Avance Logic */
366*4882a593Smuzhiyun #define PCI_CHIP_ALG2064		0x2064
367*4882a593Smuzhiyun #define PCI_CHIP_ALG2301		0x2301
368*4882a593Smuzhiyun #define PCI_CHIP_ALG2501		0x2501
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun /* Tseng */
371*4882a593Smuzhiyun #define PCI_CHIP_ET4000_W32P_A		0x3202
372*4882a593Smuzhiyun #define PCI_CHIP_ET4000_W32P_B		0x3205
373*4882a593Smuzhiyun #define PCI_CHIP_ET4000_W32P_D		0x3206
374*4882a593Smuzhiyun #define PCI_CHIP_ET4000_W32P_C		0x3207
375*4882a593Smuzhiyun #define PCI_CHIP_ET6000			0x3208
376*4882a593Smuzhiyun #define PCI_CHIP_ET6300			0x4702
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun /* Weitek */
379*4882a593Smuzhiyun #define PCI_CHIP_P9000			0x9001
380*4882a593Smuzhiyun #define PCI_CHIP_P9100			0x9100
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun /* Digital */
383*4882a593Smuzhiyun #define PCI_CHIP_DC21050		0x0001
384*4882a593Smuzhiyun #define PCI_CHIP_DEC21030		0x0004
385*4882a593Smuzhiyun #define PCI_CHIP_TGA2			0x000D
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun /* Cirrus Logic */
388*4882a593Smuzhiyun #define PCI_CHIP_GD7548			0x0038
389*4882a593Smuzhiyun #define PCI_CHIP_GD7555			0x0040
390*4882a593Smuzhiyun #define PCI_CHIP_GD5430			0x00A0
391*4882a593Smuzhiyun #define PCI_CHIP_GD5434_4		0x00A4
392*4882a593Smuzhiyun #define PCI_CHIP_GD5434_8		0x00A8
393*4882a593Smuzhiyun #define PCI_CHIP_GD5436			0x00AC
394*4882a593Smuzhiyun #define PCI_CHIP_GD5446			0x00B8
395*4882a593Smuzhiyun #define PCI_CHIP_GD5480			0x00BC
396*4882a593Smuzhiyun #define PCI_CHIP_GD5462			0x00D0
397*4882a593Smuzhiyun #define PCI_CHIP_GD5464			0x00D4
398*4882a593Smuzhiyun #define PCI_CHIP_GD5464BD		0x00D5
399*4882a593Smuzhiyun #define PCI_CHIP_GD5465			0x00D6
400*4882a593Smuzhiyun #define PCI_CHIP_6729			0x1100
401*4882a593Smuzhiyun #define PCI_CHIP_6832			0x1110
402*4882a593Smuzhiyun #define PCI_CHIP_GD7542			0x1200
403*4882a593Smuzhiyun #define PCI_CHIP_GD7543			0x1202
404*4882a593Smuzhiyun #define PCI_CHIP_GD7541			0x1204
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun /* AMD */
407*4882a593Smuzhiyun #define PCI_CHIP_AMD761			0x700E
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun /* Trident */
410*4882a593Smuzhiyun #define PCI_CHIP_2100			0x2100
411*4882a593Smuzhiyun #define PCI_CHIP_8400			0x8400
412*4882a593Smuzhiyun #define PCI_CHIP_8420			0x8420
413*4882a593Smuzhiyun #define PCI_CHIP_8500			0x8500
414*4882a593Smuzhiyun #define PCI_CHIP_8520			0x8520
415*4882a593Smuzhiyun #define PCI_CHIP_8600			0x8600
416*4882a593Smuzhiyun #define PCI_CHIP_8620			0x8620
417*4882a593Smuzhiyun #define PCI_CHIP_8820			0x8820
418*4882a593Smuzhiyun #define PCI_CHIP_9320			0x9320
419*4882a593Smuzhiyun #define PCI_CHIP_9388			0x9388
420*4882a593Smuzhiyun #define PCI_CHIP_9397			0x9397
421*4882a593Smuzhiyun #define PCI_CHIP_939A			0x939A
422*4882a593Smuzhiyun #define PCI_CHIP_9420			0x9420
423*4882a593Smuzhiyun #define PCI_CHIP_9440			0x9440
424*4882a593Smuzhiyun #define PCI_CHIP_9520			0x9520
425*4882a593Smuzhiyun #define PCI_CHIP_9525			0x9525
426*4882a593Smuzhiyun #define PCI_CHIP_9540			0x9540
427*4882a593Smuzhiyun #define PCI_CHIP_9660			0x9660
428*4882a593Smuzhiyun #define PCI_CHIP_9750			0x9750
429*4882a593Smuzhiyun #define PCI_CHIP_9850			0x9850
430*4882a593Smuzhiyun #define PCI_CHIP_9880			0x9880
431*4882a593Smuzhiyun #define PCI_CHIP_9910			0x9910
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun /* ALI */
434*4882a593Smuzhiyun #define PCI_CHIP_M1435			0x1435
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun /* Matrox */
437*4882a593Smuzhiyun #define PCI_CHIP_MGA2085		0x0518
438*4882a593Smuzhiyun #define PCI_CHIP_MGA2064		0x0519
439*4882a593Smuzhiyun #define PCI_CHIP_MGA1064		0x051A
440*4882a593Smuzhiyun #define PCI_CHIP_MGA2164		0x051B
441*4882a593Smuzhiyun #define PCI_CHIP_MGA2164_AGP		0x051F
442*4882a593Smuzhiyun #define PCI_CHIP_MGAG200_PCI		0x0520
443*4882a593Smuzhiyun #define PCI_CHIP_MGAG200		0x0521
444*4882a593Smuzhiyun #define PCI_CHIP_MGAG400		0x0525
445*4882a593Smuzhiyun #define PCI_CHIP_MGAG550		0x2527
446*4882a593Smuzhiyun #define PCI_CHIP_IMPRESSION		0x0D10
447*4882a593Smuzhiyun #define PCI_CHIP_MGAG100_PCI		0x1000
448*4882a593Smuzhiyun #define PCI_CHIP_MGAG100		0x1001
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun #define PCI_CARD_G400_TH		0x2179
451*4882a593Smuzhiyun #define PCI_CARD_MILL_G200_SD		0xFF00
452*4882a593Smuzhiyun #define PCI_CARD_PROD_G100_SD		0xFF01
453*4882a593Smuzhiyun #define PCI_CARD_MYST_G200_SD		0xFF02
454*4882a593Smuzhiyun #define PCI_CARD_MILL_G200_SG		0xFF03
455*4882a593Smuzhiyun #define PCI_CARD_MARV_G200_SD		0xFF04
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun /* Chips & Tech */
458*4882a593Smuzhiyun #define PCI_CHIP_65545			0x00D8
459*4882a593Smuzhiyun #define PCI_CHIP_65548			0x00DC
460*4882a593Smuzhiyun #define PCI_CHIP_65550			0x00E0
461*4882a593Smuzhiyun #define PCI_CHIP_65554			0x00E4
462*4882a593Smuzhiyun #define PCI_CHIP_65555			0x00E5
463*4882a593Smuzhiyun #define PCI_CHIP_68554			0x00F4
464*4882a593Smuzhiyun #define PCI_CHIP_69000			0x00C0
465*4882a593Smuzhiyun #define PCI_CHIP_69030			0x0C30
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun /* Miro */
468*4882a593Smuzhiyun #define PCI_CHIP_ZR36050		0x5601
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun /* NEC */
471*4882a593Smuzhiyun #define PCI_CHIP_POWER_VR		0x0046
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun /* SiS */
474*4882a593Smuzhiyun #define PCI_CHIP_SG86C201		0x0001
475*4882a593Smuzhiyun #define PCI_CHIP_SG86C202		0x0002
476*4882a593Smuzhiyun #define PCI_CHIP_SG85C503		0x0008
477*4882a593Smuzhiyun #define PCI_CHIP_SIS5597		0x0200
478*4882a593Smuzhiyun /* Agregado por Carlos Duclos & Manuel Jander */
479*4882a593Smuzhiyun #define PCI_CHIP_SIS82C204		0x0204
480*4882a593Smuzhiyun #define PCI_CHIP_SG86C205		0x0205
481*4882a593Smuzhiyun #define PCI_CHIP_SG86C215		0x0215
482*4882a593Smuzhiyun #define PCI_CHIP_SG86C225		0x0225
483*4882a593Smuzhiyun #define PCI_CHIP_85C501			0x0406
484*4882a593Smuzhiyun #define PCI_CHIP_85C496			0x0496
485*4882a593Smuzhiyun #define PCI_CHIP_85C601			0x0601
486*4882a593Smuzhiyun #define PCI_CHIP_85C5107		0x5107
487*4882a593Smuzhiyun #define PCI_CHIP_85C5511		0x5511
488*4882a593Smuzhiyun #define PCI_CHIP_85C5513		0x5513
489*4882a593Smuzhiyun #define PCI_CHIP_SIS5571		0x5571
490*4882a593Smuzhiyun #define PCI_CHIP_SIS5597_2		0x5597
491*4882a593Smuzhiyun #define PCI_CHIP_SIS530			0x6306
492*4882a593Smuzhiyun #define PCI_CHIP_SIS6326		0x6326
493*4882a593Smuzhiyun #define PCI_CHIP_SIS7001		0x7001
494*4882a593Smuzhiyun #define PCI_CHIP_SIS300			0x0300
495*4882a593Smuzhiyun #define PCI_CHIP_SIS315H		0x0310
496*4882a593Smuzhiyun #define PCI_CHIP_SIS315PRO		0x0325
497*4882a593Smuzhiyun #define PCI_CHIP_SIS330			0x0330
498*4882a593Smuzhiyun #define PCI_CHIP_SIS630			0x6300
499*4882a593Smuzhiyun #define PCI_CHIP_SIS540			0x5300
500*4882a593Smuzhiyun #define PCI_CHIP_SIS550			0x5315
501*4882a593Smuzhiyun #define PCI_CHIP_SIS650			0x6325
502*4882a593Smuzhiyun #define PCI_CHIP_SIS730			0x7300
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun /* Hewlett-Packard */
505*4882a593Smuzhiyun #define PCI_CHIP_ELROY			0x1054
506*4882a593Smuzhiyun #define PCI_CHIP_ZX1_SBA		0x1229
507*4882a593Smuzhiyun #define PCI_CHIP_ZX1_IOC		0x122A
508*4882a593Smuzhiyun #define PCI_CHIP_ZX1_LBA		0x122E  /* a.k.a. Mercury */
509*4882a593Smuzhiyun #define PCI_CHIP_ZX1_AGP8		0x12B4  /* a.k.a. QuickSilver */
510*4882a593Smuzhiyun #define PCI_CHIP_ZX2_LBA		0x12EE
511*4882a593Smuzhiyun #define PCI_CHIP_ZX2_SBA		0x4030
512*4882a593Smuzhiyun #define PCI_CHIP_ZX2_IOC		0x4031
513*4882a593Smuzhiyun #define PCI_CHIP_ZX2_PCIE		0x4037
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun /* SGS */
516*4882a593Smuzhiyun #define PCI_CHIP_STG2000		0x0008
517*4882a593Smuzhiyun #define PCI_CHIP_STG1764		0x0009
518*4882a593Smuzhiyun #define PCI_CHIP_KYROII			0x0010
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun /* Texas Instruments */
521*4882a593Smuzhiyun #define PCI_CHIP_TI_PERMEDIA		0x3D04
522*4882a593Smuzhiyun #define PCI_CHIP_TI_PERMEDIA2		0x3D07
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun /* Oak */
525*4882a593Smuzhiyun #define PCI_CHIP_OTI107			0x0107
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun /* Number Nine */
528*4882a593Smuzhiyun #define PCI_CHIP_I128			0x2309
529*4882a593Smuzhiyun #define PCI_CHIP_I128_2			0x2339
530*4882a593Smuzhiyun #define PCI_CHIP_I128_T2R		0x493D
531*4882a593Smuzhiyun #define PCI_CHIP_I128_T2R4		0x5348
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun /* Sun */
534*4882a593Smuzhiyun #define PCI_CHIP_EBUS			0x1000
535*4882a593Smuzhiyun #define PCI_CHIP_HAPPY_MEAL		0x1001
536*4882a593Smuzhiyun #define PCI_CHIP_SIMBA			0x5000
537*4882a593Smuzhiyun #define PCI_CHIP_PSYCHO			0x8000
538*4882a593Smuzhiyun #define PCI_CHIP_SCHIZO			0x8001
539*4882a593Smuzhiyun #define PCI_CHIP_SABRE			0xA000
540*4882a593Smuzhiyun #define PCI_CHIP_HUMMINGBIRD		0xA001
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun /* BrookTree */
543*4882a593Smuzhiyun #define PCI_CHIP_BT848			0x0350
544*4882a593Smuzhiyun #define PCI_CHIP_BT849			0x0351
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun /* NVIDIA */
547*4882a593Smuzhiyun #define PCI_CHIP_NV1			0x0008
548*4882a593Smuzhiyun #define PCI_CHIP_DAC64			0x0009
549*4882a593Smuzhiyun #define PCI_CHIP_TNT			0x0020
550*4882a593Smuzhiyun #define PCI_CHIP_TNT2			0x0028
551*4882a593Smuzhiyun #define PCI_CHIP_UTNT2			0x0029
552*4882a593Smuzhiyun #define PCI_CHIP_VTNT2			0x002C
553*4882a593Smuzhiyun #define PCI_CHIP_UVTNT2			0x002D
554*4882a593Smuzhiyun #define PCI_CHIP_ITNT2			0x00A0
555*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE_256		0x0100
556*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE_DDR		0x0101
557*4882a593Smuzhiyun #define PCI_CHIP_QUADRO			0x0103
558*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_MX		0x0110
559*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_MX_100	0x0111
560*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_GO		0x0112
561*4882a593Smuzhiyun #define PCI_CHIP_QUADRO2_MXR		0x0113
562*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_GTS		0x0150
563*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_TI		0x0151
564*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE2_ULTRA		0x0152
565*4882a593Smuzhiyun #define PCI_CHIP_QUADRO2_PRO		0x0153
566*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_MX_460	0x0170
567*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_MX_440	0x0171
568*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_MX_420	0x0172
569*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_440_GO	0x0174
570*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_420_GO	0x0175
571*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_420_GO_M32	0x0176
572*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_500XGL		0x0178
573*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_440_GO_M64	0x0179
574*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_200		0x017A
575*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_550XGL		0x017B
576*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_500_GOGL	0x017C
577*4882a593Smuzhiyun #define PCI_CHIP_IGEFORCE2		0x01A0
578*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE3		0x0200
579*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE3_TI_200	0x0201
580*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE3_TI_500	0x0202
581*4882a593Smuzhiyun #define PCI_CHIP_QUADRO_DCC		0x0203
582*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_TI_4600	0x0250
583*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_TI_4400	0x0251
584*4882a593Smuzhiyun #define PCI_CHIP_GEFORCE4_TI_4200	0x0253
585*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_900XGL		0x0258
586*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_750XGL		0x0259
587*4882a593Smuzhiyun #define PCI_CHIP_QUADRO4_700XGL		0x025B
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun /* NVIDIA & SGS */
590*4882a593Smuzhiyun #define PCI_CHIP_RIVA128		0x0018
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun /* IMS */
593*4882a593Smuzhiyun #define PCI_CHIP_IMSTT128		0x9128
594*4882a593Smuzhiyun #define PCI_CHIP_IMSTT3D		0x9135
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun /* Alliance Semiconductor */
597*4882a593Smuzhiyun #define PCI_CHIP_AP6410			0x3210
598*4882a593Smuzhiyun #define PCI_CHIP_AP6422			0x6422
599*4882a593Smuzhiyun #define PCI_CHIP_AT24			0x6424
600*4882a593Smuzhiyun #define PCI_CHIP_AT3D			0x643D
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun /* 3dfx Interactive */
603*4882a593Smuzhiyun #define PCI_CHIP_VOODOO_GRAPHICS	0x0001
604*4882a593Smuzhiyun #define PCI_CHIP_VOODOO2		0x0002
605*4882a593Smuzhiyun #define PCI_CHIP_BANSHEE		0x0003
606*4882a593Smuzhiyun #define PCI_CHIP_VOODOO3		0x0005
607*4882a593Smuzhiyun #define PCI_CHIP_VOODOO5		0x0009
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun #define PCI_CARD_VOODOO3_2000		0x0036
610*4882a593Smuzhiyun #define PCI_CARD_VOODOO3_3000		0x003A
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun /* Rendition */
613*4882a593Smuzhiyun #define PCI_CHIP_V1000			0x0001
614*4882a593Smuzhiyun #define PCI_CHIP_V2x00			0x2000
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun /* 3Dlabs */
617*4882a593Smuzhiyun #define PCI_CHIP_300SX			0x0001
618*4882a593Smuzhiyun #define PCI_CHIP_500TX			0x0002
619*4882a593Smuzhiyun #define PCI_CHIP_DELTA			0x0003
620*4882a593Smuzhiyun #define PCI_CHIP_PERMEDIA		0x0004
621*4882a593Smuzhiyun #define PCI_CHIP_MX			0x0006
622*4882a593Smuzhiyun #define PCI_CHIP_PERMEDIA2		0x0007
623*4882a593Smuzhiyun #define PCI_CHIP_GAMMA			0x0008
624*4882a593Smuzhiyun #define PCI_CHIP_PERMEDIA2V		0x0009
625*4882a593Smuzhiyun #define PCI_CHIP_PERMEDIA3		0x000A
626*4882a593Smuzhiyun #define PCI_CHIP_PERMEDIA4		0x000C
627*4882a593Smuzhiyun #define PCI_CHIP_R4			0x000D
628*4882a593Smuzhiyun #define PCI_CHIP_GAMMA2			0x000E
629*4882a593Smuzhiyun #define PCI_CHIP_R4ALT			0x0011
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun /* S3 */
632*4882a593Smuzhiyun #define PCI_CHIP_PLATO			0x0551
633*4882a593Smuzhiyun #define PCI_CHIP_VIRGE			0x5631
634*4882a593Smuzhiyun #define PCI_CHIP_TRIO			0x8811
635*4882a593Smuzhiyun #define PCI_CHIP_AURORA64VP		0x8812
636*4882a593Smuzhiyun #define PCI_CHIP_TRIO64UVP		0x8814
637*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_VX		0x883D
638*4882a593Smuzhiyun #define PCI_CHIP_868			0x8880
639*4882a593Smuzhiyun #define PCI_CHIP_928			0x88B0
640*4882a593Smuzhiyun #define PCI_CHIP_864_0			0x88C0
641*4882a593Smuzhiyun #define PCI_CHIP_864_1			0x88C1
642*4882a593Smuzhiyun #define PCI_CHIP_964_0			0x88D0
643*4882a593Smuzhiyun #define PCI_CHIP_964_1			0x88D1
644*4882a593Smuzhiyun #define PCI_CHIP_968			0x88F0
645*4882a593Smuzhiyun #define PCI_CHIP_TRIO64V2_DXGX		0x8901
646*4882a593Smuzhiyun #define PCI_CHIP_PLATO_PX		0x8902
647*4882a593Smuzhiyun #define PCI_CHIP_Trio3D			0x8904
648*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_DXGX		0x8A01
649*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_GX2		0x8A10
650*4882a593Smuzhiyun #define PCI_CHIP_Trio3D_2X		0x8A13
651*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE3D		0x8A20
652*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE3D_MV		0x8A21
653*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE4		0x8A22
654*4882a593Smuzhiyun #define PCI_CHIP_PROSAVAGE_PM		0x8A25
655*4882a593Smuzhiyun #define PCI_CHIP_PROSAVAGE_KM		0x8A26
656*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_MX		0x8C01
657*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_MXPLUS		0x8C02
658*4882a593Smuzhiyun #define PCI_CHIP_VIRGE_MXP		0x8C03
659*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE_MX_MV		0x8C10
660*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE_MX		0x8C11
661*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE_IX_MV		0x8C12
662*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE_IX		0x8C13
663*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_MX128		0x8C22
664*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_MX64		0x8C24
665*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_MX64C		0x8C26
666*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IX128SDR	0x8C2A
667*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IX128DDR	0x8C2B
668*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IX64SDR		0x8C2C
669*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IX64DDR		0x8C2D
670*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IXCSDR		0x8C2E
671*4882a593Smuzhiyun #define PCI_CHIP_SUPSAV_IXCDDR		0x8C2F
672*4882a593Smuzhiyun #define PCI_CHIP_S3TWISTER_P		0x8D01
673*4882a593Smuzhiyun #define PCI_CHIP_S3TWISTER_K		0x8D02
674*4882a593Smuzhiyun #define PCI_CHIP_PROSAVAGE_DDR		0x8D03
675*4882a593Smuzhiyun #define PCI_CHIP_PROSAVAGE_DDRK		0x8D04
676*4882a593Smuzhiyun #define PCI_CHIP_SAVAGE2000		0x9102
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun /* ARK Logic */
679*4882a593Smuzhiyun #define PCI_CHIP_1000PV			0xA091
680*4882a593Smuzhiyun #define PCI_CHIP_2000PV			0xA099
681*4882a593Smuzhiyun #define PCI_CHIP_2000MT			0xA0A1
682*4882a593Smuzhiyun #define PCI_CHIP_2000MI			0xA0A9
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun /* Tritech Microelectronics */
685*4882a593Smuzhiyun #define PCI_CHIP_TR25202		0xFC02
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun /* Neomagic */
688*4882a593Smuzhiyun #define PCI_CHIP_NM2070			0x0001
689*4882a593Smuzhiyun #define PCI_CHIP_NM2090			0x0002
690*4882a593Smuzhiyun #define PCI_CHIP_NM2093			0x0003
691*4882a593Smuzhiyun #define PCI_CHIP_NM2097			0x0083
692*4882a593Smuzhiyun #define PCI_CHIP_NM2160			0x0004
693*4882a593Smuzhiyun #define PCI_CHIP_NM2200			0x0005
694*4882a593Smuzhiyun #define PCI_CHIP_NM2230			0x0025
695*4882a593Smuzhiyun #define PCI_CHIP_NM2360			0x0006
696*4882a593Smuzhiyun #define PCI_CHIP_NM2380			0x0016
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun /* Intel */
699*4882a593Smuzhiyun #define PCI_CHIP_I815_BRIDGE		0x1130
700*4882a593Smuzhiyun #define PCI_CHIP_I815			0x1132
701*4882a593Smuzhiyun #define PCI_CHIP_82801_P2P		0x244E
702*4882a593Smuzhiyun #define PCI_CHIP_845_G_BRIDGE		0x2560
703*4882a593Smuzhiyun #define PCI_CHIP_845_G			0x2562
704*4882a593Smuzhiyun #define PCI_CHIP_I830_M_BRIDGE		0x3575
705*4882a593Smuzhiyun #define PCI_CHIP_I830_M			0x3577
706*4882a593Smuzhiyun #define PCI_CHIP_I810_BRIDGE		0x7120
707*4882a593Smuzhiyun #define PCI_CHIP_I810			0x7121
708*4882a593Smuzhiyun #define PCI_CHIP_I810_DC100_BRIDGE	0x7122
709*4882a593Smuzhiyun #define PCI_CHIP_I810_DC100		0x7123
710*4882a593Smuzhiyun #define PCI_CHIP_I810_E_BRIDGE		0x7124
711*4882a593Smuzhiyun #define PCI_CHIP_I810_E			0x7125
712*4882a593Smuzhiyun #define PCI_CHIP_I740_AGP		0x7800
713*4882a593Smuzhiyun #define PCI_CHIP_460GX_PXB		0x84CB
714*4882a593Smuzhiyun #define PCI_CHIP_460GX_SAC		0x84E0
715*4882a593Smuzhiyun #define PCI_CHIP_460GX_GXB_2		0x84E2  /* PCI function 2 */
716*4882a593Smuzhiyun #define PCI_CHIP_460GX_WXB		0x84E6
717*4882a593Smuzhiyun #define PCI_CHIP_460GX_GXB_1		0x84EA  /* PCI function 1 */
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun /* Silicon Motion Inc. */
720*4882a593Smuzhiyun #define PCI_CHIP_SMI910			0x0910
721*4882a593Smuzhiyun #define PCI_CHIP_SMI810			0x0810
722*4882a593Smuzhiyun #define PCI_CHIP_SMI820			0x0820
723*4882a593Smuzhiyun #define PCI_CHIP_SMI710			0x0710
724*4882a593Smuzhiyun #define PCI_CHIP_SMI712			0x0712
725*4882a593Smuzhiyun #define PCI_CHIP_SMI720			0x0720
726*4882a593Smuzhiyun #define PCI_CHIP_SMI731			0x0730
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun /* VMware */
729*4882a593Smuzhiyun #define PCI_CHIP_VMWARE0405		0x0405
730*4882a593Smuzhiyun #define PCI_CHIP_VMWARE0710		0x0710
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun #endif                          /* _XF86_PCIINFO_H */
733