1*4882a593Smuzhiyun /* GPL-2.0 WITH Linux-syscall-note OR Apache 2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef INCLUDE_RT_MPI_RK_MPI_VPSS_H_ 5*4882a593Smuzhiyun #define INCLUDE_RT_MPI_RK_MPI_VPSS_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "rk_common.h" 8*4882a593Smuzhiyun #include "rk_comm_video.h" 9*4882a593Smuzhiyun #include "rk_comm_mb.h" 10*4882a593Smuzhiyun #include "rk_comm_vpss.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifdef __cplusplus 13*4882a593Smuzhiyun #if __cplusplus 14*4882a593Smuzhiyun extern "C" { 15*4882a593Smuzhiyun #endif 16*4882a593Smuzhiyun #endif /* __cplusplus */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Group Settings */ 19*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_CreateGrp(VPSS_GRP VpssGrp, const VPSS_GRP_ATTR_S *pstGrpAttr); 20*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DestroyGrp(VPSS_GRP VpssGrp); 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_StartGrp(VPSS_GRP VpssGrp); 23*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_StopGrp(VPSS_GRP VpssGrp); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_ResetGrp(VPSS_GRP VpssGrp); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetGrpAttr(VPSS_GRP VpssGrp, VPSS_GRP_ATTR_S *pstGrpAttr); 28*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetGrpAttr(VPSS_GRP VpssGrp, const VPSS_GRP_ATTR_S *pstGrpAttr); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetGrpCrop(VPSS_GRP VpssGrp, const VPSS_CROP_INFO_S *pstCropInfo); 31*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetGrpCrop(VPSS_GRP VpssGrp, VPSS_CROP_INFO_S *pstCropInfo); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetGrpRotation(VPSS_GRP VpssGrp, ROTATION_E enRotation); 34*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetGrpRotation(VPSS_GRP VpssGrp, ROTATION_E *penRotation); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SendFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, 37*4882a593Smuzhiyun const VIDEO_FRAME_INFO_S *pstVideoFrame, RK_S32 s32MilliSec); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetGrpFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, 40*4882a593Smuzhiyun VIDEO_FRAME_INFO_S *pstVideoFrame); 41*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_ReleaseGrpFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, 42*4882a593Smuzhiyun const VIDEO_FRAME_INFO_S *pstVideoFrame); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_EnableBackupFrame(VPSS_GRP VpssGrp); 45*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DisableBackupFrame(VPSS_GRP VpssGrp); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetGrpDelay(VPSS_GRP VpssGrp, RK_U32 u32Delay); 48*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetGrpDelay(VPSS_GRP VpssGrp, RK_U32 *pu32Delay); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_EnableUserFrameRateCtrl(VPSS_GRP VpssGrp); 51*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DisableUserFrameRateCtrl(VPSS_GRP VpssGrp); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* Chn Settings */ 54*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_CHN_ATTR_S *pstChnAttr); 55*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CHN_ATTR_S *pstChnAttr); 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_EnableChn(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 58*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DisableChn(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetChnCrop(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_CROP_INFO_S *pstCropInfo); 61*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnCrop(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CROP_INFO_S *pstCropInfo); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetChnRotation(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, ROTATION_E enRotation); 64*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnRotation(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, ROTATION_E *penRotation); 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetChnRotationEx(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, 67*4882a593Smuzhiyun const VPSS_ROTATION_EX_ATTR_S* pstRotationExAttr); 68*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnRotationEx(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, 69*4882a593Smuzhiyun VPSS_ROTATION_EX_ATTR_S* pstRotationExAttr); 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnFrame( 72*4882a593Smuzhiyun VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VIDEO_FRAME_INFO_S *pstVideoFrame, RK_S32 s32MilliSec); 73*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_ReleaseChnFrame(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VIDEO_FRAME_INFO_S *pstVideoFrame); 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetRegionLuma(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VIDEO_REGION_INFO_S *pstRegionInfo, 76*4882a593Smuzhiyun RK_U64 *pu64LumaData, RK_S32 s32MilliSec); 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_AttachMbPool(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, MB_POOL hVbPool); 79*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DetachMbPool(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_EnableBufferShare(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 82*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_DisableBufferShare(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetChnFd(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 85*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_CloseFd(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetVProcDev(VPSS_GRP VpssGrp, VIDEO_PROC_DEV_TYPE_E enVProcDev); 88*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetVProcDev(VPSS_GRP VpssGrp, VIDEO_PROC_DEV_TYPE_E *enVProcDev); 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_SetModParam(const VPSS_MOD_PARAM_S *pstModParam); 91*4882a593Smuzhiyun RK_S32 RK_MPI_VPSS_GetModParam(VPSS_MOD_PARAM_S *pstModParam); 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #ifdef __cplusplus 94*4882a593Smuzhiyun #if __cplusplus 95*4882a593Smuzhiyun } 96*4882a593Smuzhiyun #endif 97*4882a593Smuzhiyun #endif /* __cplusplus */ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #endif /* INCLUDE_RT_MPI_RK_MPI_VPSS_H_ */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun 102