1*4882a593Smuzhiyun /* GPL-2.0 WITH Linux-syscall-note OR Apache 2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef INCLUDE_RT_MPI_RK_MPI_MMZ_H__ 5*4882a593Smuzhiyun #define INCLUDE_RT_MPI_RK_MPI_MMZ_H__ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "rk_comm_mb.h" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifdef __cplusplus 10*4882a593Smuzhiyun #if __cplusplus 11*4882a593Smuzhiyun extern "C" { 12*4882a593Smuzhiyun #endif 13*4882a593Smuzhiyun #endif /* __cplusplus */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define RK_MMZ_ALLOC_TYPE_IOMMU 0x00000000 16*4882a593Smuzhiyun #define RK_MMZ_ALLOC_TYPE_CMA 0x00000001 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define RK_MMZ_ALLOC_CACHEABLE 0x00000000 19*4882a593Smuzhiyun #define RK_MMZ_ALLOC_UNCACHEABLE 0x00000010 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define RK_MMZ_SYNC_READONLY 0x00000000 22*4882a593Smuzhiyun #define RK_MMZ_SYNC_WRITEONLY 0x00000001 23*4882a593Smuzhiyun #define RK_MMZ_SYNC_RW 0x00000002 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_Alloc(MB_BLK *pBlk, RK_U32 u32Length, RK_U32 u32Flags); 26*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_Free(MB_BLK blk); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun RK_U64 RK_MPI_MMZ_Handle2PhysAddr(MB_BLK blk); 29*4882a593Smuzhiyun RK_VOID *RK_MPI_MMZ_Handle2VirAddr(MB_BLK blk); 30*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_Handle2Fd(MB_BLK blk); 31*4882a593Smuzhiyun RK_U64 RK_MPI_MMZ_GetSize(MB_BLK blk); 32*4882a593Smuzhiyun MB_BLK RK_MPI_MMZ_Fd2Handle(RK_S32 u32Fd); 33*4882a593Smuzhiyun MB_BLK RK_MPI_MMZ_VirAddr2Handle(RK_VOID *pVirAddr); 34*4882a593Smuzhiyun MB_BLK RK_MPI_MMZ_PhyAddr2Handle(RK_U64 u64phyAddr); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_IsCacheable(MB_BLK blk); 37*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCacheStart(MB_BLK blk, RK_U32 u32Offset, RK_U32 u32Length, RK_U32 u32Flags); 38*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCacheEnd(MB_BLK blk, RK_U32 u32Offset, RK_U32 u32Length, RK_U32 u32Flags); 39*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCacheVaddrStart(RK_VOID *pVirAddr, RK_U32 u32Length, RK_U32 u32Flags); 40*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCacheVaddrEnd(RK_VOID *pVirAddr, RK_U32 u32Length, RK_U32 u32Flags); 41*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCachePaddrStart(RK_U64 u64phyAddr, RK_U32 u32Length, RK_U32 u32Flags); 42*4882a593Smuzhiyun RK_S32 RK_MPI_MMZ_FlushCachePaddrEnd(RK_U64 u64phyAddr, RK_U32 u32Length, RK_U32 u32Flags); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #ifdef __cplusplus 45*4882a593Smuzhiyun #if __cplusplus 46*4882a593Smuzhiyun } 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun #endif /* __cplusplus */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif /* INCLUDE_RT_MPI_RK_MPI_MMZ_H__ */ 51