1*4882a593Smuzhiyun /* GPL-2.0 WITH Linux-syscall-note OR Apache 2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef INCLUDE_RT_MPI_RK_COMM_GDC_H_ 5*4882a593Smuzhiyun #define INCLUDE_RT_MPI_RK_COMM_GDC_H_ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifdef __cplusplus 8*4882a593Smuzhiyun #if __cplusplus 9*4882a593Smuzhiyun extern "C" { 10*4882a593Smuzhiyun #endif 11*4882a593Smuzhiyun #endif /* __cplusplus */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include "rk_type.h" 14*4882a593Smuzhiyun #include "rk_common.h" 15*4882a593Smuzhiyun #include "rk_errno.h" 16*4882a593Smuzhiyun #include "rk_comm_video.h" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* failure caused by malloc buffer */ 19*4882a593Smuzhiyun #define RK_GDC_SUCCESS RK_SUCCESS 20*4882a593Smuzhiyun #define RK_ERR_GDC_NOBUF RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_NOBUF) 21*4882a593Smuzhiyun #define RK_ERR_GDC_BUF_EMPTY RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_BUF_EMPTY) 22*4882a593Smuzhiyun #define RK_ERR_GDC_NULL_PTR RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_NULL_PTR) 23*4882a593Smuzhiyun #define RK_ERR_GDC_ILLEGAL_PARAM RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_ILLEGAL_PARAM) 24*4882a593Smuzhiyun #define RK_ERR_GDC_BUF_FULL RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_BUF_FULL) 25*4882a593Smuzhiyun #define RK_ERR_GDC_SYS_NOTREADY RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_NOTREADY) 26*4882a593Smuzhiyun #define RK_ERR_GDC_NOT_SUPPORT RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_NOT_SUPPORT) 27*4882a593Smuzhiyun #define RK_ERR_GDC_NOT_PERMITTED RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_NOT_PERM) 28*4882a593Smuzhiyun #define RK_ERR_GDC_BUSY RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_BUSY) 29*4882a593Smuzhiyun #define RK_ERR_GDC_INVALID_CHNID RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_INVALID_CHNID) 30*4882a593Smuzhiyun #define RK_ERR_GDC_CHN_UNEXIST RK_DEF_ERR(RK_ID_GDC, RK_ERR_LEVEL_ERROR, RK_ERR_UNEXIST) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define FISHEYE_MAX_REGION_NUM 9 33*4882a593Smuzhiyun #define FISHEYE_LMFCOEF_NUM 128 34*4882a593Smuzhiyun #define GDC_PMFCOEF_NUM 9 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun typedef RK_S32 GDC_HANDLE; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun typedef struct rkGDC_TASK_ATTR_S { 39*4882a593Smuzhiyun VIDEO_FRAME_INFO_S stImgIn; /* Input picture */ 40*4882a593Smuzhiyun VIDEO_FRAME_INFO_S stImgOut; /* Output picture */ 41*4882a593Smuzhiyun /* RW; Private data of task ; au64privateData[0]: stepx au64privateData[1]: stepy; 42*4882a593Smuzhiyun advised to set this parameter to 0.*/ 43*4882a593Smuzhiyun RK_U64 au64privateData[4]; 44*4882a593Smuzhiyun /* RW; Specify a task index, default 0 is not specify;[0,GDC_MAX_TASK_NUM); 45*4882a593Smuzhiyun advised to set this parameter to 0*/ 46*4882a593Smuzhiyun RK_U64 u64TaskId; 47*4882a593Smuzhiyun } GDC_TASK_ATTR_S; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* Mount mode of device*/ 50*4882a593Smuzhiyun typedef enum rkFISHEYE_MOUNT_MODE_E { 51*4882a593Smuzhiyun FISHEYE_DESKTOP_MOUNT = 0, /* Desktop mount mode */ 52*4882a593Smuzhiyun FISHEYE_CEILING_MOUNT = 1, /* Ceiling mount mode */ 53*4882a593Smuzhiyun FISHEYE_WALL_MOUNT = 2, /* wall mount mode */ 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun FISHEYE_MOUNT_MODE_BUTT 56*4882a593Smuzhiyun } FISHEYE_MOUNT_MODE_E; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* View mode of client*/ 59*4882a593Smuzhiyun typedef enum rkFISHEYE_VIEW_MODE_E { 60*4882a593Smuzhiyun FISHEYE_VIEW_360_PANORAMA = 0, /* 360 panorama mode of gdc correction */ 61*4882a593Smuzhiyun FISHEYE_VIEW_180_PANORAMA = 1, /* 180 panorama mode of gdc correction */ 62*4882a593Smuzhiyun FISHEYE_VIEW_NORMAL = 2, /* normal mode of gdc correction */ 63*4882a593Smuzhiyun FISHEYE_NO_TRANSFORMATION = 3, /* no gdc correction */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun FISHEYE_VIEW_MODE_BUTT 66*4882a593Smuzhiyun } FISHEYE_VIEW_MODE_E; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /*Fisheye region correction attribute */ 69*4882a593Smuzhiyun typedef struct rkFISHEYE_REGION_ATTR_S { 70*4882a593Smuzhiyun FISHEYE_VIEW_MODE_E enViewMode; /* RW; Range: [0, 3];gdc view mode */ 71*4882a593Smuzhiyun RK_U32 u32InRadius; /* RW; inner radius of gdc correction region*/ 72*4882a593Smuzhiyun RK_U32 u32OutRadius; /* RW; out radius of gdc correction region*/ 73*4882a593Smuzhiyun RK_U32 u32Pan; /* RW; Range: [0, 360] */ 74*4882a593Smuzhiyun RK_U32 u32Tilt; /* RW; Range: [0, 360] */ 75*4882a593Smuzhiyun RK_U32 u32HorZoom; /* RW; Range: [1, 4095] */ 76*4882a593Smuzhiyun RK_U32 u32VerZoom; /* RW; Range: [1, 4095] */ 77*4882a593Smuzhiyun RECT_S stOutRect; /* RW; out Imge rectangle attribute */ 78*4882a593Smuzhiyun } FISHEYE_REGION_ATTR_S; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun typedef struct rkFISHEYE_REGION_ATTR_EX_S { 81*4882a593Smuzhiyun FISHEYE_VIEW_MODE_E enViewMode; /* RW; Range: [0, 3];gdc view mode */ 82*4882a593Smuzhiyun RK_U32 u32InRadius; /* RW; inner radius of gdc correction region*/ 83*4882a593Smuzhiyun RK_U32 u32OutRadius; /* RW; out radius of gdc correction region*/ 84*4882a593Smuzhiyun RK_U32 u32X; /* RW; Range: [0, 4608] */ 85*4882a593Smuzhiyun RK_U32 u32Y; /* RW; Range: [0, 3456] */ 86*4882a593Smuzhiyun RK_U32 u32HorZoom; /* RW; Range: [1, 4095] */ 87*4882a593Smuzhiyun RK_U32 u32VerZoom; /* RW; Range: [1, 4095] */ 88*4882a593Smuzhiyun RECT_S stOutRect; /* RW; out Imge rectangle attribute */ 89*4882a593Smuzhiyun } FISHEYE_REGION_ATTR_EX_S; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /*Fisheye all regions correction attribute */ 92*4882a593Smuzhiyun typedef struct rkFISHEYE_ATTR_S { 93*4882a593Smuzhiyun RK_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ 94*4882a593Smuzhiyun /* RW; Range: [0, 1];whether gdc len's LMF coefficient is from user config or from default linear config */ 95*4882a593Smuzhiyun RK_BOOL bLMF; 96*4882a593Smuzhiyun RK_BOOL bBgColor; /* RW; Range: [0, 1];whether use background color or not */ 97*4882a593Smuzhiyun RK_U32 u32BgColor; /* RW; Range: [0,0xffffff];the background color RGB888*/ 98*4882a593Smuzhiyun /* RW; Range: [-511, 511];the horizontal offset between image center and physical center of len*/ 99*4882a593Smuzhiyun RK_S32 s32HorOffset; 100*4882a593Smuzhiyun /* RW; Range: [-511, 511]; the vertical offset between image center and physical center of len*/ 101*4882a593Smuzhiyun RK_S32 s32VerOffset; 102*4882a593Smuzhiyun RK_U32 u32TrapezoidCoef; /* RW; Range: [0, 32];strength coefficient of trapezoid correction */ 103*4882a593Smuzhiyun RK_S32 s32FanStrength; /* RW; Range: [-760, 760];strength coefficient of fan correction */ 104*4882a593Smuzhiyun FISHEYE_MOUNT_MODE_E enMountMode; /* RW; Range: [0, 2];gdc mount mode */ 105*4882a593Smuzhiyun RK_U32 u32RegionNum; /* RW; Range: [1, 9]; gdc correction region number */ 106*4882a593Smuzhiyun /* RW; attribution of gdc correction region */ 107*4882a593Smuzhiyun FISHEYE_REGION_ATTR_S astFishEyeRegionAttr[FISHEYE_MAX_REGION_NUM]; 108*4882a593Smuzhiyun } FISHEYE_ATTR_S; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun typedef struct rkFISHEYE_ATTR_EX_S { 111*4882a593Smuzhiyun RK_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ 112*4882a593Smuzhiyun /* RW; Range: [0, 1];whether gdc len's LMF coefficient is from user config or from default linear config */ 113*4882a593Smuzhiyun RK_BOOL bLMF; 114*4882a593Smuzhiyun RK_BOOL bBgColor; /* RW; Range: [0, 1];whether use background color or not */ 115*4882a593Smuzhiyun RK_U32 u32BgColor; /* RW; Range: [0,0xffffff];the background color RGB888*/ 116*4882a593Smuzhiyun /* RW; Range: [-511, 511];the horizontal offset between image center and physical center of len*/ 117*4882a593Smuzhiyun RK_S32 s32HorOffset; 118*4882a593Smuzhiyun /* RW; Range: [-511, 511]; the vertical offset between image center and physical center of len*/ 119*4882a593Smuzhiyun RK_S32 s32VerOffset; 120*4882a593Smuzhiyun RK_U32 u32TrapezoidCoef; /* RW; Range: [0, 32];strength coefficient of trapezoid correction */ 121*4882a593Smuzhiyun RK_S32 s32FanStrength; /* RW; Range: [-760, 760];strength coefficient of fan correction */ 122*4882a593Smuzhiyun FISHEYE_MOUNT_MODE_E enMountMode; /* RW; Range: [0, 2];gdc mount mode */ 123*4882a593Smuzhiyun RK_U32 u32RegionNum; /* RW; Range: [1, 4]; gdc correction region number */ 124*4882a593Smuzhiyun /* RW; attribution of gdc correction region */ 125*4882a593Smuzhiyun FISHEYE_REGION_ATTR_EX_S astFishEyeRegionAttr[FISHEYE_MAX_REGION_NUM]; 126*4882a593Smuzhiyun } FISHEYE_ATTR_EX_S; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /*Spread correction attribute */ 129*4882a593Smuzhiyun typedef struct rkSPREAD_ATTR_S { 130*4882a593Smuzhiyun /* RW; Range: [0, 1];whether enable spread or not, When spread on, ldc DistortionRatio range should be [0, 500] */ 131*4882a593Smuzhiyun RK_BOOL bEnable; 132*4882a593Smuzhiyun RK_U32 u32SpreadCoef; /* RW; Range: [0, 18];strength coefficient of spread correction */ 133*4882a593Smuzhiyun SIZE_S stDestSize; /* RW; dest size of spread*/ 134*4882a593Smuzhiyun } SPREAD_ATTR_S; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /*Fisheye Job Config */ 137*4882a593Smuzhiyun typedef struct rkFISHEYE_JOB_CONFIG_S { 138*4882a593Smuzhiyun RK_U64 u64LenMapPhyAddr; /* LMF coefficient Physic Addr*/ 139*4882a593Smuzhiyun } FISHEYE_JOB_CONFIG_S; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /*Fisheye Config */ 142*4882a593Smuzhiyun typedef struct rkFISHEYE_CONFIG_S { 143*4882a593Smuzhiyun RK_U16 au16LMFCoef[FISHEYE_LMFCOEF_NUM]; /*RW; LMF coefficient of gdc len */ 144*4882a593Smuzhiyun } FISHEYE_CONFIG_S; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /*Gdc PMF Attr */ 147*4882a593Smuzhiyun typedef struct rkGDC_PMF_ATTR_S { 148*4882a593Smuzhiyun RK_S64 as64PMFCoef[GDC_PMFCOEF_NUM]; /*W; PMF coefficient of gdc */ 149*4882a593Smuzhiyun } GDC_PMF_ATTR_S; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun typedef struct rkGDC_FISHEYE_POINT_QUERY_ATTR_S { 152*4882a593Smuzhiyun RK_U32 u32RegionIndex; 153*4882a593Smuzhiyun FISHEYE_ATTR_S *pstFishEyeAttr; 154*4882a593Smuzhiyun RK_U16 au16LMF[FISHEYE_LMFCOEF_NUM]; 155*4882a593Smuzhiyun } GDC_FISHEYE_POINT_QUERY_ATTR_S; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #ifdef __cplusplus 158*4882a593Smuzhiyun #if __cplusplus 159*4882a593Smuzhiyun } 160*4882a593Smuzhiyun #endif 161*4882a593Smuzhiyun #endif /* __cplusplus */ 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #endif /* __RK_COMM_GDC_H__ */ 164