1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2021 Rockchip Electronics Co. LTD 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Licensed under the Apache License, Version 2.0 (the "License"); 5*4882a593Smuzhiyun * you may not use this file except in compliance with the License. 6*4882a593Smuzhiyun * You may obtain a copy of the License at 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * http://www.apache.org/licenses/LICENSE-2.0 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Unless required by applicable law or agreed to in writing, software 11*4882a593Smuzhiyun * distributed under the License is distributed on an "AS IS" BASIS, 12*4882a593Smuzhiyun * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*4882a593Smuzhiyun * See the License for the specific language governing permissions and 14*4882a593Smuzhiyun * limitations under the License. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifndef SRC_TESTS_RT_MPI_COMMON_TEST_MOD_VPSS_H_ 18*4882a593Smuzhiyun #define SRC_TESTS_RT_MPI_COMMON_TEST_MOD_VPSS_H_ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "rk_common.h" 21*4882a593Smuzhiyun #include "rk_comm_vpss.h" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef __cplusplus 24*4882a593Smuzhiyun #if __cplusplus 25*4882a593Smuzhiyun extern "C" { 26*4882a593Smuzhiyun #endif 27*4882a593Smuzhiyun #endif /* End of #ifdef __cplusplus */ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun typedef struct _rkMpiVPSSCtx { 30*4882a593Smuzhiyun const char *srcFileName; 31*4882a593Smuzhiyun const char *dstFilePath; 32*4882a593Smuzhiyun RK_S32 s32LoopCount; 33*4882a593Smuzhiyun RK_S32 s32VProcDevType; 34*4882a593Smuzhiyun RK_S32 s32GrpNum; 35*4882a593Smuzhiyun RK_S32 s32ChnNum; 36*4882a593Smuzhiyun RK_BOOL bGrpCropEn; 37*4882a593Smuzhiyun RK_BOOL bChnCropEn; 38*4882a593Smuzhiyun RK_S32 s32GrpCropRatio; 39*4882a593Smuzhiyun RK_S32 s32ChnCropRatio; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun RK_S32 s32SrcWidth; 42*4882a593Smuzhiyun RK_S32 s32SrcHeight; 43*4882a593Smuzhiyun RK_S32 s32SrcVirWidth; 44*4882a593Smuzhiyun RK_S32 s32SrcVirHeight; 45*4882a593Smuzhiyun RK_S32 s32SrcCompressMode; 46*4882a593Smuzhiyun RK_S32 s32SrcPixFormat; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun RK_S32 s32DstWidth; 49*4882a593Smuzhiyun RK_S32 s32DstHeight; 50*4882a593Smuzhiyun RK_S32 s32DstCompressMode; 51*4882a593Smuzhiyun RK_S32 s32DstPixFormat; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun RK_S32 s32GrpRotation; 54*4882a593Smuzhiyun RK_S32 s32Rotation; 55*4882a593Smuzhiyun RK_S32 s32RotationEx; 56*4882a593Smuzhiyun RK_S32 s32Mirror; 57*4882a593Smuzhiyun RK_S32 s32Flip; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun RK_BOOL bAttachPool; 60*4882a593Smuzhiyun RK_S32 s32ChnMode; 61*4882a593Smuzhiyun RK_U32 u32ChnDepth; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun RK_S32 s32SrcChnRate; 64*4882a593Smuzhiyun RK_S32 s32DstChnRate; 65*4882a593Smuzhiyun RK_S32 s32SrcGrpRate; 66*4882a593Smuzhiyun RK_S32 s32DstGrpRate; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun RK_S32 s32GrpIndex; 69*4882a593Smuzhiyun MB_POOL attachPool; 70*4882a593Smuzhiyun } TEST_VPSS_CTX_S; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModInit(TEST_VPSS_CTX_S *pstCtx); 73*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModDeInit(TEST_VPSS_CTX_S *pstCtx); 74*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModSendFrame(TEST_VPSS_CTX_S *pstCtx); 75*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModGetGrpFrame(TEST_VPSS_CTX_S *pstCtx, VIDEO_FRAME_INFO_S *pstVideoFrame); 76*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModGetChnFrame(TEST_VPSS_CTX_S *pstCtx, VIDEO_FRAME_INFO_S *pstVideoFrame); 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun RK_S32 TEST_VPSS_ModTest(TEST_VPSS_CTX_S *pstCtx); 79*4882a593Smuzhiyun RK_S32 TEST_VPSS_UnitTest(TEST_VPSS_CTX_S *pstCtx, VIDEO_FRAME_INFO_S *pstChnFrames); 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #ifdef __cplusplus 82*4882a593Smuzhiyun #if __cplusplus 83*4882a593Smuzhiyun } 84*4882a593Smuzhiyun #endif 85*4882a593Smuzhiyun #endif /* End of #ifdef __cplusplus */ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #endif // SRC_TESTS_RT_MPI_COMMON_TEST_MOD_VPSS_H_ 88