1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2018 Realtek Semiconductor Corporation. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 5*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by 6*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or 7*4882a593Smuzhiyun * (at your option) any later version. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 10*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*4882a593Smuzhiyun * GNU General Public License for more details. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun struct rtb_struct; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define BAUDRATE_4BYTES 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define ROM_LMP_NONE 0x0000 20*4882a593Smuzhiyun #define ROM_LMP_8723a 0x1200 21*4882a593Smuzhiyun #define ROM_LMP_8723b 0x8723 22*4882a593Smuzhiyun #define ROM_LMP_8821a 0x8821 23*4882a593Smuzhiyun #define ROM_LMP_8761a 0x8761 24*4882a593Smuzhiyun #define ROM_LMP_8761btc 0x8763 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define ROM_LMP_8703a 0x87b3 27*4882a593Smuzhiyun #define ROM_LMP_8763a 0x8763 28*4882a593Smuzhiyun #define ROM_LMP_8703b 0x8703 29*4882a593Smuzhiyun #define ROM_LMP_8723c 0x87c3 /* ??????? */ 30*4882a593Smuzhiyun #define ROM_LMP_8822b 0x8822 31*4882a593Smuzhiyun #define ROM_LMP_8822c 0x8822 32*4882a593Smuzhiyun #define ROM_LMP_8852a 0x8852 33*4882a593Smuzhiyun #define ROM_LMP_8723cs_xx 0x8704 34*4882a593Smuzhiyun #define ROM_LMP_8723cs_cg 0x8705 35*4882a593Smuzhiyun #define ROM_LMP_8723cs_vf 0x8706 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Chip type */ 38*4882a593Smuzhiyun #define CHIP_8852BS 0 39*4882a593Smuzhiyun #define CHIP_8703AS 1 40*4882a593Smuzhiyun #define CHIP_8723CS_CG 3 41*4882a593Smuzhiyun #define CHIP_8723CS_VF 4 42*4882a593Smuzhiyun #define CHIP_8723CS_XX 5 43*4882a593Smuzhiyun #define CHIP_8703BS 7 44*4882a593Smuzhiyun #define CHIP_8725AS 0x05 45*4882a593Smuzhiyun #define CHIP_8852BPE_VR 0x06 46*4882a593Smuzhiyun #define CHIP_8852BPS 0x0A 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* software id */ 49*4882a593Smuzhiyun #define CHIP_UNKNOWN 0x00 50*4882a593Smuzhiyun #define CHIP_8761AT 0x1F 51*4882a593Smuzhiyun #define CHIP_8761ATF 0x2F 52*4882a593Smuzhiyun #define CHIP_8761BTC 0x3F 53*4882a593Smuzhiyun #define CHIP_8761BH4 0x4F 54*4882a593Smuzhiyun #define CHIP_8723BS 0x5F 55*4882a593Smuzhiyun #define CHIP_BEFORE 0x6F 56*4882a593Smuzhiyun #define CHIP_8822BS 0x70 57*4882a593Smuzhiyun #define CHIP_8723DS 0x71 58*4882a593Smuzhiyun #define CHIP_8821CS 0x72 59*4882a593Smuzhiyun #define CHIP_8822CS 0x73 60*4882a593Smuzhiyun #define CHIP_8761B 0x74 61*4882a593Smuzhiyun #define CHIP_8852AS 0x75 62*4882a593Smuzhiyun #define CHIP_8723FS 0x76 63*4882a593Smuzhiyun #define CHIP_8852CS 0x77 64*4882a593Smuzhiyun #define CHIP_8852BP 0x78 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define RTL_FW_MATCH_CHIP_TYPE (1 << 0) 67*4882a593Smuzhiyun #define RTL_FW_MATCH_HCI_VER (1 << 1) 68*4882a593Smuzhiyun #define RTL_FW_MATCH_HCI_REV (1 << 2) 69*4882a593Smuzhiyun struct patch_info { 70*4882a593Smuzhiyun uint32_t match_flags; 71*4882a593Smuzhiyun uint8_t chip_type; 72*4882a593Smuzhiyun uint16_t lmp_subver; 73*4882a593Smuzhiyun uint16_t proj_id; 74*4882a593Smuzhiyun uint8_t hci_ver; 75*4882a593Smuzhiyun uint16_t hci_rev; 76*4882a593Smuzhiyun char *patch_file; 77*4882a593Smuzhiyun char *config_file; 78*4882a593Smuzhiyun char *ic_name; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun struct patch_info *get_patch_entry(struct rtb_struct *btrtl); 82*4882a593Smuzhiyun uint8_t *rtb_read_config(const char *file, int *cfg_len, uint8_t chip_type); 83*4882a593Smuzhiyun uint8_t *rtb_read_firmware(struct rtb_struct *btrtl, int *fw_len); 84*4882a593Smuzhiyun uint8_t *rtb_get_final_patch(int fd, int proto, int *rlen); 85