1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2019 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef _PHL_TRX_MIT_H_ 16*4882a593Smuzhiyun #define _PHL_TRX_MIT_H_ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #if defined(CONFIG_PCI_HCI) && defined(PCIE_TRX_MIT_EN) 19*4882a593Smuzhiyun enum rtw_phl_status phl_pcie_trx_mit_start(struct phl_info_t *phl_info, 20*4882a593Smuzhiyun u8 dispr_idx); 21*4882a593Smuzhiyun enum rtw_phl_status phl_evt_pcie_trx_mit_hdlr(struct phl_info_t *phl_info, 22*4882a593Smuzhiyun u8 *mit_info); 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun void phl_pcie_trx_mit_watchdog(struct phl_info_t *phl_info); 26*4882a593Smuzhiyun #endif 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #endif /*_PHL_CMD_GENERAL_H_*/ 29