1 /******************************************************************************
2 *
3 * Copyright(c) 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _PHL_TRX_MIT_C_
16 #include "phl_headers.h"
17
18 #if defined(CONFIG_PCI_HCI) && defined(PCIE_TRX_MIT_EN)
phl_pcie_trx_mit_start(struct phl_info_t * phl_info,u8 dispr_idx)19 enum rtw_phl_status phl_pcie_trx_mit_start(struct phl_info_t *phl_info,
20 u8 dispr_idx)
21 {
22 struct rtw_pcie_trx_mit_info_t info = {0};
23
24 if (dispr_idx != HW_BAND_0)
25 return RTW_PHL_STATUS_SUCCESS;
26
27 PHL_INFO("%s :: pcie trx interrupt mitigation off\n", __func__);
28
29 if (RTW_HAL_STATUS_SUCCESS !=
30 rtw_hal_pcie_trx_mit(phl_info->hal, info.tx_timer, info.tx_counter,
31 info.rx_timer, info.rx_counter))
32 return RTW_PHL_STATUS_FAILURE;
33
34 return RTW_PHL_STATUS_SUCCESS;
35 }
36
37 enum rtw_phl_status
phl_evt_pcie_trx_mit_hdlr(struct phl_info_t * phl_info,u8 * mit_info)38 phl_evt_pcie_trx_mit_hdlr(struct phl_info_t *phl_info, u8 *mit_info)
39 {
40 struct rtw_pcie_trx_mit_info_t *info = (struct rtw_pcie_trx_mit_info_t *)mit_info;
41
42 PHL_INFO("%s :: tx_timer == %d us, tx_counter = %d, rx_timer == %d us, "
43 "rx_counter = %d, fixed_mitigation=%d\n",
44 __func__, info->tx_timer, info->tx_counter, info->rx_timer,
45 info->rx_counter, info->fixed_mitigation);
46
47 if (RTW_HAL_STATUS_SUCCESS !=
48 rtw_hal_pcie_trx_mit(phl_info->hal, info->tx_timer,
49 info->tx_counter, info->rx_timer,
50 info->rx_counter))
51 return RTW_PHL_STATUS_FAILURE;
52
53 phl_info->hci->fixed_mitigation = info->fixed_mitigation;
54
55 return RTW_PHL_STATUS_SUCCESS;
56 }
57
_phl_pcie_trx_mit_done(void * drv_priv,u8 * cmd,u32 cmd_len,enum rtw_phl_status status)58 static void _phl_pcie_trx_mit_done(void *drv_priv, u8 *cmd, u32 cmd_len, enum rtw_phl_status status)
59 {
60 if (cmd) {
61 _os_mem_free(drv_priv, cmd, cmd_len);
62 cmd = NULL;
63 }
64 }
65
66 static enum rtw_phl_status
phl_pcie_trx_mit(struct phl_info_t * phl_info,u32 tx_timer,u8 tx_counter,u32 rx_timer,u8 rx_counter)67 phl_pcie_trx_mit(struct phl_info_t *phl_info,
68 u32 tx_timer, u8 tx_counter, u32 rx_timer, u8 rx_counter)
69 {
70 #ifdef CONFIG_CMD_DISP
71 void *drv_priv = phl_to_drvpriv(phl_info);
72 struct rtw_pcie_trx_mit_info_t *info = NULL;
73
74 enum rtw_phl_status psts = RTW_PHL_STATUS_FAILURE;
75 u32 info_len = sizeof(struct rtw_pcie_trx_mit_info_t);
76
77 info = _os_mem_alloc(drv_priv, info_len);
78 if (info == NULL) {
79 PHL_ERR("%s: alloc mit_info failed!\n", __func__);
80 goto _exit;
81 }
82
83 info->tx_timer = tx_timer;
84 info->tx_counter = tx_counter;
85 info->rx_timer = rx_timer;
86 info->rx_counter = rx_counter;
87
88 psts = phl_cmd_enqueue(phl_info,
89 HW_BAND_0,
90 MSG_EVT_PCIE_TRX_MIT,
91 (u8 *)info,
92 info_len,
93 _phl_pcie_trx_mit_done,
94 PHL_CMD_NO_WAIT,
95 0);
96
97 if (is_cmd_failure(psts)) {
98 /* Send cmd success, but wait cmd fail*/
99 psts = RTW_PHL_STATUS_FAILURE;
100 } else if (psts != RTW_PHL_STATUS_SUCCESS) {
101 /* Send cmd fail */
102 psts = RTW_PHL_STATUS_FAILURE;
103 _os_mem_free(drv_priv, info, info_len);
104 }
105 _exit:
106 return psts;
107 #else
108 PHL_ERR("phl_fsm not support %s\n", __func__);
109 return RTW_PHL_STATUS_FAILURE;
110 #endif /*CONFIG_CMD_DISP*/
111 }
112
phl_pcie_trx_mit_watchdog(struct phl_info_t * phl_info)113 void phl_pcie_trx_mit_watchdog(struct phl_info_t *phl_info)
114 {
115 static enum rtw_tfc_lvl rx_traffic_lvl = RTW_TFC_IDLE;
116
117 struct rtw_stats *phl_stats = &phl_info->phl_com->phl_stats;
118
119 if (phl_info->hci->fixed_mitigation == 1)
120 return;
121
122 if (rx_traffic_lvl == phl_stats->rx_traffic.lvl)
123 return;
124
125 rx_traffic_lvl = phl_stats->rx_traffic.lvl;
126
127 if (rx_traffic_lvl == RTW_TFC_HIGH)
128 phl_pcie_trx_mit(phl_info, 0, 0, 100000, 200);
129 else
130 phl_pcie_trx_mit(phl_info, 0, 0, 0, 0);
131 }
132 #endif /*defined(CONFIG_PCI_HCI) && defined(PCIE_TRX_MIT_EN)*/
133
134