xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/phl_chnlplan.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2020 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 #ifndef _PHL_CHNLPLAN_H_
16 #define _PHL_CHNLPLAN_H_
17 
18 #define REGULATION_CHPLAN_VERSION 58
19 
20 enum REGULATION {
21     REGULATION_WW        =  0,
22     REGULATION_ETSI      =  1,
23     REGULATION_FCC       =  2,
24     REGULATION_MKK       =  3,
25     REGULATION_KCC       =  4,
26     REGULATION_NCC       =  5,
27     REGULATION_ACMA      =  6,
28     REGULATION_NA        =  7,
29     REGULATION_IC        =  8,
30     REGULATION_CHILE     =  9,
31     REGULATION_MEX       = 10,
32     REGULATION_MAX       = 11,
33 };
34 
35 struct chdef_2ghz {
36     /* ch_def index */
37     u8 idx;
38 
39     /* support channel list
40      * support_ch[0]: bit(0~7) stands for ch(1~8)
41      * support_ch[1]: bit(0~5) stands for ch (9~14)
42      */
43     u8 support_ch[2];
44 
45     /* passive ch list
46      * passive[0]: bit(0~7) stands for ch(1~8)
47      * passive[1]: bit(0~5) stands for ch (9~14)
48      */
49     u8 passive[2];
50 };
51 
52 struct chdef_5ghz {
53     /* ch_def index */
54     u8 idx;
55 
56     /*
57      * band1 support channel list, passive and dfs
58      * bit0 stands for ch36
59      * bit1 stands for ch40
60      * bit2 stands for ch44
61      * bit3 stands for ch48
62      */
63     u8 support_ch_b1;
64     u8 passive_b1;
65     u8 dfs_b1;
66 
67     /*
68      * band2 support channel list, passive and dfs
69      * bit0 stands for ch52
70      * bit1 stands for ch56
71      * bit2 stands for ch60
72      * bit3 stands for ch64
73      */
74     u8 support_ch_b2;
75     u8 passive_b2;
76     u8 dfs_b2;
77 
78     /*
79      * band3 support channel list, passive and dfs
80      * byte[0]:
81      *    bit0 stands for ch100
82      *     bit1 stands for ch104
83      *     bit2 stands for ch108
84      *     bit3 stands for ch112
85      *     bit4 stands for ch116
86      *     bit5 stands for ch120
87      *     bit6 stands for ch124
88      *     bit7 stands for ch128
89      * byte[1]:
90      *    bit0 stands for ch132
91      *     bit1 stands for ch136
92      *     bit2 stands for ch140
93      *     bit3 stands for ch144
94      */
95     u8 support_ch_b3[2];
96     u8 passive_b3[2];
97     u8 dfs_b3[2];
98 
99     /*
100      * band4 support channel list, passive and dfs
101      * bit0 stands for ch149
102      * bit1 stands for ch153
103      * bit2 stands for ch157
104      * bit3 stands for ch161
105      * bit4 stands for ch165
106      * bit5 stands for ch169
107      * bit6 stands for ch173
108      * bit7 stands for ch177
109      */
110     u8 support_ch_b4;
111     u8 passive_b4;
112     u8 dfs_b4;
113 };
114 
115 struct freq_plan {
116     u8 regulation;
117     u8 ch_idx;
118 };
119 
120 struct regulatory_domain_mapping {
121     u8 domain_code;
122     struct freq_plan freq_2g;
123     struct freq_plan freq_5g;
124 };
125 
126 #define MAX_CHDEF_2GHZ 7
127 #define MAX_CHDEF_5GHZ 54
128 #define MAX_RD_MAP_NUM 108
129 
130 
131 
132 #endif /* _PHL_CHNLPLAN_H_ */
133