1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2019 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTW_SEC_CAM_H__ 16*4882a593Smuzhiyun #define __RTW_SEC_CAM_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH BIT0 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun struct sec_cam_bmp { 21*4882a593Smuzhiyun u32 m0; 22*4882a593Smuzhiyun #if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) 23*4882a593Smuzhiyun u32 m1; 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun #if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) 26*4882a593Smuzhiyun u32 m2; 27*4882a593Smuzhiyun #endif 28*4882a593Smuzhiyun #if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) 29*4882a593Smuzhiyun u32 m3; 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct cam_ctl_t { 34*4882a593Smuzhiyun _lock lock; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun u8 sec_cap; 37*4882a593Smuzhiyun u32 flags; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun u8 num; 40*4882a593Smuzhiyun struct sec_cam_bmp used; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun _mutex sec_cam_access_mutex; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct sec_cam_ent { 46*4882a593Smuzhiyun u16 ctrl; 47*4882a593Smuzhiyun u8 mac[ETH_ALEN]; 48*4882a593Smuzhiyun u8 key[16]; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap); 52*4882a593Smuzhiyun void _rtw_camctl_set_flags(_adapter *adapter, u32 flags); 53*4882a593Smuzhiyun void rtw_camctl_set_flags(_adapter *adapter, u32 flags); 54*4882a593Smuzhiyun void _rtw_camctl_clr_flags(_adapter *adapter, u32 flags); 55*4882a593Smuzhiyun void rtw_camctl_clr_flags(_adapter *adapter, u32 flags); 56*4882a593Smuzhiyun bool _rtw_camctl_chk_flags(_adapter *adapter, u32 flags); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun void dump_sec_cam_map(void *sel, struct sec_cam_bmp *map, u8 max_num); 59*4882a593Smuzhiyun void rtw_sec_cam_map_set(struct sec_cam_bmp *map, u8 id); 60*4882a593Smuzhiyun void rtw_sec_cam_map_clr(struct sec_cam_bmp *map, u8 id); 61*4882a593Smuzhiyun void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun bool rtw_sec_camid_is_used(struct cam_ctl_t *cam_ctl, u8 id); 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id); 66*4882a593Smuzhiyun bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id); 67*4882a593Smuzhiyun s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk); 68*4882a593Smuzhiyun s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, u8 gk, bool ext_sec, bool *used); 69*4882a593Smuzhiyun void rtw_camid_free(_adapter *adapter, u8 cam_id); 70*4882a593Smuzhiyun u8 rtw_get_sec_camid(_adapter *adapter, u8 max_bk_key_num, u8 *sec_key_id); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun void _clear_cam_entry(_adapter *padapter, u8 entry); 73*4882a593Smuzhiyun void write_cam_from_cache(_adapter *adapter, u8 id); 74*4882a593Smuzhiyun void rtw_sec_cam_swap(_adapter *adapter, u8 cam_id_a, u8 cam_id_b); 75*4882a593Smuzhiyun void rtw_clean_dk_section(_adapter *adapter); 76*4882a593Smuzhiyun void rtw_clean_hw_dk_cam(_adapter *adapter); 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* modify both HW and cache */ 79*4882a593Smuzhiyun void write_cam(_adapter *padapter, u8 id, u16 ctrl, u8 *mac, u8 *key); 80*4882a593Smuzhiyun void clear_cam_entry(_adapter *padapter, u8 id); 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* modify cache only */ 83*4882a593Smuzhiyun void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key); 84*4882a593Smuzhiyun void clear_cam_cache(_adapter *adapter, u8 id); 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun void invalidate_cam_all(_adapter *padapter); 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun void flush_all_cam_entry(_adapter *padapter, enum phl_cmd_type cmd_type, u32 cmd_timeout); 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE) 91*4882a593Smuzhiyun void rtw_iface_bcmc_sec_cam_map_restore(_adapter *adapter); 92*4882a593Smuzhiyun #endif 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #ifdef CONFIG_DBG_AX_CAM 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define INDIRECT_ACCESS_ADDR 0xC04 97*4882a593Smuzhiyun #define INDIRECT_ACCESS_VALUE 0x40000 98*4882a593Smuzhiyun #define SEC_CAM_BASE_ADDR 0x18814000 99*4882a593Smuzhiyun #define BSSID_CAM_BASE_ADDR 0x18853000 100*4882a593Smuzhiyun #define ADDR_CAM_BASE_ADDR 0x18850000 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun enum CAM_KEY_TYPE { 103*4882a593Smuzhiyun KEY_TYPE_UNI = 0, 104*4882a593Smuzhiyun KEY_TYPE_GROUP = 1, 105*4882a593Smuzhiyun KEY_TYPE_BIP = 2, 106*4882a593Smuzhiyun KEY_TYPE_NONE = 3 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /*Address cam field info DW0 - DW9*/ 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* DWORD 0 ; Offset 00h */ 112*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_VALID(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 0, 1) 113*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_NET_TYPE(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 1, 2) 114*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_BCN_HD_COND(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 3, 2) 115*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_HIT_RULE(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 5, 2) 116*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_BB_SEL(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 7, 1) 117*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_ADDR_MASK(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 8, 6) 118*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_MASK_SEL(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 14, 2) 119*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_HASH(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 16, 8) 120*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_HASH(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 24, 8) 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* DWORD 1 ; Offset 04h */ 123*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_BSSID_CAM_IDX(__pCAM) LE_BITS_TO_4BYTE(__pCAM+4, 0, 6) 124*4882a593Smuzhiyun /* DWORD 2 ; Offset 08h */ 125*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_0(__pCAM) LE_BITS_TO_4BYTE(__pCAM+8, 0, 8) 126*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_1(__pCAM) LE_BITS_TO_4BYTE(__pCAM+8, 8, 8) 127*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_2(__pCAM) LE_BITS_TO_4BYTE(__pCAM+8, 16, 8) 128*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_3(__pCAM) LE_BITS_TO_4BYTE(__pCAM+8, 24, 8) 129*4882a593Smuzhiyun /* DWORD 3 ; Offset 0Ch */ 130*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_4(__pCAM) LE_BITS_TO_4BYTE(__pCAM+12, 8, 6) 131*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SMA_5(__pCAM) LE_BITS_TO_4BYTE(__pCAM+12, 14, 2) 132*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_0(__pCAM) LE_BITS_TO_4BYTE(__pCAM+12, 16, 8) 133*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_1(__pCAM) LE_BITS_TO_4BYTE(__pCAM+12, 24, 8) 134*4882a593Smuzhiyun /* DWORD 4 ; Offset 10h */ 135*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_2(__pCAM) LE_BITS_TO_4BYTE(__pCAM+16, 0, 8) 136*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_3(__pCAM) LE_BITS_TO_4BYTE(__pCAM+16, 8, 8) 137*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_4(__pCAM) LE_BITS_TO_4BYTE(__pCAM+16, 16, 8) 138*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TMA_5(__pCAM) LE_BITS_TO_4BYTE(__pCAM+16, 24, 8) 139*4882a593Smuzhiyun /* DWORD 5 ; Offset 14h : RSVD ALL*/ 140*4882a593Smuzhiyun /* DWORD 6 ; Offset 18h */ 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_MACID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 0, 8) 143*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_PORT_INT(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 8, 3) 144*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TSF_SYNC(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 11, 3) 145*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TF(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 14, 2) 146*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_LSIG_TXOP(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 16, 2) 147*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_CTRLCNT_IDX(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 18, 4) 148*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_CTRLCNT_VALID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 20, 1) 149*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_TARGET_IND(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 24, 3) 150*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_FRM_TARGET_IND(__pCAM) LE_BITS_TO_4BYTE(__pCAM+24, 27, 3) 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun /* DWORD 7 ; Offset 1Ch */ 153*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_AID12_0(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 0, 8) 154*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_AID12_1(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 8, 4) 155*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_WOL_PATTERN(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 12, 1) 156*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_WOL_UC(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 13, 1) 157*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_WOL_MAGIC(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 14, 1) 158*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_WAPI(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 15, 1) 159*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT_MODE(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 16, 2) 160*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT0_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 18, 2) 161*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT1_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 20, 2) 162*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT2_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 22, 2) 163*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT3_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 24, 2) 164*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT4_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 26, 2) 165*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT5_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 28, 2) 166*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT6_KEYID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+28, 30, 2) 167*4882a593Smuzhiyun /* DWORD 8 ; Offset 20h */ 168*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT_VALID(__pCAM) LE_BITS_TO_4BYTE(__pCAM+32, 0, 8) 169*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT0(__pCAM) LE_BITS_TO_4BYTE(__pCAM+32, 8, 8) 170*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT1(__pCAM) LE_BITS_TO_4BYTE(__pCAM+32, 16, 8) 171*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT2(__pCAM) LE_BITS_TO_4BYTE(__pCAM+32, 24, 8) 172*4882a593Smuzhiyun /* DWORD 9 ; Offset 24h */ 173*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT3(__pCAM) LE_BITS_TO_4BYTE(__pCAM+36, 0, 8) 174*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT4(__pCAM) LE_BITS_TO_4BYTE(__pCAM+36, 8, 8) 175*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT5(__pCAM) LE_BITS_TO_4BYTE(__pCAM+36, 16, 8) 176*4882a593Smuzhiyun #define GET_AX_ADDR_CAM_SEC_ENT6(__pCAM) LE_BITS_TO_4BYTE(__pCAM+36, 24, 8) 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun /* Security cam */ 179*4882a593Smuzhiyun /*DWORD 0 ; offset 00h*/ 180*4882a593Smuzhiyun #define GET_AX_SEC_CAM_TYPE(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 0, 4) 181*4882a593Smuzhiyun #define GET_AX_SEC_CAM_EXT_KEY(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 4, 1) 182*4882a593Smuzhiyun #define GET_AX_SEC_SPP_MODE_(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 5, 1) 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun /*BSSID cam*/ 185*4882a593Smuzhiyun /*DWORD 0 ; offset 00h*/ 186*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_VALID(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 0, 1) 187*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BB_SEL(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 1, 1) 188*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_COLOR_(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 8, 6) 189*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_0(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 16, 8) 190*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_1(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 24, 8) 191*4882a593Smuzhiyun /*DWORD 1 ; offset 04h*/ 192*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_2(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 0, 8) 193*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_3(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 8, 8) 194*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_4(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 16, 8) 195*4882a593Smuzhiyun #define GET_AX_BSSID_CAM_BSSID_5(__pCAM) LE_BITS_TO_4BYTE(__pCAM, 24, 8) 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun int get_ax_sec_cam(void* sel, struct _ADAPTER *a); 198*4882a593Smuzhiyun int get_ax_address_cam(void* sel, struct _ADAPTER *a); 199*4882a593Smuzhiyun int get_ax_valid_key(void* sel, struct _ADAPTER *a); 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun #endif /* CONFIG_DBG_AX_CAM */ 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun #endif /* __RTW_SEC_CAM_H__ */ 204