1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2007 - 2019 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #ifndef _RTW_RECV_H_
16*4882a593Smuzhiyun #define _RTW_RECV_H_
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_NONE 0
19*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_INDICATE BIT0
20*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_FORWARD BIT1
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #ifdef CONFIG_RTW_NAPI
23*4882a593Smuzhiyun #define RTL_NAPI_WEIGHT (32)
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define NR_RECVFRAME 256
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define RXFRAME_ALIGN 8
30*4882a593Smuzhiyun #define RXFRAME_ALIGN_SZ (1<<RXFRAME_ALIGN)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define DRVINFO_SZ 4 /* unit is 8bytes */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define MAX_RXFRAME_CNT 512
35*4882a593Smuzhiyun #define MAX_RX_NUMBLKS (32)
36*4882a593Smuzhiyun #define RECVFRAME_HDR_ALIGN 128
37*4882a593Smuzhiyun #define MAX_CONTINUAL_NORXPACKET_COUNT 4 /* In MAX_CONTINUAL_NORXPACKET_COUNT*2 sec , no rx traffict would issue DELBA*/
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define PHY_RSSI_SLID_WIN_MAX 100
40*4882a593Smuzhiyun #define PHY_LINKQUALITY_SLID_WIN_MAX 20
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define MAX_SUBFRAME_COUNT 64
46*4882a593Smuzhiyun /* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
47*4882a593Smuzhiyun extern u8 rtw_bridge_tunnel_header[];
48*4882a593Smuzhiyun extern u8 rtw_rfc1042_header[];
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun enum addba_rsp_ack_state {
51*4882a593Smuzhiyun RTW_RECV_ACK_OR_TIMEOUT,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #ifdef RTW_PHL_RX
55*4882a593Smuzhiyun enum rtw_core_rx_state {
56*4882a593Smuzhiyun CORE_RX_CONTINUE = _SUCCESS,
57*4882a593Smuzhiyun CORE_RX_DONE,
58*4882a593Smuzhiyun CORE_RX_DROP,
59*4882a593Smuzhiyun CORE_RX_FAIL,
60*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
61*4882a593Smuzhiyun CORE_RX_GO_SHORTCUT,
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun CORE_RX_DEFRAG,
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun #endif
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* for Rx reordering buffer control */
68*4882a593Smuzhiyun struct recv_reorder_ctrl {
69*4882a593Smuzhiyun _adapter *padapter;
70*4882a593Smuzhiyun u8 tid;
71*4882a593Smuzhiyun u8 enable;
72*4882a593Smuzhiyun u16 indicate_seq;/* =wstart_b, init_value=0xffff */
73*4882a593Smuzhiyun u8 ampdu_size;
74*4882a593Smuzhiyun unsigned long rec_abba_rsp_ack;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #ifdef CONFIG_RECV_REORDERING_CTRL
77*4882a593Smuzhiyun _queue pending_recvframe_queue;
78*4882a593Smuzhiyun u8 wsize_b;
79*4882a593Smuzhiyun _timer reordering_ctrl_timer;
80*4882a593Smuzhiyun u8 bReorderWaiting;
81*4882a593Smuzhiyun #endif
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun struct stainfo_rxcache {
85*4882a593Smuzhiyun u16 tid_rxseq[16];
86*4882a593Smuzhiyun u8 iv[16][8];
87*4882a593Smuzhiyun u8 last_tid;
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct smooth_rssi_data {
92*4882a593Smuzhiyun u32 elements[100]; /* array to store values */
93*4882a593Smuzhiyun u32 index; /* index to current array to store */
94*4882a593Smuzhiyun u32 total_num; /* num of valid elements */
95*4882a593Smuzhiyun u32 total_val; /* sum of valid elements */
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun struct signal_stat {
99*4882a593Smuzhiyun u8 update_req; /* used to indicate */
100*4882a593Smuzhiyun u8 avg_val; /* avg of valid elements */
101*4882a593Smuzhiyun u32 total_num; /* num of valid elements */
102*4882a593Smuzhiyun u32 total_val; /* sum of valid elements */
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /*TODO get phyinfo from PHL PPDU status - RTW_WKARD_CORE_RSSI_V1*/
106*4882a593Smuzhiyun struct phydm_phyinfo_struct {
107*4882a593Smuzhiyun bool is_valid;
108*4882a593Smuzhiyun u8 rx_pwdb_all;
109*4882a593Smuzhiyun u8 signal_quality; /* OFDM: signal_quality=rx_mimo_signal_quality[0], CCK: signal qualityin 0-100 index. */
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun s8 rx_power; /* in dBm Translate from PWdB */
112*4882a593Smuzhiyun s8 recv_signal_power; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */
113*4882a593Smuzhiyun u8 signal_strength; /* in 0-100 index. */
114*4882a593Smuzhiyun s8 rx_pwr[4]; /* per-path's pwdb */
115*4882a593Smuzhiyun s8 rx_snr[4]; /* per-path's SNR */
116*4882a593Smuzhiyun u8 rx_count:2; /* RX path counter---*/
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun struct rx_pkt_attrib {
121*4882a593Smuzhiyun u16 pkt_len;
122*4882a593Smuzhiyun u8 physt;
123*4882a593Smuzhiyun u8 drvinfo_sz;
124*4882a593Smuzhiyun u8 shift_sz;
125*4882a593Smuzhiyun u8 hdrlen; /* the WLAN Header Len */
126*4882a593Smuzhiyun u8 to_fr_ds;
127*4882a593Smuzhiyun u8 amsdu;
128*4882a593Smuzhiyun u8 qos;
129*4882a593Smuzhiyun u8 priority;
130*4882a593Smuzhiyun u8 pw_save;
131*4882a593Smuzhiyun u8 mdata;
132*4882a593Smuzhiyun u16 seq_num;
133*4882a593Smuzhiyun u8 frag_num;
134*4882a593Smuzhiyun u8 mfrag;
135*4882a593Smuzhiyun u8 order;
136*4882a593Smuzhiyun u8 privacy; /* in frame_ctrl field */
137*4882a593Smuzhiyun u8 bdecrypted;
138*4882a593Smuzhiyun u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
139*4882a593Smuzhiyun u8 iv_len;
140*4882a593Smuzhiyun u8 icv_len;
141*4882a593Smuzhiyun u8 crc_err;
142*4882a593Smuzhiyun u8 icv_err;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
145*4882a593Smuzhiyun u16 eth_type;
146*4882a593Smuzhiyun #endif
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun u8 dst[ETH_ALEN];
149*4882a593Smuzhiyun u8 src[ETH_ALEN];
150*4882a593Smuzhiyun u8 ta[ETH_ALEN];
151*4882a593Smuzhiyun u8 ra[ETH_ALEN];
152*4882a593Smuzhiyun u8 bssid[ETH_ALEN];
153*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
154*4882a593Smuzhiyun u8 msa[ETH_ALEN]; /* mesh sa */
155*4882a593Smuzhiyun u8 mda[ETH_ALEN]; /* mesh da */
156*4882a593Smuzhiyun u8 mesh_ctrl_present;
157*4882a593Smuzhiyun u8 mesh_ctrl_len; /* length of mesh control field */
158*4882a593Smuzhiyun #endif
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun u8 ack_policy;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun u8 key_index;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun u8 data_rate;
165*4882a593Smuzhiyun u8 ch; /* RX channel */
166*4882a593Smuzhiyun u8 bw;
167*4882a593Smuzhiyun u8 stbc;
168*4882a593Smuzhiyun u8 ldpc;
169*4882a593Smuzhiyun u8 sgi;
170*4882a593Smuzhiyun u8 pkt_rpt_type;
171*4882a593Smuzhiyun u8 ampdu;
172*4882a593Smuzhiyun u8 ppdu_cnt;
173*4882a593Smuzhiyun u8 ampdu_eof;
174*4882a593Smuzhiyun u32 free_cnt; /* free run counter */
175*4882a593Smuzhiyun struct phydm_phyinfo_struct phy_info;
176*4882a593Smuzhiyun #ifdef CONFIG_WIFI_MONITOR
177*4882a593Smuzhiyun u8 moif[16];
178*4882a593Smuzhiyun #endif
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
181*4882a593Smuzhiyun /* checksum offload realted varaiables */
182*4882a593Smuzhiyun u8 csum_valid; /* Checksum valid, 0: not check, 1: checked */
183*4882a593Smuzhiyun u8 csum_err; /* Checksum Error occurs */
184*4882a593Smuzhiyun #endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun #ifdef RTW_PHL_DBG_CMD
187*4882a593Smuzhiyun u8 wl_type;
188*4882a593Smuzhiyun u8 wl_subtype;
189*4882a593Smuzhiyun #endif
190*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
191*4882a593Smuzhiyun u8 bsnaphdr;
192*4882a593Smuzhiyun #endif
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
197*4882a593Smuzhiyun #define RATTRIB_GET_MCTRL_LEN(rattrib) ((rattrib)->mesh_ctrl_len)
198*4882a593Smuzhiyun #else
199*4882a593Smuzhiyun #define RATTRIB_GET_MCTRL_LEN(rattrib) 0
200*4882a593Smuzhiyun #endif
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* These definition is used for Rx packet reordering. */
203*4882a593Smuzhiyun #define SN_LESS(a, b) (((a-b) & 0x800) != 0)
204*4882a593Smuzhiyun #define SN_EQUAL(a, b) (a == b)
205*4882a593Smuzhiyun /* #define REORDER_WIN_SIZE 128 */
206*4882a593Smuzhiyun /* #define REORDER_ENTRY_NUM 128 */
207*4882a593Smuzhiyun #define REORDER_WAIT_TIME (50) /* (ms) */
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun #if defined(CONFIG_PLATFORM_RTK390X) && defined(CONFIG_USB_HCI)
210*4882a593Smuzhiyun #define RECVBUFF_ALIGN_SZ 32
211*4882a593Smuzhiyun #else
212*4882a593Smuzhiyun #define RECVBUFF_ALIGN_SZ 8
213*4882a593Smuzhiyun #endif
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /*GEORGIA_TODO_FIXIT_IC_DEPENDENCE*/
216*4882a593Smuzhiyun #define RXDESC_SIZE 24
217*4882a593Smuzhiyun #define RXDESC_OFFSET RXDESC_SIZE
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun #ifdef CONFIG_TRX_BD_ARCH
220*4882a593Smuzhiyun struct rx_buf_desc {
221*4882a593Smuzhiyun /* RX has exactly one segment */
222*4882a593Smuzhiyun #ifdef CONFIG_64BIT_DMA
223*4882a593Smuzhiyun unsigned int dword[4];
224*4882a593Smuzhiyun #else
225*4882a593Smuzhiyun unsigned int dword[2];
226*4882a593Smuzhiyun #endif
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun struct recv_stat {
230*4882a593Smuzhiyun unsigned int rxdw[8];
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun #else
233*4882a593Smuzhiyun struct recv_stat {
234*4882a593Smuzhiyun unsigned int rxdw0;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun unsigned int rxdw1;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun #if !(defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* exclude 8822be, 8821ce ,8822ce*/
239*4882a593Smuzhiyun unsigned int rxdw2;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun unsigned int rxdw3;
242*4882a593Smuzhiyun #endif
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #ifndef BUF_DESC_ARCH
245*4882a593Smuzhiyun unsigned int rxdw4;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun unsigned int rxdw5;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI
250*4882a593Smuzhiyun unsigned int rxdw6;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun unsigned int rxdw7;
253*4882a593Smuzhiyun #endif
254*4882a593Smuzhiyun #endif /* if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words */
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun #endif
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun #define EOR BIT(30)
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
263*4882a593Smuzhiyun ; halt(passive) ;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun using enter_critical section to protect
266*4882a593Smuzhiyun */
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun struct recv_info {
269*4882a593Smuzhiyun u64 rx_bytes;
270*4882a593Smuzhiyun u64 rx_pkts;
271*4882a593Smuzhiyun u64 rx_drop;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun u64 dbg_rx_drop_count;
274*4882a593Smuzhiyun u64 dbg_rx_ampdu_drop_count;
275*4882a593Smuzhiyun u64 dbg_rx_ampdu_forced_indicate_count;
276*4882a593Smuzhiyun u64 dbg_rx_ampdu_loss_count;
277*4882a593Smuzhiyun u64 dbg_rx_dup_mgt_frame_drop_count;
278*4882a593Smuzhiyun u64 dbg_rx_ampdu_window_shift_cnt;
279*4882a593Smuzhiyun u64 dbg_rx_conflic_mac_addr_cnt;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* For display the phy informatiom */
282*4882a593Smuzhiyun u8 is_signal_dbg; /* for debug */
283*4882a593Smuzhiyun u8 signal_strength_dbg; /* for debug */
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /*RTW_WKARD_CORE_RSSI_V1 - GEORGIA MUST REFINE*/
286*4882a593Smuzhiyun u8 signal_strength;
287*4882a593Smuzhiyun u8 signal_qual;
288*4882a593Smuzhiyun s8 rssi; /* rtw_phl_rssi_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); */
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun #ifdef CONFIG_SIGNAL_STAT_PROCESS
292*4882a593Smuzhiyun _timer signal_stat_timer;
293*4882a593Smuzhiyun u32 signal_stat_sampling_interval;
294*4882a593Smuzhiyun #endif
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /* u32 signal_stat_converging_constant; */
297*4882a593Smuzhiyun struct signal_stat signal_qual_data;
298*4882a593Smuzhiyun struct signal_stat signal_strength_data;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun u16 sink_udpport, pre_rtp_rxseq, cur_rtp_rxseq;
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun #ifdef CONFIG_SIGNAL_STAT_PROCESS
304*4882a593Smuzhiyun #define rtw_set_signal_stat_timer(recvinfo) _set_timer(&(recvinfo)->signal_stat_timer, (recvinfo)->signal_stat_sampling_interval)
305*4882a593Smuzhiyun #endif
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun struct sta_recv_priv {
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun _lock lock;
310*4882a593Smuzhiyun sint option;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /* _queue blk_strms[MAX_RX_NUMBLKS]; */
313*4882a593Smuzhiyun _queue defrag_q; /* keeping the fragment frame until defrag */
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun struct stainfo_rxcache rxcache;
316*4882a593Smuzhiyun u16 bmc_tid_rxseq[16];
317*4882a593Smuzhiyun u16 nonqos_rxseq;
318*4882a593Smuzhiyun u16 nonqos_bmc_rxseq;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /* uint sta_rx_bytes; */
321*4882a593Smuzhiyun /* uint sta_rx_pkts; */
322*4882a593Smuzhiyun /* uint sta_rx_fail; */
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #if 0
327*4882a593Smuzhiyun struct recv_buf {
328*4882a593Smuzhiyun _list list;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun _lock recvbuf_lock;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun u32 ref_cnt;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun _adapter *adapter;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun u8 *pbuf;
337*4882a593Smuzhiyun u8 *pallocated_buf;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun u32 len;
340*4882a593Smuzhiyun u8 *phead;
341*4882a593Smuzhiyun u8 *pdata;
342*4882a593Smuzhiyun u8 *ptail;
343*4882a593Smuzhiyun u8 *pend;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
346*4882a593Smuzhiyun PURB purb;
347*4882a593Smuzhiyun dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
348*4882a593Smuzhiyun u32 alloc_sz;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun u8 irp_pending;
351*4882a593Smuzhiyun int transfer_len;
352*4882a593Smuzhiyun #endif
353*4882a593Smuzhiyun struct sk_buff *pskb;
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun #endif
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun struct recv_frame_hdr {
358*4882a593Smuzhiyun _list list;
359*4882a593Smuzhiyun struct sk_buff *pkt;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun _adapter *adapter;
362*4882a593Smuzhiyun struct dvobj_priv *dvobj;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun u8 fragcnt;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun int frame_tag;
367*4882a593Smuzhiyun int keytrack;
368*4882a593Smuzhiyun struct rx_pkt_attrib attrib;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun uint len;
371*4882a593Smuzhiyun u8 *rx_head;
372*4882a593Smuzhiyun u8 *rx_data;
373*4882a593Smuzhiyun u8 *rx_tail;
374*4882a593Smuzhiyun u8 *rx_end;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun void *precvbuf;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun /* */
380*4882a593Smuzhiyun struct sta_info *psta;
381*4882a593Smuzhiyun #ifdef CONFIG_RECV_REORDERING_CTRL
382*4882a593Smuzhiyun /* for A-MPDU Rx reordering buffer control */
383*4882a593Smuzhiyun struct recv_reorder_ctrl *preorder_ctrl;
384*4882a593Smuzhiyun #endif
385*4882a593Smuzhiyun #ifdef RTW_PHL_RX
386*4882a593Smuzhiyun void *rx_req;
387*4882a593Smuzhiyun #endif
388*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
389*4882a593Smuzhiyun struct core_rxsc_entry *rxsc_entry;
390*4882a593Smuzhiyun #endif
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun #ifdef CONFIG_WAPI_SUPPORT
393*4882a593Smuzhiyun u8 UserPriority;
394*4882a593Smuzhiyun u8 WapiTempPN[16];
395*4882a593Smuzhiyun u8 WapiSrcAddr[6];
396*4882a593Smuzhiyun u8 bWapiCheckPNInDecrypt;
397*4882a593Smuzhiyun u8 bIsWaiPacket;
398*4882a593Smuzhiyun #endif
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun union recv_frame {
404*4882a593Smuzhiyun union {
405*4882a593Smuzhiyun _list list;
406*4882a593Smuzhiyun struct recv_frame_hdr hdr;
407*4882a593Smuzhiyun uint mem[RECVFRAME_HDR_ALIGN >> 2];
408*4882a593Smuzhiyun } u;
409*4882a593Smuzhiyun /* uint mem[MAX_RXSZ>>2]; */
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun enum rtw_rx_llc_hdl {
413*4882a593Smuzhiyun RTW_RX_LLC_KEEP = 0,
414*4882a593Smuzhiyun RTW_RX_LLC_REMOVE = 1,
415*4882a593Smuzhiyun RTW_RX_LLC_VLAN = 2,
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun struct recv_priv {
419*4882a593Smuzhiyun struct dvobj_priv *dvobj;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun #ifdef CONFIG_RECV_THREAD_MODE
422*4882a593Smuzhiyun _sema recv_sema;
423*4882a593Smuzhiyun #endif
424*4882a593Smuzhiyun _queue free_recv_queue; /*recv_frame*/
425*4882a593Smuzhiyun #if 0
426*4882a593Smuzhiyun _queue uc_swdec_pending_queue;
427*4882a593Smuzhiyun #endif
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun u8 *pallocated_frame_buf;
430*4882a593Smuzhiyun u8 *precv_frame_buf;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun uint free_recvframe_cnt;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun #if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
435*4882a593Smuzhiyun #ifdef CONFIG_RTW_NAPI
436*4882a593Smuzhiyun struct sk_buff_head rx_napi_skb_queue;
437*4882a593Smuzhiyun #endif
438*4882a593Smuzhiyun #endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset);
443*4882a593Smuzhiyun #ifdef RTW_PHL_RX
444*4882a593Smuzhiyun extern void dump_recv_frame(_adapter *adapter, union recv_frame *prframe);
445*4882a593Smuzhiyun extern sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame);
446*4882a593Smuzhiyun extern s32 rtw_core_rx_data_pre_process(_adapter *adapter, union recv_frame **prframe);
447*4882a593Smuzhiyun extern s32 rtw_core_rx_data_post_process(_adapter *adapter, union recv_frame *prframe);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun enum rtw_phl_status rtw_core_rx_process(void *drv_priv);
450*4882a593Smuzhiyun void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
451*4882a593Smuzhiyun void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
452*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
453*4882a593Smuzhiyun sint recv_ucast_pn_decache(union recv_frame *precv_frame);
454*4882a593Smuzhiyun sint recv_bcast_pn_decache(union recv_frame *precv_frame);
455*4882a593Smuzhiyun #endif /* CONFIG_RTW_CORE_RXSC */
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun extern void rtw_init_recvframe(union recv_frame *precvframe);
459*4882a593Smuzhiyun extern int rtw_free_recvframe(union recv_frame *precvframe);
460*4882a593Smuzhiyun union recv_frame *rtw_alloc_recvframe(_queue *pfree_recv_queue);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun #if 0
463*4882a593Smuzhiyun u32 rtw_free_uc_swdec_pending_queue(struct dvobj_priv *dvobj);
464*4882a593Smuzhiyun #endif
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun #if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL)
467*4882a593Smuzhiyun void rtw_reordering_ctrl_timeout_handler(void *pcontext);
468*4882a593Smuzhiyun #endif
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun #if 0
471*4882a593Smuzhiyun void rx_query_phy_status(union recv_frame *rframe, u8 *phy_stat);
472*4882a593Smuzhiyun #endif
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index);
475*4882a593Smuzhiyun void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun #ifdef CONFIG_RECV_THREAD_MODE
478*4882a593Smuzhiyun thread_return rtw_recv_thread(thread_context context);
479*4882a593Smuzhiyun #endif
480*4882a593Smuzhiyun #ifdef RTW_WKARD_CORE_RSSI_V1
481*4882a593Smuzhiyun void rx_process_phy_info(union recv_frame *precvframe);
482*4882a593Smuzhiyun #endif
get_rxmem(union recv_frame * precvframe)483*4882a593Smuzhiyun __inline static u8 *get_rxmem(union recv_frame *precvframe)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun /* always return rx_head... */
486*4882a593Smuzhiyun if (precvframe == NULL)
487*4882a593Smuzhiyun return NULL;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun return precvframe->u.hdr.rx_head;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
get_rx_status(union recv_frame * precvframe)492*4882a593Smuzhiyun __inline static u8 *get_rx_status(union recv_frame *precvframe)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun return get_rxmem(precvframe);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
get_recvframe_data(union recv_frame * precvframe)499*4882a593Smuzhiyun __inline static u8 *get_recvframe_data(union recv_frame *precvframe)
500*4882a593Smuzhiyun {
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun /* alwasy return rx_data */
503*4882a593Smuzhiyun if (precvframe == NULL)
504*4882a593Smuzhiyun return NULL;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun return precvframe->u.hdr.rx_data;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
recvframe_push(union recv_frame * precvframe,sint sz)510*4882a593Smuzhiyun __inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun /* append data before rx_data */
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* add data to the start of recv_frame
515*4882a593Smuzhiyun *
516*4882a593Smuzhiyun * This function extends the used data area of the recv_frame at the buffer
517*4882a593Smuzhiyun * start. rx_data must be still larger than rx_head, after pushing.
518*4882a593Smuzhiyun */
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (precvframe == NULL)
521*4882a593Smuzhiyun return NULL;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun precvframe->u.hdr.rx_data -= sz ;
525*4882a593Smuzhiyun if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) {
526*4882a593Smuzhiyun precvframe->u.hdr.rx_data += sz ;
527*4882a593Smuzhiyun return NULL;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun precvframe->u.hdr.len += sz;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun return precvframe->u.hdr.rx_data;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun
recvframe_pull(union recv_frame * precvframe,sint sz)537*4882a593Smuzhiyun __inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun /* rx_data += sz; move rx_data sz bytes hereafter */
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun /* used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller */
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun if (precvframe == NULL)
545*4882a593Smuzhiyun return NULL;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun precvframe->u.hdr.rx_data += sz;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) {
551*4882a593Smuzhiyun precvframe->u.hdr.rx_data -= sz;
552*4882a593Smuzhiyun return NULL;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun precvframe->u.hdr.len -= sz;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun return precvframe->u.hdr.rx_data;
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
recvframe_put(union recv_frame * precvframe,sint sz)561*4882a593Smuzhiyun __inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun /* rx_tai += sz; move rx_tail sz bytes hereafter */
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller */
566*4882a593Smuzhiyun /* after putting, rx_tail must be still larger than rx_end. */
567*4882a593Smuzhiyun unsigned char *prev_rx_tail;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun /* RTW_INFO("recvframe_put: len=%d\n", sz); */
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun if (precvframe == NULL)
572*4882a593Smuzhiyun return NULL;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun prev_rx_tail = precvframe->u.hdr.rx_tail;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun precvframe->u.hdr.rx_tail += sz;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) {
579*4882a593Smuzhiyun precvframe->u.hdr.rx_tail -= sz;
580*4882a593Smuzhiyun return NULL;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun precvframe->u.hdr.len += sz;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun return precvframe->u.hdr.rx_tail;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun
recvframe_pull_tail(union recv_frame * precvframe,sint sz)591*4882a593Smuzhiyun __inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz)
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun /* rmv data from rx_tail (by yitsen) */
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun /* used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller */
596*4882a593Smuzhiyun /* after pulling, rx_end must be still larger than rx_data. */
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun if (precvframe == NULL)
599*4882a593Smuzhiyun return NULL;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun precvframe->u.hdr.rx_tail -= sz;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) {
604*4882a593Smuzhiyun precvframe->u.hdr.rx_tail += sz;
605*4882a593Smuzhiyun return NULL;
606*4882a593Smuzhiyun }
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun precvframe->u.hdr.len -= sz;
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun return precvframe->u.hdr.rx_tail;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
get_recvframe_len(union recv_frame * precvframe)614*4882a593Smuzhiyun __inline static sint get_recvframe_len(union recv_frame *precvframe)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun return precvframe->u.hdr.len;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun struct sta_info;
621*4882a593Smuzhiyun extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun u8 adapter_allow_bmc_data_rx(_adapter *adapter);
626*4882a593Smuzhiyun #if 0
627*4882a593Smuzhiyun s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status);
628*4882a593Smuzhiyun #endif
629*4882a593Smuzhiyun void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta);
630*4882a593Smuzhiyun u8 rtw_init_lite_recv_resource(struct dvobj_priv *dvobj);
631*4882a593Smuzhiyun void rtw_free_lite_recv_resource(struct dvobj_priv *dvobj);
632*4882a593Smuzhiyun #endif
633