1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2020 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #define _PHL_THERMAL_C_
16*4882a593Smuzhiyun #include "phl_headers.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #ifdef CONFIG_PHL_THERMAL_PROTECT
19*4882a593Smuzhiyun
_phl_thermal_protect_disable_all_txop(struct phl_info_t * phl_info,bool disable)20*4882a593Smuzhiyun static void _phl_thermal_protect_disable_all_txop(
21*4882a593Smuzhiyun struct phl_info_t *phl_info,
22*4882a593Smuzhiyun bool disable)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun struct rtw_phl_com_t *phl_com = phl_info->phl_com;
25*4882a593Smuzhiyun struct mr_ctl_t *mr_ctl = phlcom_to_mr_ctrl(phl_com);
26*4882a593Smuzhiyun struct rtw_wifi_role_t *wrole = NULL;
27*4882a593Smuzhiyun struct rtw_phl_stainfo_t *sta = NULL;
28*4882a593Smuzhiyun struct rtw_edca_param edca = {0};
29*4882a593Smuzhiyun u8 i = 0;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun for (i = 0; i < MAX_WIFI_ROLE_NUMBER; i++) {
32*4882a593Smuzhiyun if (mr_ctl->role_map & BIT(i)) {
33*4882a593Smuzhiyun wrole = rtw_phl_get_wrole_by_ridx(phl_info->phl_com, i);
34*4882a593Smuzhiyun if(wrole){
35*4882a593Smuzhiyun if(wrole->mstate == MLME_LINKED)
36*4882a593Smuzhiyun break;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun wrole = NULL;
39*4882a593Smuzhiyun continue;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if(wrole == NULL)
44*4882a593Smuzhiyun return;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun sta = rtw_phl_get_stainfo_self(phl_info, wrole);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if(sta == NULL)
49*4882a593Smuzhiyun return;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun for(i = 0; i < 4;i++){
52*4882a593Smuzhiyun edca.ac = i;
53*4882a593Smuzhiyun edca.param = sta->asoc_cap.edca[edca.ac].param;
54*4882a593Smuzhiyun if(disable)
55*4882a593Smuzhiyun edca.param &= 0x0000FFFF;
56*4882a593Smuzhiyun if(rtw_hal_set_edca(phl_info->hal, wrole, edca.ac, edca.param)
57*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS)
58*4882a593Smuzhiyun PHL_ERR("%s Config edca fail\n", __FUNCTION__);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
_phl_thermal_protect_reduce_ampdu_num(struct phl_info_t * phl_info,u8 ratio)62*4882a593Smuzhiyun static void _phl_thermal_protect_reduce_ampdu_num(
63*4882a593Smuzhiyun struct phl_info_t *phl_info,
64*4882a593Smuzhiyun u8 ratio)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct rtw_phl_com_t *phl_com = phl_info->phl_com;
67*4882a593Smuzhiyun struct mr_ctl_t *mr_ctl = phlcom_to_mr_ctrl(phl_com);
68*4882a593Smuzhiyun struct rtw_wifi_role_t *wrole = NULL;
69*4882a593Smuzhiyun struct rtw_phl_stainfo_t *sta = NULL;
70*4882a593Smuzhiyun u8 i = 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun for (i = 0; i < MAX_WIFI_ROLE_NUMBER; i++) {
73*4882a593Smuzhiyun if (mr_ctl->role_map & BIT(i)) {
74*4882a593Smuzhiyun wrole = rtw_phl_get_wrole_by_ridx(phl_info->phl_com, i);
75*4882a593Smuzhiyun if(wrole){
76*4882a593Smuzhiyun if(wrole->mstate == MLME_LINKED)
77*4882a593Smuzhiyun break;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun wrole = NULL;
80*4882a593Smuzhiyun continue;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if(wrole == NULL)
85*4882a593Smuzhiyun return;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun sta = rtw_phl_get_stainfo_self(phl_info, wrole);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if(sta == NULL)
90*4882a593Smuzhiyun return;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if(ratio != 0){
93*4882a593Smuzhiyun if(rtw_hal_thermal_protect_cfg_tx_ampdu(phl_info->hal, sta, ratio)
94*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS)
95*4882a593Smuzhiyun PHL_ERR("%s Thermal protect cfg tx ampdu fail\n", __FUNCTION__);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun else{
98*4882a593Smuzhiyun if(sta->asoc_cap.num_ampdu_bk != 0){
99*4882a593Smuzhiyun sta->asoc_cap.num_ampdu = sta->asoc_cap.num_ampdu_bk;
100*4882a593Smuzhiyun sta->asoc_cap.num_ampdu_bk = 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun if(rtw_hal_cfg_tx_ampdu(phl_info->hal, sta) !=
103*4882a593Smuzhiyun RTW_HAL_STATUS_SUCCESS)
104*4882a593Smuzhiyun PHL_ERR("%s Thermal protect restore tx ampdu fail\n", __FUNCTION__);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
phl_thermal_protect_watchdog(struct phl_info_t * phl_info)109*4882a593Smuzhiyun void phl_thermal_protect_watchdog(struct phl_info_t *phl_info)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct rtw_phl_com_t *phl_com = phl_info->phl_com;
112*4882a593Smuzhiyun bool action_changed = false;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if(phl_com->drv_mode != RTW_DRV_MODE_NORMAL &&
115*4882a593Smuzhiyun phl_com->drv_mode != RTW_DRV_MODE_HIGH_THERMAL)
116*4882a593Smuzhiyun return;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun action_changed = rtw_hal_check_thermal_protect(phl_com, phl_info->hal);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if(action_changed == false)
121*4882a593Smuzhiyun return;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun switch (phl_com->thermal_protect_action){
124*4882a593Smuzhiyun case PHL_THERMAL_PROTECT_ACTION_NONE:
125*4882a593Smuzhiyun _phl_thermal_protect_disable_all_txop(phl_info, false);
126*4882a593Smuzhiyun _phl_thermal_protect_reduce_ampdu_num(phl_info, 0);
127*4882a593Smuzhiyun break;
128*4882a593Smuzhiyun case PHL_THERMAL_PROTECT_ACTION_LEVEL1:
129*4882a593Smuzhiyun _phl_thermal_protect_disable_all_txop(phl_info, true);
130*4882a593Smuzhiyun _phl_thermal_protect_reduce_ampdu_num(phl_info, 70);
131*4882a593Smuzhiyun break;
132*4882a593Smuzhiyun case PHL_THERMAL_PROTECT_ACTION_LEVEL2:
133*4882a593Smuzhiyun _phl_thermal_protect_reduce_ampdu_num(phl_info, 50);
134*4882a593Smuzhiyun break;
135*4882a593Smuzhiyun default:
136*4882a593Smuzhiyun break;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun #endif /* CONFIG_PHL_THERMAL_PROTECT */
141*4882a593Smuzhiyun
phl_thermal_protect_cfg_tx_duty(struct phl_info_t * phl_info,u16 tx_duty_interval,u8 ratio)142*4882a593Smuzhiyun void phl_thermal_protect_cfg_tx_duty(
143*4882a593Smuzhiyun struct phl_info_t *phl_info,
144*4882a593Smuzhiyun u16 tx_duty_interval,
145*4882a593Smuzhiyun u8 ratio)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun hal_status = rtw_hal_thermal_protect_cfg_tx_duty(phl_info->hal,
150*4882a593Smuzhiyun tx_duty_interval,
151*4882a593Smuzhiyun ratio);
152*4882a593Smuzhiyun if(hal_status != RTW_HAL_STATUS_SUCCESS)
153*4882a593Smuzhiyun PHL_ERR("%s Thermal protect cfg tx duty fail\n", __FUNCTION__);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
phl_thermal_protect_stop_tx_duty(struct phl_info_t * phl_info)156*4882a593Smuzhiyun void phl_thermal_protect_stop_tx_duty(struct phl_info_t *phl_info)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun hal_status = rtw_hal_thermal_protect_stop_tx_duty(phl_info->hal);
161*4882a593Smuzhiyun if(hal_status != RTW_HAL_STATUS_SUCCESS)
162*4882a593Smuzhiyun PHL_ERR("%s Thermal protect stop tx duty fail\n", __FUNCTION__);
163*4882a593Smuzhiyun }