1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2019 - 2020 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #include "phl_headers.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #ifdef CONFIG_FSM
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * SER stands for System Error Recovery
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define SER_FW_TIMEOUT 1000 /* ms */
23*4882a593Smuzhiyun #define SER_POLLING_INTERVAL 10 /* ms */
24*4882a593Smuzhiyun #define SER_USB_POLLING_INTERVAL_IDL 1000 /* ms */
25*4882a593Smuzhiyun #define SER_USB_POLLING_INTERVAL_ACT 10 /* ms */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define SER_POLL_IO_TIMES 200
28*4882a593Smuzhiyun #define SER_USB_POLL_IO_TIMES 300
29*4882a593Smuzhiyun #define SER_POLL_BULK_TIMES 100
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define SER_L0 0x00000001
32*4882a593Smuzhiyun #define SER_L1 0x00000002
33*4882a593Smuzhiyun #define SER_L2 0x00000004
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct ser_obj {
36*4882a593Smuzhiyun struct fsm_main *fsm;
37*4882a593Smuzhiyun struct phl_info_t *phl_info;
38*4882a593Smuzhiyun struct fsm_obj *fsm_obj;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun int poll_io_times;
41*4882a593Smuzhiyun int poll_bulk_times;
42*4882a593Smuzhiyun bool trigger_l2_reset;
43*4882a593Smuzhiyun bool trigger_l1_reset;
44*4882a593Smuzhiyun bool dynamicThredRunning;
45*4882a593Smuzhiyun _os_lock state_lock;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun enum SER_STATE_ST {
49*4882a593Smuzhiyun SER_ST_IDLE,
50*4882a593Smuzhiyun SER_ST_L1_PAUSE_TRX,
51*4882a593Smuzhiyun SER_ST_L1_DO_HCI,
52*4882a593Smuzhiyun SER_ST_L1_RESUME_TRX,
53*4882a593Smuzhiyun SER_ST_L2
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun enum SER_EV_ID {
57*4882a593Smuzhiyun SER_EV_L1_START,
58*4882a593Smuzhiyun //SER_EV_L2_START,
59*4882a593Smuzhiyun //SER_EV_M1_PAUSE_TRX,
60*4882a593Smuzhiyun SER_EV_M3_DO_RECOVERY,
61*4882a593Smuzhiyun SER_EV_M5_READY,
62*4882a593Smuzhiyun SER_EV_M9_L2_RESET,
63*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE,
64*4882a593Smuzhiyun SER_EV_POLL_IO_EXPIRE,
65*4882a593Smuzhiyun SER_EV_POLL_BULK_EXPIRE,
66*4882a593Smuzhiyun SER_EV_POLL_USB_INT_EXPIRE,
67*4882a593Smuzhiyun SER_EV_CHK_SER_EVENT,
68*4882a593Smuzhiyun SER_EV_MAX
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static int ser_idle_st_hdl(void *obj, u16 event, void *param);
72*4882a593Smuzhiyun static int ser_usb_idle_st_hdl(void *obj, u16 event, void *param);
73*4882a593Smuzhiyun static int ser_pci_l1_pause_trx_st_hdl(void *obj, u16 event, void *param);
74*4882a593Smuzhiyun static int ser_usb_l1_pause_trx_st_hdl(void *obj, u16 event, void *param);
75*4882a593Smuzhiyun static int ser_sdio_l1_pause_trx_st_hdl(void *obj, u16 event, void *param);
76*4882a593Smuzhiyun static int ser_pci_l1_do_hci_st_hdl(void *obj, u16 event, void *param);
77*4882a593Smuzhiyun static int ser_usb_l1_do_hci_st_hdl(void *obj, u16 event, void *param);
78*4882a593Smuzhiyun static int ser_sdio_l1_do_hci_st_hdl(void *obj, u16 event, void *param);
79*4882a593Smuzhiyun static int ser_l1_resume_trx_st_hdl(void *obj, u16 event, void *param);
80*4882a593Smuzhiyun static int ser_l2_st_hdl(void *obj, u16 event, void *param);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* PCIE STATE table */
83*4882a593Smuzhiyun static struct fsm_state_ent ser_pci_state_tbl[] = {
84*4882a593Smuzhiyun ST_ENT(SER_ST_IDLE, ser_idle_st_hdl),
85*4882a593Smuzhiyun ST_ENT(SER_ST_L1_PAUSE_TRX, ser_pci_l1_pause_trx_st_hdl),
86*4882a593Smuzhiyun ST_ENT(SER_ST_L1_DO_HCI, ser_pci_l1_do_hci_st_hdl),
87*4882a593Smuzhiyun ST_ENT(SER_ST_L1_RESUME_TRX, ser_l1_resume_trx_st_hdl),
88*4882a593Smuzhiyun ST_ENT(SER_ST_L2, ser_l2_st_hdl)
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* USB STATE table */
92*4882a593Smuzhiyun static struct fsm_state_ent ser_usb_state_tbl[] = {
93*4882a593Smuzhiyun ST_ENT(SER_ST_IDLE, ser_usb_idle_st_hdl),
94*4882a593Smuzhiyun ST_ENT(SER_ST_L1_PAUSE_TRX, ser_usb_l1_pause_trx_st_hdl),
95*4882a593Smuzhiyun ST_ENT(SER_ST_L1_DO_HCI, ser_usb_l1_do_hci_st_hdl),
96*4882a593Smuzhiyun ST_ENT(SER_ST_L1_RESUME_TRX, ser_l1_resume_trx_st_hdl),
97*4882a593Smuzhiyun ST_ENT(SER_ST_L2, ser_l2_st_hdl)
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* SDIO STATE table */
101*4882a593Smuzhiyun static struct fsm_state_ent ser_sdio_state_tbl[] = {
102*4882a593Smuzhiyun ST_ENT(SER_ST_IDLE, ser_idle_st_hdl),
103*4882a593Smuzhiyun ST_ENT(SER_ST_L1_PAUSE_TRX, ser_sdio_l1_pause_trx_st_hdl),
104*4882a593Smuzhiyun ST_ENT(SER_ST_L1_DO_HCI, ser_sdio_l1_do_hci_st_hdl),
105*4882a593Smuzhiyun ST_ENT(SER_ST_L1_RESUME_TRX, ser_l1_resume_trx_st_hdl),
106*4882a593Smuzhiyun ST_ENT(SER_ST_L2, ser_l2_st_hdl)
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* EVENT table */
111*4882a593Smuzhiyun static struct fsm_event_ent ser_event_tbl[] = {
112*4882a593Smuzhiyun EV_ENT(SER_EV_L1_START),
113*4882a593Smuzhiyun //EV_ENT(SER_EV_L2_START),
114*4882a593Smuzhiyun //EV_ENT(SER_EV_M1_PAUSE_TRX),
115*4882a593Smuzhiyun EV_ENT(SER_EV_M3_DO_RECOVERY),
116*4882a593Smuzhiyun EV_ENT(SER_EV_M5_READY),
117*4882a593Smuzhiyun EV_ENT(SER_EV_M9_L2_RESET),
118*4882a593Smuzhiyun EV_ENT(SER_EV_FW_TIMER_EXPIRE),
119*4882a593Smuzhiyun EV_ENT(SER_EV_POLL_IO_EXPIRE),
120*4882a593Smuzhiyun EV_ENT(SER_EV_POLL_BULK_EXPIRE),
121*4882a593Smuzhiyun EV_DBG(SER_EV_POLL_USB_INT_EXPIRE),
122*4882a593Smuzhiyun EV_ENT(SER_EV_CHK_SER_EVENT),
123*4882a593Smuzhiyun EV_ENT(SER_EV_MAX) /* EV_MAX for fsm safety checking */
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
_ser_event_notify(void * phl,u8 * p_ntfy)126*4882a593Smuzhiyun static enum rtw_phl_status _ser_event_notify(void *phl, u8* p_ntfy)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
129*4882a593Smuzhiyun struct ser_obj *pser = phl_info->ser_obj;
130*4882a593Smuzhiyun struct phl_msg msg = {0};
131*4882a593Smuzhiyun enum RTW_PHL_SER_NOTIFY_EVENT notify = RTW_PHL_SER_L2_RESET;
132*4882a593Smuzhiyun u32 err = 0;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun notify = rtw_hal_ser_get_error_status(pser->phl_info->hal, &err);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (p_ntfy != NULL)
137*4882a593Smuzhiyun *p_ntfy = notify;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun phl_info->phl_com->phl_stats.ser_event[notify]++;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "_ser_event_notify, error 0x%x, notify 0x%x\n", err, notify);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (notify == RTW_PHL_SER_L0_RESET) {
144*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_, "_ser_event_notify, hit L0 Reset\n");
145*4882a593Smuzhiyun return RTW_PHL_STATUS_SUCCESS;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (notify == RTW_PHL_SER_LOG_ONLY) {
149*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_, "_ser_event_notify, RTW_PHL_SER_LOG_ONLY\n");
150*4882a593Smuzhiyun return RTW_PHL_STATUS_SUCCESS;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (notify == RTW_PHL_SER_DUMP_FW_LOG) {
154*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_, "_ser_event_notify, RTW_PHL_SER_DUMP_FW_LOG\n");
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun SET_MSG_MDL_ID_FIELD(msg.msg_id, PHL_MDL_PHY_MGNT);
157*4882a593Smuzhiyun SET_MSG_EVT_ID_FIELD(msg.msg_id, MSG_EVT_DUMP_PLE_BUFFER);
158*4882a593Smuzhiyun phl_msg_hub_send(phl_info, NULL, &msg);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return RTW_PHL_STATUS_SUCCESS;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun return phl_ser_send_msg(phl, notify);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /*
168*4882a593Smuzhiyun * SER sub function
169*4882a593Smuzhiyun */
ser_pcie_pause_dma_io(struct ser_obj * pser)170*4882a593Smuzhiyun void ser_pcie_pause_dma_io(struct ser_obj *pser)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
173*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
ser_polling_io_state(struct ser_obj * pser)176*4882a593Smuzhiyun int ser_polling_io_state(struct ser_obj *pser)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
179*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
180*4882a593Smuzhiyun return 0; /* success */
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
ser_return_all_tcb_and_mem(struct ser_obj * pser)183*4882a593Smuzhiyun void ser_return_all_tcb_and_mem(struct ser_obj *pser)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
186*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
ser_send_l0_handle_method_event(struct ser_obj * pser,enum RTW_PHL_SER_RCVY_STEP event)189*4882a593Smuzhiyun void ser_send_l0_handle_method_event(struct ser_obj *pser, enum RTW_PHL_SER_RCVY_STEP event)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s with event = 0x%04X\n",
192*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__, event);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /*
195*4882a593Smuzhiyun * Default use notify only RTW_PHL_SER_L0_CFG_NOTIFY
196*4882a593Smuzhiyun * if need do l0 debug, set RTW_PHL_SER_L0_CFG_HANDSHAKE when init.
197*4882a593Smuzhiyun * 1. after receive L0 notify within h2c, dump some Crs for debug.
198*4882a593Smuzhiyun * 2. set RTW_PHL_SER_L0_RCVY_EN
199*4882a593Smuzhiyun */
200*4882a593Smuzhiyun phl_ser_event_to_fw(pser->phl_info, event);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
ser_send_l0_do_rcvy_event(struct ser_obj * pser)203*4882a593Smuzhiyun void ser_send_l0_do_rcvy_event(struct ser_obj *pser)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
206*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun /*Default use notify only RTW_PHL_SER_L0_CFG_NOTIFY*/
209*4882a593Smuzhiyun phl_ser_event_to_fw(pser->phl_info, RTW_PHL_SER_L0_RCVY_EN);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun
ser_send_m2_event(struct ser_obj * pser)213*4882a593Smuzhiyun void ser_send_m2_event(struct ser_obj *pser)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
216*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun phl_ser_event_to_fw(pser->phl_info, RTW_PHL_SER_L1_DISABLE_EN);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
ser_send_m4_event(struct ser_obj * pser)221*4882a593Smuzhiyun void ser_send_m4_event(struct ser_obj *pser)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
224*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
225*4882a593Smuzhiyun phl_ser_event_to_fw(pser->phl_info, RTW_PHL_SER_L1_RCVY_EN);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
ser_usb_trx_disable_cr(struct ser_obj * pser)228*4882a593Smuzhiyun void ser_usb_trx_disable_cr(struct ser_obj *pser)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
231*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
ser_usb_wait_all_bulk_complete(struct ser_obj * pser)234*4882a593Smuzhiyun int ser_usb_wait_all_bulk_complete(struct ser_obj *pser)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
237*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
238*4882a593Smuzhiyun return 0; /* success */
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
ser_pci_clear_rw_pointer(struct ser_obj * pser)241*4882a593Smuzhiyun void ser_pci_clear_rw_pointer(struct ser_obj *pser)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
244*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
ser_pci_assert_dessert_dma_reset(struct ser_obj * pser)247*4882a593Smuzhiyun void ser_pci_assert_dessert_dma_reset(struct ser_obj *pser)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
250*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
ser_pci_reset_bdram(struct ser_obj * pser)253*4882a593Smuzhiyun void ser_pci_reset_bdram(struct ser_obj *pser)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
256*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
ser_pci_enable_dma_io(struct ser_obj * pser)259*4882a593Smuzhiyun void ser_pci_enable_dma_io(struct ser_obj *pser)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
262*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
ser_usb_enable_bulk_IO(struct ser_obj * pser)265*4882a593Smuzhiyun void ser_usb_enable_bulk_IO(struct ser_obj *pser)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
268*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
269*4882a593Smuzhiyun }
ser_resume_trx_process(struct ser_obj * pser,u8 type)270*4882a593Smuzhiyun void ser_resume_trx_process(struct ser_obj *pser, u8 type)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun struct phl_hci_trx_ops *ops = pser->phl_info->hci_trx_ops;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun FSM_DBG(pser->fsm, "%s: %s\n",
275*4882a593Smuzhiyun phl_fsm_obj_name(pser->fsm_obj), __func__);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun ops->trx_resume(pser->phl_info, type);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
281*4882a593Smuzhiyun extern bool rtw_phl_recognize_interrupt(void *phl);
282*4882a593Smuzhiyun extern enum rtw_phl_status rtw_phl_interrupt_handler(void *phl);
ser_usb_chk_int_event(struct ser_obj * pser)283*4882a593Smuzhiyun static void ser_usb_chk_int_event(struct ser_obj *pser)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun if (true == rtw_phl_recognize_interrupt(pser->phl_info))
286*4882a593Smuzhiyun rtw_phl_interrupt_handler(pser->phl_info);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun #endif
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /*
291*4882a593Smuzhiyun * SER state handler
292*4882a593Smuzhiyun */
rtw_phl_ser_inprogress(void * phl)293*4882a593Smuzhiyun u8 rtw_phl_ser_inprogress(void *phl)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun return phl_ser_inprogress(phl);
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
rtw_phl_ser_clear_status(void * phl,u32 serstatus)298*4882a593Smuzhiyun void rtw_phl_ser_clear_status(void *phl, u32 serstatus)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun phl_ser_clear_status(phl, serstatus);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /*
304*4882a593Smuzhiyun * ser idle handler
305*4882a593Smuzhiyun */
ser_idle_st_hdl(void * obj,u16 event,void * param)306*4882a593Smuzhiyun static int ser_idle_st_hdl(void *obj, u16 event, void *param)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
309*4882a593Smuzhiyun u8 notify;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun switch (event) {
312*4882a593Smuzhiyun case FSM_EV_STATE_IN:
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun case SER_EV_CHK_SER_EVENT:
316*4882a593Smuzhiyun if (true == rtw_hal_recognize_halt_c2h_interrupt(pser->phl_info->hal)) {
317*4882a593Smuzhiyun _ser_event_notify(pser->phl_info, ¬ify);
318*4882a593Smuzhiyun if ((notify == RTW_PHL_SER_L0_RESET) || (notify == RTW_PHL_SER_L2_RESET))
319*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun else {
322*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun break;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun case SER_EV_L1_START:
328*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_PAUSE_TRX);
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun #if 0
331*4882a593Smuzhiyun case SER_EV_L2_START:
332*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun #endif
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
337*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
341*4882a593Smuzhiyun break;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun default:
344*4882a593Smuzhiyun break;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
ser_usb_idle_st_hdl(void * obj,u16 event,void * param)349*4882a593Smuzhiyun static int ser_usb_idle_st_hdl(void *obj, u16 event, void *param)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun switch (event) {
354*4882a593Smuzhiyun case FSM_EV_SWITCH_IN:
355*4882a593Smuzhiyun #if 1
356*4882a593Smuzhiyun /* Disable L0 Reset Notify from FW to driver */
357*4882a593Smuzhiyun ser_send_l0_handle_method_event(pser, RTW_PHL_SER_L0_CFG_DIS_NOTIFY);
358*4882a593Smuzhiyun #endif
359*4882a593Smuzhiyun /* fallthrough */
360*4882a593Smuzhiyun case FSM_EV_STATE_IN:
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun #if defined(RTW_WKARD_SER_USB_POLLING_EVENT) && !defined(CONFIG_PHL_CMD_SER)
363*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
364*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_IDL, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
365*4882a593Smuzhiyun #endif
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun break;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
370*4882a593Smuzhiyun case SER_EV_POLL_USB_INT_EXPIRE:
371*4882a593Smuzhiyun ser_usb_chk_int_event(pser);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
374*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_IDL, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
375*4882a593Smuzhiyun break;
376*4882a593Smuzhiyun #endif
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun case SER_EV_L1_START:
379*4882a593Smuzhiyun #ifndef RTW_WKARD_SER_USB_DISABLE_L1_RCVY_FLOW
380*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_PAUSE_TRX);
381*4882a593Smuzhiyun #endif
382*4882a593Smuzhiyun break;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun #if 0
385*4882a593Smuzhiyun case SER_EV_L2_START:
386*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
387*4882a593Smuzhiyun break;
388*4882a593Smuzhiyun #endif
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
391*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
392*4882a593Smuzhiyun break;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
395*4882a593Smuzhiyun phl_fsm_cancel_alarm_ext(pser->fsm_obj, 1);
396*4882a593Smuzhiyun break;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun default:
399*4882a593Smuzhiyun break;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun return 0;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
ser_pci_l1_pause_trx_st_hdl(void * obj,u16 event,void * param)404*4882a593Smuzhiyun static int ser_pci_l1_pause_trx_st_hdl(void *obj, u16 event, void *param)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
407*4882a593Smuzhiyun struct phl_hci_trx_ops *ops = pser->phl_info->hci_trx_ops;
408*4882a593Smuzhiyun struct phl_msg msg = {0};
409*4882a593Smuzhiyun enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun SET_MSG_MDL_ID_FIELD(msg.msg_id, PHL_MDL_SER);
412*4882a593Smuzhiyun SET_MSG_EVT_ID_FIELD(msg.msg_id, MSG_EVT_SER_L1);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun switch (event) {
415*4882a593Smuzhiyun case FSM_EV_STATE_IN:
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun phl_ser_set_status(pser, SER_L1);
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun //send msg to core
420*4882a593Smuzhiyun phl_msg_hub_send(pser->phl_info, NULL, &msg);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun ops->req_tx_stop(pser->phl_info);
423*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun if(rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_RCVY_STEP_1)
426*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS){
427*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
428*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
429*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun ops->req_rx_stop(pser->phl_info);
434*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info) ||
437*4882a593Smuzhiyun false == ops->is_rx_pause(pser->phl_info)) {
438*4882a593Smuzhiyun /* pci: polling fail; wait for a while */
439*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
440*4882a593Smuzhiyun SER_POLLING_INTERVAL, SER_EV_POLL_IO_EXPIRE);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* prevent infinite polling */
443*4882a593Smuzhiyun pser->poll_io_times = SER_POLL_IO_TIMES;
444*4882a593Smuzhiyun break;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun ops->trx_reset(pser->phl_info, PHL_CTRL_TX|PHL_CTRL_RX);
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* pci: send M2 event */
450*4882a593Smuzhiyun ser_send_m2_event(pser);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /* pci: wait M3 */
453*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
454*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun case SER_EV_M3_DO_RECOVERY:
458*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_DO_HCI);
459*4882a593Smuzhiyun break;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
462*4882a593Smuzhiyun /*phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);*/
463*4882a593Smuzhiyun status = rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
466*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
467*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
468*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun if (status != RTW_HAL_STATUS_SUCCESS) {
471*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
472*4882a593Smuzhiyun } else {
473*4882a593Smuzhiyun phl_ser_clear_status(pser, SER_L1);
474*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
482*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
483*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
484*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun break;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun case SER_EV_POLL_IO_EXPIRE:
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun if (pser->poll_io_times-- <= 0) {
493*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_L1_EXPIRE
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun ops->trx_reset(pser->phl_info, PHL_CTRL_TX|PHL_CTRL_RX);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun /* pci: send M2 event */
498*4882a593Smuzhiyun ser_send_m2_event(pser);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun /* pci: wait M3 */
501*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
502*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun #else
505*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
506*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
507*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
508*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
509*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
510*4882a593Smuzhiyun #endif
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /*send msg to core*/
515*4882a593Smuzhiyun /*phl_msg_hub_send(pser->phl_info, &msg);*/
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info) ||
518*4882a593Smuzhiyun false == ops->is_rx_pause(pser->phl_info) ) {
519*4882a593Smuzhiyun /* pci: polling fail; wait for a while */
520*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
521*4882a593Smuzhiyun SER_POLLING_INTERVAL, SER_EV_POLL_IO_EXPIRE);
522*4882a593Smuzhiyun break;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun /*
525*4882a593Smuzhiyun if(rtw_hal_lv1_rcvy(hal_info, RTW_PHL_SER_LV1_RCVY_STEP_1) != RTW_HAL_STATUS_SUCCESS){
526*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
527*4882a593Smuzhiyun break;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun */
530*4882a593Smuzhiyun ops->trx_reset(pser->phl_info, PHL_CTRL_TX|PHL_CTRL_RX);
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* pci: send M2 event */
533*4882a593Smuzhiyun ser_send_m2_event(pser);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun /* pci: wait M3 */
536*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
537*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
538*4882a593Smuzhiyun break;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun case FSM_EV_CANCEL:
541*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
542*4882a593Smuzhiyun break;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
545*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
546*4882a593Smuzhiyun break;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun default:
549*4882a593Smuzhiyun break;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun return 0;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
ser_usb_l1_pause_trx_done(struct ser_obj * pser)554*4882a593Smuzhiyun static void ser_usb_l1_pause_trx_done(struct ser_obj *pser)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_RCVY_STEP_1);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun ser_send_m2_event(pser);
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
ser_usb_l1_pause_trx_st_hdl(void * obj,u16 event,void * param)561*4882a593Smuzhiyun static int ser_usb_l1_pause_trx_st_hdl(void *obj, u16 event, void *param)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
564*4882a593Smuzhiyun struct phl_hci_trx_ops *ops = pser->phl_info->hci_trx_ops;
565*4882a593Smuzhiyun struct phl_msg msg = {0};
566*4882a593Smuzhiyun enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun switch (event) {
569*4882a593Smuzhiyun case FSM_EV_STATE_IN:
570*4882a593Smuzhiyun phl_ser_set_status(pser, SER_L1);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun SET_MSG_MDL_ID_FIELD(msg.msg_id, PHL_MDL_SER);
573*4882a593Smuzhiyun SET_MSG_EVT_ID_FIELD(msg.msg_id, MSG_EVT_SER_L1);
574*4882a593Smuzhiyun phl_msg_hub_send(pser->phl_info, NULL, &msg);
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun ops->req_tx_stop(pser->phl_info);
577*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun #if 0
580*4882a593Smuzhiyun /* not request pause PHL Rx in USB data path */
581*4882a593Smuzhiyun ops->req_rx_stop(pser->phl_info);
582*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
583*4882a593Smuzhiyun #endif
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info)
586*4882a593Smuzhiyun #if 0
587*4882a593Smuzhiyun || false == ops->is_rx_pause(pser->phl_info)
588*4882a593Smuzhiyun #endif
589*4882a593Smuzhiyun ) {
590*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
591*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_IO_EXPIRE);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun pser->poll_io_times = SER_USB_POLL_IO_TIMES;
594*4882a593Smuzhiyun break;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun ser_usb_l1_pause_trx_done(pser);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
600*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
601*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
602*4882a593Smuzhiyun #endif
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
605*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun break;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
610*4882a593Smuzhiyun case SER_EV_POLL_USB_INT_EXPIRE:
611*4882a593Smuzhiyun ser_usb_chk_int_event(pser);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
614*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
615*4882a593Smuzhiyun break;
616*4882a593Smuzhiyun #endif
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun case SER_EV_M3_DO_RECOVERY:
619*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_DO_HCI);
620*4882a593Smuzhiyun break;
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
623*4882a593Smuzhiyun status = rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2);
624*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
625*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun if (status != RTW_HAL_STATUS_SUCCESS)
628*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
629*4882a593Smuzhiyun else
630*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun break;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
635*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
636*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
637*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
638*4882a593Smuzhiyun break;
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun case SER_EV_POLL_IO_EXPIRE:
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun if (pser->poll_io_times-- <= 0) {
643*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_L1_EXPIRE
644*4882a593Smuzhiyun ser_usb_l1_pause_trx_done(pser);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
647*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
650*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
651*4882a593Smuzhiyun #else
652*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
653*4882a593Smuzhiyun #endif
654*4882a593Smuzhiyun break;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info)
658*4882a593Smuzhiyun #if 0
659*4882a593Smuzhiyun || false == ops->is_rx_pause(pser->phl_info)
660*4882a593Smuzhiyun #endif
661*4882a593Smuzhiyun ) {
662*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
663*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_IO_EXPIRE);
664*4882a593Smuzhiyun break;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun ser_usb_l1_pause_trx_done(pser);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
670*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
673*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun break;
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun case FSM_EV_CANCEL:
678*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
679*4882a593Smuzhiyun break;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
682*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
683*4882a593Smuzhiyun phl_fsm_cancel_alarm_ext(pser->fsm_obj, 1);
684*4882a593Smuzhiyun break;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun default:
687*4882a593Smuzhiyun break;
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
ser_sdio_l1_pause_trx_st_hdl(void * obj,u16 event,void * param)692*4882a593Smuzhiyun static int ser_sdio_l1_pause_trx_st_hdl(void *obj, u16 event, void *param)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
695*4882a593Smuzhiyun struct phl_hci_trx_ops *ops = pser->phl_info->hci_trx_ops;
696*4882a593Smuzhiyun struct phl_msg msg = {0};
697*4882a593Smuzhiyun enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun switch (event) {
700*4882a593Smuzhiyun case FSM_EV_STATE_IN:
701*4882a593Smuzhiyun phl_ser_set_status(pser, BIT1);
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun SET_MSG_MDL_ID_FIELD(msg.msg_id, PHL_MDL_SER);
704*4882a593Smuzhiyun SET_MSG_EVT_ID_FIELD(msg.msg_id, MSG_EVT_SER_L1);
705*4882a593Smuzhiyun phl_msg_hub_send(pser->phl_info, NULL, &msg);
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun ops->req_tx_stop(pser->phl_info);
708*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun ops->req_rx_stop(pser->phl_info);
711*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info)
714*4882a593Smuzhiyun || false == ops->is_rx_pause(pser->phl_info)) {
715*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
716*4882a593Smuzhiyun SER_POLLING_INTERVAL, SER_EV_POLL_IO_EXPIRE);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun pser->poll_io_times = SER_POLL_IO_TIMES;
719*4882a593Smuzhiyun break;
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_DIS_HCI_INT);
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun if (rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_RCVY_STEP_1)
725*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS) {
726*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
727*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
728*4882a593Smuzhiyun break;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_SER_HANDSHAKE_MODE);
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun ser_send_m2_event(pser);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
736*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun break;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun case SER_EV_CHK_SER_EVENT:
741*4882a593Smuzhiyun if (true == rtw_hal_recognize_halt_c2h_interrupt(pser->phl_info->hal))
742*4882a593Smuzhiyun _ser_event_notify(pser->phl_info, NULL);
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun break;
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun case SER_EV_M3_DO_RECOVERY:
747*4882a593Smuzhiyun rtw_hal_clear_interrupt(pser->phl_info->hal);
748*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_DO_HCI);
749*4882a593Smuzhiyun break;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
752*4882a593Smuzhiyun status = rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2);
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
755*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
756*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
757*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun if (status != RTW_HAL_STATUS_SUCCESS) {
762*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
763*4882a593Smuzhiyun } else {
764*4882a593Smuzhiyun phl_ser_clear_status(pser, BIT1);
765*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
771*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
772*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
773*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
774*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
779*4882a593Smuzhiyun break;
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun case SER_EV_POLL_IO_EXPIRE:
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun if (pser->poll_io_times-- <= 0) {
784*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_L1_EXPIRE
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun if (rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_RCVY_STEP_1)
787*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS) {
788*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
789*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
790*4882a593Smuzhiyun break;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_SER_HANDSHAKE_MODE);
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun ser_send_m2_event(pser);
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
798*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun #else
801*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
802*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
803*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
804*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
809*4882a593Smuzhiyun #endif
810*4882a593Smuzhiyun break;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun if (false == ops->is_tx_pause(pser->phl_info) ||
814*4882a593Smuzhiyun false == ops->is_rx_pause(pser->phl_info)) {
815*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj,
816*4882a593Smuzhiyun SER_POLLING_INTERVAL, SER_EV_POLL_IO_EXPIRE);
817*4882a593Smuzhiyun break;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_DIS_HCI_INT);
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun if (rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_RCVY_STEP_1)
823*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS) {
824*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
825*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
826*4882a593Smuzhiyun break;
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_SER_HANDSHAKE_MODE);
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun ser_send_m2_event(pser);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
834*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
835*4882a593Smuzhiyun break;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun case FSM_EV_CANCEL:
838*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
839*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
840*4882a593Smuzhiyun break;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
843*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
844*4882a593Smuzhiyun break;
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun default:
847*4882a593Smuzhiyun break;
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun return 0;
850*4882a593Smuzhiyun }
851*4882a593Smuzhiyun
ser_pci_l1_do_hci_st_hdl(void * obj,u16 event,void * param)852*4882a593Smuzhiyun static int ser_pci_l1_do_hci_st_hdl(void *obj, u16 event, void *param)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun switch (event) {
857*4882a593Smuzhiyun case FSM_EV_STATE_IN:
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun if(rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2)
860*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS){
861*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
862*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
863*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
864*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
865*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
866*4882a593Smuzhiyun break;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
869*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun /* pci: send M4 event */
872*4882a593Smuzhiyun ser_send_m4_event(pser);
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun /* pci: set timeout to wait M5 */
875*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
876*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
877*4882a593Smuzhiyun break;
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun case SER_EV_M5_READY:
880*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_RESUME_TRX);
881*4882a593Smuzhiyun break;
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
885*4882a593Smuzhiyun /* PHL_INFO("ser_pci_l1_do_hci_st_hdl(): SER_EV_FW_TIMER_EXPIRE \n"); */
886*4882a593Smuzhiyun /* _ser_event_notify(pser->phl_info, NULL); */
887*4882a593Smuzhiyun /* phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2); */
888*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
889*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
890*4882a593Smuzhiyun phl_ser_clear_status(pser, SER_L1);
891*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
892*4882a593Smuzhiyun break;
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
897*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
898*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun break;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun case FSM_EV_CANCEL:
903*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
904*4882a593Smuzhiyun break;
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
907*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
908*4882a593Smuzhiyun break;
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun default:
911*4882a593Smuzhiyun break;
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun return 0;
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun
ser_usb_l1_do_hci_st_hdl(void * obj,u16 event,void * param)916*4882a593Smuzhiyun static int ser_usb_l1_do_hci_st_hdl(void *obj, u16 event, void *param)
917*4882a593Smuzhiyun {
918*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun switch (event) {
921*4882a593Smuzhiyun case FSM_EV_STATE_IN:
922*4882a593Smuzhiyun if (rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2)
923*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS) {
924*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
925*4882a593Smuzhiyun break;
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
928*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun ser_send_m4_event(pser);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
933*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
934*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
935*4882a593Smuzhiyun #endif
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
938*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
939*4882a593Smuzhiyun break;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun #ifdef RTW_WKARD_SER_USB_POLLING_EVENT
942*4882a593Smuzhiyun case SER_EV_POLL_USB_INT_EXPIRE:
943*4882a593Smuzhiyun ser_usb_chk_int_event(pser);
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun phl_fsm_set_alarm_ext(pser->fsm_obj,
946*4882a593Smuzhiyun SER_USB_POLLING_INTERVAL_ACT, SER_EV_POLL_USB_INT_EXPIRE, 1, NULL);
947*4882a593Smuzhiyun break;
948*4882a593Smuzhiyun #endif
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun case SER_EV_M5_READY:
951*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
952*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_RESUME_TRX);
953*4882a593Smuzhiyun break;
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
956*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
957*4882a593Smuzhiyun break;
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun case FSM_EV_CANCEL:
960*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
961*4882a593Smuzhiyun break;
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
964*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
965*4882a593Smuzhiyun phl_fsm_cancel_alarm_ext(pser->fsm_obj, 1);
966*4882a593Smuzhiyun break;
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun default:
969*4882a593Smuzhiyun break;
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun return 0;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun
ser_sdio_l1_do_hci_st_hdl(void * obj,u16 event,void * param)974*4882a593Smuzhiyun static int ser_sdio_l1_do_hci_st_hdl(void *obj, u16 event, void *param)
975*4882a593Smuzhiyun {
976*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun switch (event) {
979*4882a593Smuzhiyun case FSM_EV_STATE_IN:
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun if (rtw_hal_lv1_rcvy(pser->phl_info->hal, RTW_PHL_SER_LV1_SER_RCVY_STEP_2)
982*4882a593Smuzhiyun != RTW_HAL_STATUS_SUCCESS) {
983*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
984*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
985*4882a593Smuzhiyun break;
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_RX);
988*4882a593Smuzhiyun rtw_phl_start_rx_process(pser->phl_info);
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_SER_HANDSHAKE_MODE);
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun ser_send_m4_event(pser);
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun phl_fsm_set_alarm(pser->fsm_obj, SER_FW_TIMEOUT,
995*4882a593Smuzhiyun SER_EV_FW_TIMER_EXPIRE);
996*4882a593Smuzhiyun break;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun case SER_EV_CHK_SER_EVENT:
999*4882a593Smuzhiyun if (true == rtw_hal_recognize_halt_c2h_interrupt(pser->phl_info->hal))
1000*4882a593Smuzhiyun _ser_event_notify(pser->phl_info, NULL);
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun break;
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun case SER_EV_M5_READY:
1005*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
1006*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L1_RESUME_TRX);
1007*4882a593Smuzhiyun break;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun case SER_EV_FW_TIMER_EXPIRE:
1010*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
1011*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
1012*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
1013*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1014*4882a593Smuzhiyun break;
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun case SER_EV_M9_L2_RESET:
1017*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
1018*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_L2);
1019*4882a593Smuzhiyun break;
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun case FSM_EV_CANCEL:
1022*4882a593Smuzhiyun rtw_hal_config_interrupt(pser->phl_info->hal, RTW_PHL_EN_HCI_INT);
1023*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1024*4882a593Smuzhiyun break;
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
1027*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
1028*4882a593Smuzhiyun break;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun default:
1031*4882a593Smuzhiyun break;
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun return 0;
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun
ser_l1_resume_trx_st_hdl(void * obj,u16 event,void * param)1036*4882a593Smuzhiyun static int ser_l1_resume_trx_st_hdl(void *obj, u16 event, void *param)
1037*4882a593Smuzhiyun {
1038*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun switch (event) {
1042*4882a593Smuzhiyun case FSM_EV_STATE_IN:
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun /* TODO resume TRX process */
1045*4882a593Smuzhiyun ser_resume_trx_process(pser, PHL_CTRL_TX);
1046*4882a593Smuzhiyun rtw_phl_tx_req_notify(pser->phl_info);
1047*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1048*4882a593Smuzhiyun break;
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun case FSM_EV_CANCEL:
1051*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1052*4882a593Smuzhiyun break;
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
1055*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
1056*4882a593Smuzhiyun phl_ser_clear_status(pser, SER_L1);
1057*4882a593Smuzhiyun break;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun default:
1060*4882a593Smuzhiyun break;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun return 0;
1063*4882a593Smuzhiyun }
1064*4882a593Smuzhiyun
ser_l2_st_hdl(void * obj,u16 event,void * param)1065*4882a593Smuzhiyun static int ser_l2_st_hdl(void *obj, u16 event, void *param)
1066*4882a593Smuzhiyun {
1067*4882a593Smuzhiyun struct ser_obj *pser = (struct ser_obj *)obj;
1068*4882a593Smuzhiyun struct phl_msg msg = {0};
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun switch (event) {
1071*4882a593Smuzhiyun case FSM_EV_STATE_IN:
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun /*To avoid fw watchdog intr trigger periodically*/
1074*4882a593Smuzhiyun rtw_hal_ser_reset_wdt_intr(pser->phl_info->hal);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun /* TODO do something */
1077*4882a593Smuzhiyun phl_ser_clear_status(pser, SER_L1);
1078*4882a593Smuzhiyun phl_ser_set_status(pser, SER_L2);
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun SET_MSG_MDL_ID_FIELD(msg.msg_id, PHL_MDL_SER);
1081*4882a593Smuzhiyun SET_MSG_EVT_ID_FIELD(msg.msg_id, MSG_EVT_SER_L2);
1082*4882a593Smuzhiyun phl_msg_hub_send(pser->phl_info, NULL, &msg);
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1085*4882a593Smuzhiyun break;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun case FSM_EV_TIMER_EXPIRE:
1088*4882a593Smuzhiyun break;
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun case FSM_EV_CANCEL:
1091*4882a593Smuzhiyun phl_fsm_state_goto(pser->fsm_obj, SER_ST_IDLE);
1092*4882a593Smuzhiyun break;
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun case FSM_EV_STATE_OUT:
1095*4882a593Smuzhiyun phl_fsm_cancel_alarm(pser->fsm_obj);
1096*4882a593Smuzhiyun break;
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun default:
1099*4882a593Smuzhiyun break;
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun return 0;
1102*4882a593Smuzhiyun }
1103*4882a593Smuzhiyun
ser_dump_obj(void * obj,char * s,int * sz)1104*4882a593Smuzhiyun static void ser_dump_obj(void *obj, char *s, int *sz)
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun /* nothing to do for now */
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
ser_dump_fsm(void * fsm,char * s,int * sz)1109*4882a593Smuzhiyun static void ser_dump_fsm(void *fsm, char *s, int *sz)
1110*4882a593Smuzhiyun {
1111*4882a593Smuzhiyun /* nothing to do for now */
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun /* For EXTERNAL application to create a ser FSM */
1115*4882a593Smuzhiyun /* @root: FSM root structure
1116*4882a593Smuzhiyun * @phl_info: private data structure to invoke hal/phl function
1117*4882a593Smuzhiyun *
1118*4882a593Smuzhiyun * return
1119*4882a593Smuzhiyun * fsm_main: FSM main structure (Do NOT expose)
1120*4882a593Smuzhiyun */
phl_ser_new_fsm(struct fsm_root * root,struct phl_info_t * phl_info)1121*4882a593Smuzhiyun struct fsm_main *phl_ser_new_fsm(struct fsm_root *root,
1122*4882a593Smuzhiyun struct phl_info_t *phl_info)
1123*4882a593Smuzhiyun {
1124*4882a593Smuzhiyun void *d = phl_to_drvpriv(phl_info);
1125*4882a593Smuzhiyun struct fsm_main *fsm = NULL;
1126*4882a593Smuzhiyun struct rtw_phl_fsm_tb tb;
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun _os_mem_set(d, &tb, 0, sizeof(tb));
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun if (phl_info->phl_com->hci_type == RTW_HCI_PCIE)
1131*4882a593Smuzhiyun tb.state_tbl = ser_pci_state_tbl;
1132*4882a593Smuzhiyun else if (phl_info->phl_com->hci_type == RTW_HCI_USB)
1133*4882a593Smuzhiyun tb.state_tbl = ser_usb_state_tbl;
1134*4882a593Smuzhiyun else if (phl_info->phl_com->hci_type == RTW_HCI_SDIO)
1135*4882a593Smuzhiyun tb.state_tbl = ser_sdio_state_tbl;
1136*4882a593Smuzhiyun else
1137*4882a593Smuzhiyun return NULL;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun tb.max_state = sizeof(ser_pci_state_tbl)/sizeof(ser_pci_state_tbl[0]);
1140*4882a593Smuzhiyun tb.max_event = sizeof(ser_event_tbl)/sizeof(ser_event_tbl[0]);
1141*4882a593Smuzhiyun tb.evt_tbl = ser_event_tbl;
1142*4882a593Smuzhiyun tb.dump_obj = ser_dump_obj;
1143*4882a593Smuzhiyun tb.dump_obj = ser_dump_fsm;
1144*4882a593Smuzhiyun tb.dbg_level = FSM_DBG_INFO;
1145*4882a593Smuzhiyun tb.evt_level = FSM_DBG_INFO;
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun fsm = phl_fsm_init_fsm(root, "ser", phl_info, &tb);
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun return fsm;
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun /* For EXTERNAL application to destory ser fsm */
1153*4882a593Smuzhiyun /* @fsm: see fsm_main
1154*4882a593Smuzhiyun */
phl_ser_destory_fsm(struct fsm_main * fsm)1155*4882a593Smuzhiyun void phl_ser_destory_fsm(struct fsm_main *fsm)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun if (fsm == NULL)
1158*4882a593Smuzhiyun return;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun /* deinit fsm local variable if has */
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun /* call FSM Framewro to deinit fsm */
1163*4882a593Smuzhiyun phl_fsm_deinit_fsm(fsm);
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun /* For EXTERNAL application to create SER object */
1167*4882a593Smuzhiyun /* @fsm: FSM main structure which created by phl_ser_new_fsm()
1168*4882a593Smuzhiyun * @phl_info: private data structure to invoke hal/phl function
1169*4882a593Smuzhiyun *
1170*4882a593Smuzhiyun * return
1171*4882a593Smuzhiyun * ser_obj: structure of SER object (Do NOT expose)
1172*4882a593Smuzhiyun */
phl_ser_new_obj(struct fsm_main * fsm,struct phl_info_t * phl_info)1173*4882a593Smuzhiyun struct ser_obj *phl_ser_new_obj(struct fsm_main *fsm,
1174*4882a593Smuzhiyun struct phl_info_t *phl_info)
1175*4882a593Smuzhiyun {
1176*4882a593Smuzhiyun void *d = phl_to_drvpriv(phl_info);
1177*4882a593Smuzhiyun struct fsm_obj *obj;
1178*4882a593Smuzhiyun struct ser_obj *pser;
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun pser = phl_fsm_new_obj(fsm, (void **)&obj, sizeof(*pser));
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun if (pser == NULL) {
1184*4882a593Smuzhiyun /* TODO free fsm; currently will be freed in deinit process */
1185*4882a593Smuzhiyun FSM_ERR(fsm, "ser: malloc obj fail\n");
1186*4882a593Smuzhiyun return NULL;
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun pser->fsm = fsm;
1189*4882a593Smuzhiyun pser->fsm_obj = obj;
1190*4882a593Smuzhiyun pser->phl_info = phl_info;
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun /* init local use variable */
1193*4882a593Smuzhiyun _os_spinlock_init(d, &pser->state_lock);
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun return pser;
1196*4882a593Smuzhiyun }
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun /* For EXTERNAL application to destory ser object */
1199*4882a593Smuzhiyun /* @pser: local created command object
1200*4882a593Smuzhiyun *
1201*4882a593Smuzhiyun */
phl_ser_destory_obj(struct ser_obj * pser)1202*4882a593Smuzhiyun void phl_ser_destory_obj(struct ser_obj *pser)
1203*4882a593Smuzhiyun {
1204*4882a593Smuzhiyun void *d;
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun if (pser == NULL)
1207*4882a593Smuzhiyun return;
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun d = phl_to_drvpriv(pser->phl_info);
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun /* deinit obj local variable if has */
1212*4882a593Smuzhiyun _os_spinlock_free(d, &pser->state_lock);
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun /* inform FSM framewory to recycle fsm_obj */
1215*4882a593Smuzhiyun phl_fsm_destory_obj(pser->fsm_obj);
1216*4882a593Smuzhiyun }
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun /* For EXTERNAL application to stop ser service (expose) */
1219*4882a593Smuzhiyun /* @pser: ser job will be cancelled
1220*4882a593Smuzhiyun */
phl_ser_cancel(void * phl)1221*4882a593Smuzhiyun enum rtw_phl_status phl_ser_cancel(void *phl)
1222*4882a593Smuzhiyun {
1223*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1224*4882a593Smuzhiyun struct ser_obj *pser = phl_info->ser_obj;
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun return phl_fsm_gen_msg(phl, pser->fsm_obj, NULL, 0, FSM_EV_CANCEL);
1227*4882a593Smuzhiyun }
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun /* For EXTERNAL interrupt handler to send event into ser fsm (expose) */
phl_ser_event_to_fw(void * phl,u32 err)1230*4882a593Smuzhiyun enum rtw_phl_status phl_ser_event_to_fw(void *phl, u32 err)
1231*4882a593Smuzhiyun {
1232*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1233*4882a593Smuzhiyun enum rtw_hal_status status;
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun status = rtw_hal_ser_set_error_status(phl_info->hal ,err);
1236*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_ERR_, "phl_ser_event_to_fw err %d, status 0x%x\n", err, status);
1237*4882a593Smuzhiyun return status;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun /* For EXTERNAL interrupt handler and dump fw ple (expose) */
rtw_phl_ser_dump_ple_buffer(void * phl)1241*4882a593Smuzhiyun enum rtw_phl_status rtw_phl_ser_dump_ple_buffer(void *phl)
1242*4882a593Smuzhiyun {
1243*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_, "rtw_phl_ser_dump_ple_buffer\n");
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun rtw_hal_dump_fw_rsvd_ple(phl_info->hal);
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun return RTW_PHL_STATUS_SUCCESS;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun /* For EXTERNAL interrupt handler and dump fw ple (expose) */
phl_fw_watchdog_timeout_notify(void * phl)1253*4882a593Smuzhiyun enum rtw_phl_status phl_fw_watchdog_timeout_notify(void *phl)
1254*4882a593Smuzhiyun {
1255*4882a593Smuzhiyun enum RTW_PHL_SER_NOTIFY_EVENT notify = RTW_PHL_SER_L2_RESET;
1256*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_ERR_, "phl_fw_watchdog_timeout_notify triggle L2 Reset !!!\n");
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun return phl_ser_send_msg(phl, notify);
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun
rtw_phl_ser_l2_notify(struct rtw_phl_com_t * phl_com)1261*4882a593Smuzhiyun enum rtw_phl_status rtw_phl_ser_l2_notify(struct rtw_phl_com_t *phl_com)
1262*4882a593Smuzhiyun {
1263*4882a593Smuzhiyun enum RTW_PHL_SER_NOTIFY_EVENT notify = RTW_PHL_SER_L2_RESET;
1264*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_ERR_, "rtw_phl_ser_l2_notify triggle L2 Reset !!!\n");
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun return phl_ser_send_msg(phl_com->phl_priv, notify);
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun
1269*4882a593Smuzhiyun /* @phl: phl_info_t
1270*4882a593Smuzhiyun * @notify: event to ser fsm
1271*4882a593Smuzhiyun */
1272*4882a593Smuzhiyun
1273*4882a593Smuzhiyun #ifndef CONFIG_PHL_CMD_SER
phl_ser_send_msg(void * phl,enum RTW_PHL_SER_NOTIFY_EVENT notify)1274*4882a593Smuzhiyun enum rtw_phl_status phl_ser_send_msg(void *phl,
1275*4882a593Smuzhiyun enum RTW_PHL_SER_NOTIFY_EVENT notify)
1276*4882a593Smuzhiyun {
1277*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1278*4882a593Smuzhiyun struct ser_obj *pser = phl_info->ser_obj;
1279*4882a593Smuzhiyun u16 event;
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun switch (notify) {
1282*4882a593Smuzhiyun case RTW_PHL_SER_PAUSE_TRX: /* M1 */
1283*4882a593Smuzhiyun event = SER_EV_L1_START;
1284*4882a593Smuzhiyun break;
1285*4882a593Smuzhiyun case RTW_PHL_SER_DO_RECOVERY: /* M3 */
1286*4882a593Smuzhiyun event = SER_EV_M3_DO_RECOVERY;
1287*4882a593Smuzhiyun break;
1288*4882a593Smuzhiyun case RTW_PHL_SER_READY: /* M5 */
1289*4882a593Smuzhiyun event = SER_EV_M5_READY;
1290*4882a593Smuzhiyun break;
1291*4882a593Smuzhiyun case RTW_PHL_SER_L2_RESET: /* M9 */
1292*4882a593Smuzhiyun event = SER_EV_M9_L2_RESET;
1293*4882a593Smuzhiyun break;
1294*4882a593Smuzhiyun case RTW_PHL_SER_EVENT_CHK:
1295*4882a593Smuzhiyun event = SER_EV_CHK_SER_EVENT;
1296*4882a593Smuzhiyun break;
1297*4882a593Smuzhiyun case RTW_PHL_SER_L0_RESET:
1298*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_DEBUG_, "phl_ser_send_msg(): Unsupported case:%d, please check it\n",
1299*4882a593Smuzhiyun notify);
1300*4882a593Smuzhiyun return RTW_PHL_STATUS_FAILURE;
1301*4882a593Smuzhiyun default:
1302*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_DEBUG_, "phl_ser_send_msg(): Unrecognize case:%d, please check it\n",
1303*4882a593Smuzhiyun notify);
1304*4882a593Smuzhiyun return RTW_PHL_STATUS_FAILURE;
1305*4882a593Smuzhiyun }
1306*4882a593Smuzhiyun PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "phl_ser_send_msg event %d\n", event);
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun return phl_fsm_gen_msg(phl, pser->fsm_obj, NULL, 0, event);
1309*4882a593Smuzhiyun }
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun /* For EXTERNAL application to do L2 reset (expose) */
1313*4882a593Smuzhiyun /* @pser: ser job will be cancelled
1314*4882a593Smuzhiyun */
phl_ser_inprogress(void * phl)1315*4882a593Smuzhiyun u8 phl_ser_inprogress(void *phl)
1316*4882a593Smuzhiyun {
1317*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1318*4882a593Smuzhiyun struct ser_obj *pser = phl_info->ser_obj;
1319*4882a593Smuzhiyun u8 reset_type = 0;
1320*4882a593Smuzhiyun void *d = phl_to_drvpriv(phl_info);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun _os_spinlock(d, &pser->state_lock, _bh, NULL);
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun if(pser->trigger_l1_reset == true) {
1325*4882a593Smuzhiyun reset_type |= SER_L1;
1326*4882a593Smuzhiyun //pser->trigger_l2_reset = false;
1327*4882a593Smuzhiyun }
1328*4882a593Smuzhiyun if(pser->trigger_l2_reset == true) {
1329*4882a593Smuzhiyun reset_type |= SER_L2;
1330*4882a593Smuzhiyun }
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun _os_spinunlock(d, &pser->state_lock, _bh, NULL);
1333*4882a593Smuzhiyun return reset_type;
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun #endif
1336*4882a593Smuzhiyun
1337*4882a593Smuzhiyun /* For EXTERNAL application to do L2 reset (expose) */
1338*4882a593Smuzhiyun /* @pser: ser job will be cancelled
1339*4882a593Smuzhiyun */
phl_ser_clear_status(struct ser_obj * pser,u32 serstatus)1340*4882a593Smuzhiyun void phl_ser_clear_status(struct ser_obj *pser, u32 serstatus)
1341*4882a593Smuzhiyun {
1342*4882a593Smuzhiyun void *d = phl_to_drvpriv(pser->phl_info);
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun _os_spinlock(d, &pser->state_lock, _bh, NULL);
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun if(serstatus & SER_L1) {
1347*4882a593Smuzhiyun pser->trigger_l1_reset = false;
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun if(serstatus & SER_L2) {
1350*4882a593Smuzhiyun pser->trigger_l2_reset = false;
1351*4882a593Smuzhiyun }
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun _os_spinunlock(d, &pser->state_lock, _bh, NULL);
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
phl_ser_set_status(struct ser_obj * pser,u32 serstatus)1356*4882a593Smuzhiyun void phl_ser_set_status(struct ser_obj *pser, u32 serstatus)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun void *d = phl_to_drvpriv(pser->phl_info);
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun _os_spinlock(d, &pser->state_lock, _bh, NULL);
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun if(serstatus & SER_L1) {
1363*4882a593Smuzhiyun pser->trigger_l1_reset = true;
1364*4882a593Smuzhiyun }
1365*4882a593Smuzhiyun if(serstatus & SER_L2) {
1366*4882a593Smuzhiyun pser->trigger_l2_reset = true;
1367*4882a593Smuzhiyun }
1368*4882a593Smuzhiyun
1369*4882a593Smuzhiyun _os_spinunlock(d, &pser->state_lock, _bh, NULL);
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun /* For EXTERNAL application notify from upper layer*/
phl_ser_notify_from_upper_watchdog_status(void * phl,bool inprogress)1374*4882a593Smuzhiyun void phl_ser_notify_from_upper_watchdog_status(void *phl, bool inprogress)
1375*4882a593Smuzhiyun {
1376*4882a593Smuzhiyun struct phl_info_t *phl_info = (struct phl_info_t *)phl;
1377*4882a593Smuzhiyun struct ser_obj *pser = phl_info->ser_obj;
1378*4882a593Smuzhiyun
1379*4882a593Smuzhiyun pser->dynamicThredRunning = inprogress;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun
rtw_phl_notify_watchdog_status(void * phl,bool inprogress)1382*4882a593Smuzhiyun void rtw_phl_notify_watchdog_status(void *phl, bool inprogress)
1383*4882a593Smuzhiyun {
1384*4882a593Smuzhiyun phl_ser_notify_from_upper_watchdog_status(phl, inprogress);
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun #endif /*CONFIG_FSM*/
1387*4882a593Smuzhiyun
1388