1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2021 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef _PHL_PS_H_ 16*4882a593Smuzhiyun #define _PHL_PS_H_ 17*4882a593Smuzhiyun #ifdef CONFIG_POWER_SAVE 18*4882a593Smuzhiyun enum phl_ps_mode { 19*4882a593Smuzhiyun PS_MODE_NONE, 20*4882a593Smuzhiyun PS_MODE_LPS, 21*4882a593Smuzhiyun PS_MODE_IPS 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define PS_MACID_NONE 0xFFFF 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* use to configure specific pwr mode along with pwr lvl and others */ 27*4882a593Smuzhiyun struct ps_cfg { 28*4882a593Smuzhiyun /* common */ 29*4882a593Smuzhiyun u8 ps_mode; 30*4882a593Smuzhiyun u8 cur_pwr_lvl; 31*4882a593Smuzhiyun u8 pwr_lvl; 32*4882a593Smuzhiyun u16 macid; 33*4882a593Smuzhiyun /* lps */ 34*4882a593Smuzhiyun bool pwr_cfg; /* whether to configure pwr lvl */ 35*4882a593Smuzhiyun bool proto_cfg; /* whether to configure protocol */ 36*4882a593Smuzhiyun u32 *token; 37*4882a593Smuzhiyun u8 listen_bcn_mode; 38*4882a593Smuzhiyun u8 awake_interval; 39*4882a593Smuzhiyun u8 smart_ps_mode; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define _get_ps_cap(_phl_info) (&_phl_info->phl_com->dev_cap.ps_cap) 43*4882a593Smuzhiyun #define _get_ps_sw_cap(_phl_info) (&_phl_info->phl_com->dev_sw_cap.ps_cap) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun const char *phl_ps_op_mode_to_str(u8 op_mode); 46*4882a593Smuzhiyun const char *phl_ps_ps_mode_to_str(u8 ps_mode); 47*4882a593Smuzhiyun const char *phl_ps_pwr_lvl_to_str(u8 pwr_lvl); 48*4882a593Smuzhiyun u8 phl_ps_judge_pwr_lvl(u8 ps_cap, u8 ps_mode, u8 ps_en); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun enum rtw_phl_status 51*4882a593Smuzhiyun phl_ps_ips_cfg(struct phl_info_t *phl_info, struct ps_cfg *cfg, u8 ips_en); 52*4882a593Smuzhiyun enum rtw_phl_status phl_ps_lps_cfg(struct phl_info_t *phl_info, struct ps_cfg *cfg, u8 lps_en); 53*4882a593Smuzhiyun enum rtw_phl_status phl_ps_cfg_pwr_lvl(struct phl_info_t *phl_info, u8 ps_mode, u8 cur_pwr_lvl, u8 req_pwr_lvl); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun enum rtw_phl_status phl_ps_enter_ps(struct phl_info_t *phl_info, struct ps_cfg *cfg); 56*4882a593Smuzhiyun enum rtw_phl_status phl_ps_leave_ps(struct phl_info_t *phl_info, struct ps_cfg *cfg); 57*4882a593Smuzhiyun #endif 58*4882a593Smuzhiyun #endif /* _PHL_PS_H_ */ 59