1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2021 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef _PHL_CMD_PS_H_ 16*4882a593Smuzhiyun #define _PHL_CMD_PS_H_ 17*4882a593Smuzhiyun #ifdef CONFIG_POWER_SAVE 18*4882a593Smuzhiyun enum ps_mdl_opcode { 19*4882a593Smuzhiyun PS_MDL_OP_NONE = 0, 20*4882a593Smuzhiyun PS_MDL_OP_CANCEL_PWR_REQ, 21*4882a593Smuzhiyun PS_MDL_OP_CUR_PWR_LVL, 22*4882a593Smuzhiyun PS_MDL_OP_BASIC_INFO, 23*4882a593Smuzhiyun PS_MDL_OP_BTC_PWR_REQ 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define MAX_CMD_PS_RSON_LENGTH 30 27*4882a593Smuzhiyun struct phl_cmd_ps_basic_info { 28*4882a593Smuzhiyun u8 ps_mode; 29*4882a593Smuzhiyun u8 cur_pwr_lvl; 30*4882a593Smuzhiyun bool rej_pwr_req; 31*4882a593Smuzhiyun bool btc_req_pwr; 32*4882a593Smuzhiyun enum phl_ps_rt_rson rt_stop_rson; 33*4882a593Smuzhiyun bool ap_active; 34*4882a593Smuzhiyun bool gc_active; 35*4882a593Smuzhiyun struct rtw_phl_stainfo_t *sta; 36*4882a593Smuzhiyun char enter_rson[MAX_CMD_PS_RSON_LENGTH]; 37*4882a593Smuzhiyun char leave_rson[MAX_CMD_PS_RSON_LENGTH]; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun enum rtw_phl_status phl_register_ps_module(struct phl_info_t *phl_info); 41*4882a593Smuzhiyun u8 phl_ps_get_cur_pwr_lvl(struct phl_info_t *phl_info); 42*4882a593Smuzhiyun bool phl_ps_is_datapath_allowed(struct phl_info_t *phl_info); 43*4882a593Smuzhiyun void phl_ps_tx_pkt_ntfy(struct phl_info_t *phl_info); 44*4882a593Smuzhiyun void rtw_phl_ps_set_rt_cap(void *phl, u8 band_idx, bool ps_allow, enum phl_ps_rt_rson rt_rson); 45*4882a593Smuzhiyun void phl_ps_dbg_set_ps(struct phl_info_t *phl_info, u8 ps_mode, bool enter); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun #endif /* _PHL_CMD_PS_H_ */ 49