1 /******************************************************************************
2 *
3 * Copyright(c) 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8852B_OPS_C_
16 #include "../hal_headers.h"
17 #include "rtl8852b_hal.h"
18
read_chip_version_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal)19 static void read_chip_version_8852b(struct rtw_phl_com_t *phl_com,
20 struct hal_info_t *hal)
21 {
22 hal_mac_get_hwinfo(hal, &(phl_com->hal_spec));
23
24 }
25
26 /*******************temp common IO APIs *******************/
27 extern u32 hal_read_macreg(struct hal_info_t *hal,
28 u32 offset, u32 bit_mask);
29 extern void hal_write_macreg(struct hal_info_t *hal,
30 u32 offset, u32 bit_mask, u32 data);
31 extern u32 hal_read_bbreg(struct hal_info_t *hal,
32 u32 offset, u32 bit_mask);
33 extern void hal_write_bbreg(struct hal_info_t *hal,
34 u32 offset, u32 bit_mask, u32 data);
35 extern u32 hal_read_rfreg(struct hal_info_t *hal,
36 enum rf_path path, u32 offset, u32 bit_mask);
37 extern void hal_write_rfreg(struct hal_info_t *hal,
38 enum rf_path path, u32 offset, u32 bit_mask, u32 data);
39
hal_set_ops_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal)40 void hal_set_ops_8852b(struct rtw_phl_com_t *phl_com,
41 struct hal_info_t *hal)
42 {
43 struct hal_ops_t *ops = hal_get_ops(hal);
44
45 /*** initialize section ***/
46 ops->read_chip_version = read_chip_version_8852b;
47 ops->hal_cfg_fw = hal_cfg_fw_8852b;
48
49 ops->read_macreg = hal_read_macreg;
50 ops->write_macreg = hal_write_macreg;
51 ops->read_bbreg = hal_read_bbreg;
52 ops->write_bbreg = hal_write_bbreg;
53 ops->read_rfreg = hal_read_rfreg;
54 ops->write_rfreg = hal_write_rfreg;
55
56 #ifdef RTW_PHL_BCN
57 ops->cfg_bcn = hal_config_beacon_8852b;
58 ops->upt_bcn = hal_update_beacon_8852b;
59 #endif
60
61 ops->pkt_ofld = rtw_hal_mac_pkt_ofld;
62 ops->pkt_update_ids = rtw_hal_mac_pkt_update_ids;
63 }
64
65 #if 0
66 void hal_set_trx_ops_8852b(struct hal_info_t *hal)
67 {
68 struct hal_trx_ops_t *ops = hal_get_trx_ops(hal);
69
70 ops->get_txdesc_len = get_txdesc_len_8852b;
71 ops->fill_txdesc_h2c = fill_txdesc_h2c_8852b;
72 ops->fill_txdesc_fwdl = fill_txdesc_fwdl_8852b;
73 ops->fill_txdesc_pkt = fill_txdesc_pkt_8852b;
74 }
75 #endif
76
77