1 /******************************************************************************
2 *
3 * Copyright(c) 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8852B_HALINIT_C_
16 #include "../hal_headers.h"
17 #include "../hal_api.h"
18 #include "rtl8852b_hal.h"
19
init_hal_spec_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal)20 void init_hal_spec_8852b(struct rtw_phl_com_t *phl_com,
21 struct hal_info_t *hal)
22 {
23 struct hal_spec_t *hal_spec = phl_get_ic_spec(phl_com);
24 struct rtw_hal_com_t *hal_com = hal->hal_com;
25 struct protocol_cap_t *hw_proto_cap = hal_com->proto_hw_cap;
26
27 hal_spec->ic_name = "rtl8852b";
28 hal_spec->macid_num = hal_mac_get_macid_num(hal);
29 /* hal_spec->sec_cam_ent_num follow halmac setting */
30 hal_spec->sec_cap = SEC_CAP_CHK_BMC;
31
32 hal_spec->rfpath_num_2g = 2;
33 hal_spec->rfpath_num_5g = 2;
34 hal_spec->rf_reg_path_num = 2;
35 hal_com->rfpath_rx_num = 2;
36 hal_com->rfpath_tx_num = 2;
37 hal_com->phy_hw_cap[0].rx_num = 2;
38 hal_com->phy_hw_cap[0].tx_num = 2;
39 hal_com->phy_hw_cap[1].rx_num = 2;
40 hal_com->phy_hw_cap[1].tx_num = 2;
41 hal_com->phy_hw_cap[0].hw_rts_time_th = 0;
42 hal_com->phy_hw_cap[1].hw_rts_time_th = 0;
43 hal_com->phy_hw_cap[0].hw_rts_len_th = 0;
44 hal_com->phy_hw_cap[1].hw_rts_len_th = 0;
45 hal_spec->max_tx_cnt = 2;
46 hal_spec->band_cap = BAND_CAP_2G | BAND_CAP_5G | BAND_CAP_6G;
47 hal_spec->bw_cap = BW_CAP_20M | BW_CAP_40M | BW_CAP_80M;
48 hal_spec->port_num = 5;
49 hal_spec->wmm_num = 2;
50
51 hal_spec->proto_cap = PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N |
52 PROTO_CAP_11AC | PROTO_CAP_11AX;
53
54 hal_spec->wl_func = 0
55 | WL_FUNC_P2P
56 | WL_FUNC_MIRACAST
57 | WL_FUNC_TDLS
58 ;
59
60 hal_spec->max_csi_buf_su_nr = 2;
61 hal_spec->max_csi_buf_mu_nr = 6;
62 hal_spec->max_bf_ent_nr = 16;
63 hal_spec->max_su_sta_nr = 16;
64 hal_spec->max_mu_sta_nr = 6;
65 #ifdef RTW_WKARD_PHY_CAP
66 /* HE */
67 hw_proto_cap[0].he_su_bfme = 1;
68 hw_proto_cap[0].he_su_bfmr = 1;
69 hw_proto_cap[0].he_mu_bfme = 1;
70 hw_proto_cap[0].he_mu_bfmr = 1;
71
72 hw_proto_cap[1].he_su_bfme = 1;
73 hw_proto_cap[1].he_su_bfmr = 1;
74 hw_proto_cap[1].he_mu_bfme = 1;
75 hw_proto_cap[1].he_mu_bfmr = 0;
76
77 hw_proto_cap[0].trig_cqi_fb = 1;
78 hw_proto_cap[0].non_trig_cqi_fb = 1;
79 hw_proto_cap[1].trig_cqi_fb = 1;
80 hw_proto_cap[1].non_trig_cqi_fb = 1;
81
82 /* VHT */
83 hw_proto_cap[0].vht_su_bfmr = 1;
84 hw_proto_cap[0].vht_su_bfme = 1;
85 hw_proto_cap[0].vht_mu_bfmr = 1;
86 hw_proto_cap[0].vht_mu_bfme = 1;
87
88 hw_proto_cap[1].vht_su_bfmr = 1;
89 hw_proto_cap[1].vht_su_bfme = 1;
90 hw_proto_cap[1].vht_mu_bfmr = 0;
91 hw_proto_cap[1].vht_mu_bfme = 1;
92
93 /* HT */
94 hw_proto_cap[0].ht_su_bfmr = 1;
95 hw_proto_cap[0].ht_su_bfme = 1;
96
97 hw_proto_cap[1].ht_su_bfmr = 1;
98 hw_proto_cap[1].ht_su_bfme = 1;
99
100 /* STBC Tx*/
101 hw_proto_cap[0].stbc_tx = 1; /* Revmoe later */
102 hw_proto_cap[1].stbc_tx = 1; /* Revmoe later */
103 hw_proto_cap[0].stbc_ht_tx = 1;
104 hw_proto_cap[1].stbc_ht_tx = 1;
105 hw_proto_cap[0].stbc_vht_tx = 1;
106 hw_proto_cap[1].stbc_vht_tx = 1;
107 hw_proto_cap[0].stbc_he_tx = 1;
108 hw_proto_cap[1].stbc_he_tx = 1;
109 hw_proto_cap[0].stbc_tx_greater_80mhz = 0;
110 hw_proto_cap[1].stbc_tx_greater_80mhz = 0;
111
112 /* STBC Rx*/
113 hw_proto_cap[0].stbc_ht_rx = 1;
114 hw_proto_cap[1].stbc_ht_rx = 1;
115 hw_proto_cap[0].stbc_vht_rx = 1;
116 hw_proto_cap[1].stbc_vht_rx = 1;
117 hw_proto_cap[0].stbc_he_rx = 1;
118 hw_proto_cap[1].stbc_he_rx = 1;
119 hw_proto_cap[0].stbc_rx_greater_80mhz = 0;
120 hw_proto_cap[1].stbc_rx_greater_80mhz = 0;
121 #endif
122
123 /*get mac capability*/
124 phl_com->dev_cap.hw_sup_flags = HW_SUP_AMSDU |
125 HW_SUP_TCP_TX_CHKSUM |
126 HW_SUP_TCP_RX_CHKSUM |
127 HW_SUP_TXPKT_CONVR;
128
129 phl_com->dev_cap.hw_sup_flags |= HW_SUP_OFDMA | HW_SUP_CHAN_INFO;
130 phl_com->dev_cap.hw_sup_flags |= HW_SUP_TSSI | HW_SUP_TANK_K;
131
132
133 #ifdef RTW_WKARD_LAMODE
134 hal_com->dev_hw_cap.la_mode = true;/*TODO : get info from halbb*/
135 #endif
136
137 #ifdef CONFIG_DBCC_SUPPORT
138 if (phl_com->dev_cap.hw_sup_flags & HW_SUP_DBCC)
139 hal_com->dev_hw_cap.dbcc_sup = true;/*get info from efuse*/
140 #endif
141 hal_com->dev_hw_cap.hw_hdr_conv = true;
142
143 hal_com->dev_hw_cap.sta_ulru = RTW_HW_CAP_ULRU_ENABLE;
144 #ifdef RTW_WKARD_BB_DISABLE_STA_2G40M_ULOFDMA
145 hal_com->dev_hw_cap.sta_ulru_2g40mhz = RTW_HW_CAP_ULRU_DISABLE;
146 #endif
147 hal_com->dev_hw_cap.tx_mu_ru = false;
148
149 #ifdef CONFIG_MCC_SUPPORT
150 hal_com->dev_hw_cap.mcc_sup = true;
151 #endif /* CONFIG_MCC_SUPPORT */
152
153 #ifdef CONFIG_PHL_TWT
154 /* wait for fw support sta twt */
155 hal_com->dev_hw_cap.twt_sup = 0;
156 #endif /* CONFIG_PHL_TWT */
157
158 hal_com->dev_hw_cap.ps_cap.ips_cap = PS_CAP_PWR_OFF |
159 PS_CAP_PWRON | PS_CAP_RF_OFF | PS_CAP_CLK_GATED | PS_CAP_PWR_GATED;
160 hal_com->dev_hw_cap.ps_cap.ips_wow_cap =
161 PS_CAP_PWRON | PS_CAP_RF_OFF | PS_CAP_CLK_GATED | PS_CAP_PWR_GATED;
162 hal_com->dev_hw_cap.ps_cap.lps_cap =
163 PS_CAP_PWRON | PS_CAP_RF_OFF | PS_CAP_CLK_GATED | PS_CAP_PWR_GATED;
164 hal_com->dev_hw_cap.ps_cap.lps_wow_cap =
165 PS_CAP_PWRON | PS_CAP_RF_OFF | PS_CAP_CLK_GATED | PS_CAP_PWR_GATED;
166
167 hal_com->dev_hw_cap.hw_stype_cap = EFUSE_HW_STYPE_NONE_8852B;
168 hal_com->dev_hw_cap.wl_func_cap = EFUSE_WL_FUNC_NONE;
169 hal_com->dev_hw_cap.rpq_agg_num = 0;
170 }
171
172
init_default_value_8852b(struct hal_info_t * hal)173 void init_default_value_8852b(struct hal_info_t *hal)
174 {
175 }
176
_hal_cfg_rom_fw_8852b(enum rtw_fw_type fw_type,struct rtw_fw_info_t * fw_info,char * ic_name)177 u32 _hal_cfg_rom_fw_8852b(enum rtw_fw_type fw_type, struct rtw_fw_info_t *fw_info,
178 char *ic_name)
179 {
180 char *hal_phy_folder = FW_FILE_CONFIG_PATH;
181 char *filename_postfix = "";
182
183 switch (fw_type) {
184 case RTW_FW_NIC:
185 filename_postfix = FW_FILE_NIC_POSTFIX;
186 break;
187 case RTW_FW_WOWLAN:
188 filename_postfix = FW_FILE_WOWLAN_POSTFIX;
189 break;
190 case RTW_FW_SPIC:
191 filename_postfix = FW_FILE_SPIC_POSTFIX;
192 break;
193 case RTW_FW_AP:
194 filename_postfix = FW_FILE_AP_POSTFIX;
195 break;
196 default:
197 break;
198 }
199
200 _os_snprintf(fw_info->rom_path, MAX_PATH_LEN, "%s%s%s%s", hal_phy_folder,
201 ic_name, _os_path_sep, "rtl8852bfw_rom.bin");
202
203 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : %s\n", __func__, fw_info->rom_path);
204
205 fw_info->rom_size = _os_read_file(fw_info->rom_path,
206 fw_info->rom_buff,
207 RTW_MAX_FW_SIZE);
208 if (!fw_info->rom_size)
209 return RTW_HAL_STATUS_FAILURE;
210
211 return RTW_HAL_STATUS_SUCCESS;
212 }
213
_hal_cfg_intnal_fw_8852b(struct rtw_phl_com_t * phl_com,enum rtw_fw_type fw_type,struct rtw_fw_info_t * fw_info)214 u32 _hal_cfg_intnal_fw_8852b(struct rtw_phl_com_t *phl_com,enum rtw_fw_type fw_type,struct rtw_fw_info_t *fw_info)
215 {
216 /* any related to fw from header can be defined here */
217 return RTW_HAL_STATUS_SUCCESS;
218 }
219
_hal_read_fw_8852b(enum rtw_fw_type fw_type,u8 * tgt_buf,u32 * tgt_buf_size,char * ic_name)220 static u32 _hal_read_fw_8852b(enum rtw_fw_type fw_type,
221 u8 *tgt_buf, u32 *tgt_buf_size, char *ic_name)
222 {
223 char *hal_phy_folder = FW_FILE_CONFIG_PATH;
224 char *filename_postfix = "";
225 char path[256] = {0};
226
227 if (tgt_buf == NULL)
228 return RTW_HAL_STATUS_FAILURE;
229
230 switch (fw_type) {
231 case RTW_FW_NIC:
232 filename_postfix = FW_FILE_NIC_POSTFIX;
233 break;
234 case RTW_FW_WOWLAN:
235 filename_postfix = FW_FILE_WOWLAN_POSTFIX;
236 break;
237 case RTW_FW_SPIC:
238 filename_postfix = FW_FILE_SPIC_POSTFIX;
239 break;
240 case RTW_FW_AP:
241 filename_postfix = FW_FILE_AP_POSTFIX;
242 break;
243 default:
244 return RTW_HAL_STATUS_FAILURE;
245 }
246
247 _os_snprintf(path, MAX_PATH_LEN, "%s%s%s%s%s%s", hal_phy_folder,
248 ic_name, _os_path_sep, "rtl8852bfw", filename_postfix, ".bin");
249
250 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : %s\n", __func__, path);
251
252 if (0 == *tgt_buf_size) {
253 *tgt_buf_size = _os_read_file(path, tgt_buf, RTW_MAX_FW_SIZE);
254 /* reading fw file failed */
255 if (0 == *tgt_buf_size)
256 return RTW_HAL_STATUS_FAILURE;
257 }
258
259 return RTW_HAL_STATUS_SUCCESS;
260 }
261
_hal_cfg_extnal_fw_8852b(struct rtw_phl_com_t * phl_com,enum rtw_fw_type fw_type,struct rtw_fw_info_t * fw_info,char * ic_name)262 static u32 _hal_cfg_extnal_fw_8852b(struct rtw_phl_com_t *phl_com,
263 enum rtw_fw_type fw_type, struct rtw_fw_info_t *fw_info, char *ic_name)
264 {
265 void *d = phlcom_to_drvpriv(phl_com);
266 u8 *tgt_buf = NULL;
267 u32 tgt_buf_size = 0;
268
269 switch (fw_type) {
270 case RTW_FW_NIC:
271 _hal_read_fw_8852b(RTW_FW_NIC, fw_info->buf,
272 &fw_info->buf_size, ic_name);
273 /* preload wowlan fw */
274 _hal_read_fw_8852b(RTW_FW_WOWLAN, fw_info->wow_buf,
275 &fw_info->wow_buf_size, ic_name);
276 /* target is still NIC */
277 tgt_buf = fw_info->buf;
278 tgt_buf_size = fw_info->buf_size;
279 break;
280 case RTW_FW_WOWLAN:
281 _hal_read_fw_8852b(RTW_FW_WOWLAN, fw_info->wow_buf,
282 &fw_info->wow_buf_size, ic_name);
283 tgt_buf = fw_info->wow_buf;
284 tgt_buf_size = fw_info->wow_buf_size;
285 break;
286 case RTW_FW_SPIC:
287 _hal_read_fw_8852b(RTW_FW_SPIC, fw_info->buf,
288 &fw_info->buf_size, ic_name);
289 tgt_buf = fw_info->buf;
290 tgt_buf_size = fw_info->buf_size;
291 break;
292 case RTW_FW_AP:
293 _hal_read_fw_8852b(RTW_FW_AP, fw_info->buf,
294 &fw_info->buf_size, ic_name);
295 tgt_buf = fw_info->buf;
296 tgt_buf_size = fw_info->buf_size;
297 break;
298 default:
299 return RTW_HAL_STATUS_FAILURE;
300 }
301
302 /* fw has been downloaded */
303 if (tgt_buf && (0 != tgt_buf_size)) {
304 _os_mem_cpy(d, fw_info->ram_buff, tgt_buf,
305 tgt_buf_size);
306 fw_info->ram_size = tgt_buf_size;
307 return RTW_HAL_STATUS_SUCCESS;
308 } else {
309 fw_info->ram_size = 0;
310 return _hal_read_fw_8852b(fw_type, fw_info->ram_buff,
311 &fw_info->ram_size, ic_name);
312 }
313
314 }
315
hal_cfg_fw_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal,char * ic_name,enum rtw_fw_type fw_type)316 enum rtw_hal_status hal_cfg_fw_8852b(struct rtw_phl_com_t *phl_com,
317 struct hal_info_t *hal,
318 char *ic_name,
319 enum rtw_fw_type fw_type)
320 {
321 enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
322 struct rtw_fw_info_t *fw_info = &phl_com->fw_info;
323 struct rtw_fw_cap_t *fw_cap = &phl_com->dev_cap.fw_cap;
324
325 FUNCIN();
326
327 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : fw_src %d.\n", __func__,
328 fw_cap->fw_src);
329 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : dlram_en %d.\n", __func__,
330 fw_cap->dlram_en);
331 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : dlrom_en %d.\n", __func__,
332 fw_cap->dlrom_en);
333 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "%s : fw_type %d.\n", __func__,
334 fw_type);
335
336 fw_info->fw_en = false;
337
338 if (!fw_cap->dlram_en)
339 return hstatus;
340
341 /* Should handle fw src from header */
342 if (fw_cap->dlrom_en) {
343 if (RTW_HAL_STATUS_SUCCESS !=_hal_cfg_rom_fw_8852b(fw_type, fw_info,
344 ic_name))
345 goto init_fw_fail;
346 }
347
348 /* RAM */
349 if (fw_cap->fw_src == RTW_FW_SRC_EXTNAL) {
350 fw_info->fw_src = RTW_FW_SRC_EXTNAL;
351 if (RTW_HAL_STATUS_SUCCESS != _hal_cfg_extnal_fw_8852b(phl_com, fw_type,
352 fw_info, ic_name))
353 goto init_fw_fail;
354 } else if (fw_cap->fw_src == RTW_FW_SRC_INTNAL) {
355 fw_info->fw_src = RTW_FW_SRC_INTNAL;
356 if (RTW_HAL_STATUS_SUCCESS != _hal_cfg_intnal_fw_8852b(phl_com, fw_type,
357 fw_info))
358 goto init_fw_fail;
359 } else {
360 goto init_fw_fail;
361 }
362
363 fw_info->fw_type = fw_type;
364 fw_info->fw_en = true;
365 fw_info->dlram_en = fw_cap->dlram_en;
366 fw_info->dlrom_en = fw_cap->dlrom_en;
367
368 /* fw_en, dlram_en, dlrom_en, ram_buff, ram_size, rom_buff, rom_size are ready here. */
369
370 hstatus = RTW_HAL_STATUS_SUCCESS;
371
372 init_fw_fail:
373 PHL_TRACE(COMP_PHL_DBG, _PHL_ERR_, "%s : fw_en %d.\n", __func__, fw_info->fw_en);
374 return hstatus;
375 }
376
hal_get_efuse_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal,struct hal_init_info_t * init_info)377 enum rtw_hal_status hal_get_efuse_8852b(struct rtw_phl_com_t *phl_com,
378 struct hal_info_t *hal,
379 struct hal_init_info_t *init_info)
380 {
381 enum rtw_hal_status hal_status = RTW_HAL_STATUS_FAILURE;
382
383 FUNCIN();
384
385 hal_status = rtw_hal_mac_hal_fast_init(phl_com, hal, init_info);
386 if (hal_status != RTW_HAL_STATUS_SUCCESS)
387 goto hal_fast_init_fail;
388
389 rtw_hal_efuse_process(hal, init_info->ic_name);
390
391 hal_status = rtw_hal_mac_power_switch(phl_com, hal, 0);
392 if (hal_status != RTW_HAL_STATUS_SUCCESS)
393 goto hal_power_off_fail;
394
395 FUNCOUT();
396
397 return RTW_HAL_STATUS_SUCCESS;
398
399 hal_power_off_fail:
400 hal_fast_init_fail:
401 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "==> %s : hal get efuse fail\n", __func__);
402 return hal_status;
403 }
404
hal_start_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal,struct hal_init_info_t * init_info)405 enum rtw_hal_status hal_start_8852b(struct rtw_phl_com_t *phl_com,
406 struct hal_info_t *hal,
407 struct hal_init_info_t *init_info)
408 {
409 enum rtw_hal_status hal_status = RTW_HAL_STATUS_FAILURE;
410 struct phy_cap_t *phy_cap = phl_com->phy_cap;
411 u8 val = 0;
412
413 /* Read phy parameter files */
414 rtw_hal_dl_all_para_file(phl_com, init_info->ic_name, hal);
415
416 hal_status = rtw_hal_mac_hal_init(phl_com, hal, init_info);
417 if (hal_status != RTW_HAL_STATUS_SUCCESS)
418 goto hal_init_fail;
419
420 rtw_hal_set_rxfltr_by_mode(hal, HW_BAND_0, RX_FLTR_MODE_STA_NORMAL);
421 /* MAC Suggested : 11264 Byte */
422 rtw_hal_mac_set_rxfltr_mpdu_size(hal->hal_com, HW_BAND_0, 0x2c00);
423 rtw_hal_mac_set_hw_rts_th(hal, HW_BAND_0,
424 phy_cap[HW_BAND_0].hw_rts_time_th,
425 phy_cap[HW_BAND_0].hw_rts_len_th);
426 if (hal->hal_com->dbcc_en == true) {
427 rtw_hal_set_rxfltr_by_mode(hal, HW_BAND_1, RX_FLTR_MODE_STA_NORMAL);
428 rtw_hal_mac_set_rxfltr_mpdu_size(hal->hal_com, HW_BAND_1, 0x2c00);
429 rtw_hal_mac_set_hw_rts_th(hal, HW_BAND_1,
430 phy_cap[HW_BAND_1].hw_rts_time_th,
431 phy_cap[HW_BAND_1].hw_rts_len_th);
432 }
433 #ifdef CONFIG_BTCOEX
434 /* power on config for btc */
435 rtw_hal_btc_power_on_ntfy(hal);
436 #endif
437
438 /* EFUSE config */
439 rtw_hal_efuse_process(hal, init_info->ic_name);
440 rtw_hal_final_cap_decision(phl_com, hal);
441
442 /*[Pre-config BB/RF] BBRST / RFC reset */
443 rtw_hal_mac_enable_bb_rf(hal, 0);
444 rtw_hal_mac_enable_bb_rf(hal, 1);
445
446 /* load parameters or config mac, phy, btc, ... */
447 #ifdef USE_TRUE_PHY
448 rtw_hal_init_bb_reg(hal);
449 rtw_hal_init_rf_reg(phl_com, hal);
450 #endif
451
452 #ifdef CONFIG_BTCOEX
453 /* After mac/bb/rf initialized, set btc config */
454 rtw_hal_btc_init_coex_cfg_ntfy(hal);
455 #endif
456 /* start watchdog/dm */
457 rtw_hal_bb_dm_init(hal);
458 rtw_hal_rf_dm_init(hal);
459
460 hal_status = rtw_hal_mac_get_append_fcs(hal, &val);
461 if (hal_status != RTW_HAL_STATUS_SUCCESS)
462 goto hal_init_fail;
463 else
464 phl_com->append_fcs = val;
465
466 hal_status = rtw_hal_mac_get_acpt_icv_err(hal, &val);
467 if (hal_status != RTW_HAL_STATUS_SUCCESS)
468 goto hal_init_fail;
469 else
470 phl_com->append_fcs = val;
471
472 #ifdef RTW_WKARD_HW_MGNT_GCMP_256_DISABLE
473 rtw_hal_mac_config_hw_mgnt_sec(hal, false);
474 #endif
475
476 PHL_INFO("==> Default ENABLE RX_PPDU_STS for Band0\n");
477 /* Enable PPDU STS in default for BAND-0 for phy status */
478 hal->hal_com->band[HW_BAND_0].ppdu_sts_appen_info = HAL_PPDU_MAC_INFO | HAL_PPDU_PLCP | HAL_PPDU_RX_CNT;
479 hal->hal_com->band[HW_BAND_0].ppdu_sts_filter = (HAL_PPDU_HAS_CRC_OK | HAL_PPDU_HAS_A1M);
480 rtw_hal_mac_ppdu_stat_cfg(
481 hal, HW_BAND_0, true,
482 hal->hal_com->band[HW_BAND_0].ppdu_sts_appen_info,
483 hal->hal_com->band[HW_BAND_0].ppdu_sts_filter);
484
485 phl_com->ppdu_sts_info.en_ppdu_sts[HW_BAND_0] = true;
486 /*TODO Enable PPDU STS in default for BAND-1 for phy status */
487
488 hal_status = rtw_hal_hdr_conv_cfg(hal, phl_com->dev_cap.hw_hdr_conv);
489 if (hal_status != RTW_HAL_STATUS_SUCCESS)
490 goto hal_init_fail;
491
492 /* Enable FW basic logs */
493 hal_fw_en_basic_log(hal->hal_com);
494
495 return RTW_HAL_STATUS_SUCCESS;
496
497 hal_init_fail:
498 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "==> %s : hal init fail\n", __func__);
499 return hal_status;
500 }
501
hal_stop_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal)502 enum rtw_hal_status hal_stop_8852b(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal)
503 {
504 enum rtw_hal_status hal_status = RTW_HAL_STATUS_FAILURE;
505
506 #ifdef CONFIG_BTCOEX
507 /* power off config for btc */
508 rtw_hal_btc_power_off_ntfy(hal);
509 #endif
510 hal_status = rtw_hal_mac_hal_deinit(phl_com, hal);
511 rtw_hal_bb_dm_deinit(phl_com, hal);
512 return hal_status;
513 }
514
515 #ifdef CONFIG_WOWLAN
516 enum rtw_hal_status
hal_wow_init_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal_info,struct rtw_phl_stainfo_t * sta,struct hal_init_info_t * init_info)517 hal_wow_init_8852b(struct rtw_phl_com_t *phl_com,
518 struct hal_info_t *hal_info, struct rtw_phl_stainfo_t *sta,
519 struct hal_init_info_t *init_info)
520 {
521 struct hal_ops_t *hal_ops = hal_get_ops(hal_info);
522 enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
523 bool linked = sta->wrole->mstate == MLME_LINKED ? true : false;
524
525 hal_status = hal_ops->hal_cfg_fw(phl_com, hal_info, init_info->ic_name, RTW_FW_WOWLAN);
526 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
527 PHL_ERR("%s: cfg fw fail(%d)!!\n", __func__, hal_status);
528 goto exit;
529 }
530
531 hal_status = rtw_hal_redownload_fw(phl_com, hal_info);
532 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
533 PHL_ERR("%s: redownload fw fail(%d)!!\n", __func__, hal_status);
534 goto exit;
535 }
536
537 hal_status = rtw_hal_mac_role_sync(hal_info, sta);
538 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
539 PHL_ERR("%s: role sync fail!\n", __func__);
540 goto exit;
541 }
542
543 hal_status = rtw_hal_update_sta_entry(hal_info, sta, linked);
544 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
545 PHL_ERR("%s: update sta entry fail(%d)!!\n", __func__, hal_status);
546 goto exit;
547 }
548
549 #ifdef RTW_WKARD_HW_MGNT_GCMP_256_DISABLE
550 rtw_hal_mac_config_hw_mgnt_sec(hal_info, true);
551 #endif
552
553 exit:
554 return hal_status;
555 }
556
557 enum rtw_hal_status
hal_wow_deinit_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal_info,struct rtw_phl_stainfo_t * sta,struct hal_init_info_t * init_info)558 hal_wow_deinit_8852b(struct rtw_phl_com_t *phl_com,
559 struct hal_info_t *hal_info, struct rtw_phl_stainfo_t *sta,
560 struct hal_init_info_t *init_info)
561 {
562 struct hal_ops_t *hal_ops = hal_get_ops(hal_info);
563 enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
564 bool linked = sta->wrole->mstate == MLME_LINKED ? true : false;
565 /* AOAC Report */
566
567 hal_status = hal_ops->hal_cfg_fw(phl_com, hal_info, init_info->ic_name, RTW_FW_NIC);
568 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
569 PHL_ERR("%s: cfg fw fail(%d)!!\n", __func__, hal_status);
570 goto exit;
571 }
572
573 hal_status = rtw_hal_redownload_fw(phl_com, hal_info);
574 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
575 PHL_ERR("%s: redownload fw fail(%d)!!\n", __func__, hal_status);
576 goto exit;
577 }
578
579 hal_status = rtw_hal_mac_role_sync(hal_info, sta);
580 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
581 PHL_ERR("%s: role sync fail!\n", __func__);
582 goto exit;
583 }
584
585 hal_status = rtw_hal_update_sta_entry(hal_info, sta, linked);
586 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
587 PHL_ERR("%s: update sta entry fail(%d)!!\n", __func__, hal_status);
588 goto exit;
589 }
590
591 /* To Do : Recover RA ? */
592
593 #ifdef RTW_WKARD_HW_MGNT_GCMP_256_DISABLE
594 rtw_hal_mac_config_hw_mgnt_sec(hal_info, false);
595 #endif
596
597 exit:
598 return hal_status;
599 }
600 #endif /* CONFIG_WOWLAN */
601
602 #ifdef RTW_PHL_BCN /* fill 8852b bcn ops */
hal_config_beacon_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal,struct rtw_bcn_entry * bcn_entry)603 enum rtw_hal_status hal_config_beacon_8852b(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal, struct rtw_bcn_entry *bcn_entry)
604 {
605 if(hal_mac_ax_config_beacon(hal, bcn_entry) == RTW_HAL_STATUS_FAILURE)
606 return RTW_HAL_STATUS_FAILURE;
607
608 return RTW_HAL_STATUS_SUCCESS;
609 }
610
611
hal_update_beacon_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal,struct rtw_bcn_entry * bcn_entry)612 enum rtw_hal_status hal_update_beacon_8852b(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal, struct rtw_bcn_entry *bcn_entry)
613 {
614 if(hal_mac_ax_send_beacon(hal, bcn_entry) == RTW_HAL_STATUS_FAILURE)
615 return RTW_HAL_STATUS_FAILURE;
616
617 return RTW_HAL_STATUS_SUCCESS;
618 }
619
620 #endif /* RTW_PHL_BCN */
621
622
623 enum rtw_hal_status
hal_mp_init_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal_info,struct hal_init_info_t * init_info)624 hal_mp_init_8852b(struct rtw_phl_com_t *phl_com,
625 struct hal_info_t *hal_info,
626 struct hal_init_info_t *init_info)
627 {
628 struct hal_ops_t *hal_ops = hal_get_ops(hal_info);
629 enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
630
631 hal_status = hal_ops->hal_cfg_fw(phl_com, hal_info, init_info->ic_name, RTW_FW_NIC);
632 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
633 PHL_ERR("%s: cfg fw fail(%d)!!\n", __func__, hal_status);
634 goto exit;
635 }
636
637 hal_status = rtw_hal_redownload_fw(phl_com, hal_info);
638 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
639 PHL_ERR("%s: redownload fw fail(%d)!!\n", __func__, hal_status);
640 goto exit;
641 }
642 exit:
643 return hal_status;
644 }
645
646 enum rtw_hal_status
hal_mp_deinit_8852b(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal_info,struct hal_init_info_t * init_info)647 hal_mp_deinit_8852b(struct rtw_phl_com_t *phl_com,
648 struct hal_info_t *hal_info,
649 struct hal_init_info_t *init_info)
650 {
651 struct hal_ops_t *hal_ops = hal_get_ops(hal_info);
652 enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
653
654 hal_status = hal_ops->hal_cfg_fw(phl_com, hal_info, init_info->ic_name, RTW_FW_NIC);
655 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
656 PHL_ERR("%s: cfg fw fail(%d)!!\n", __func__, hal_status);
657 goto exit;
658 }
659
660 hal_status = rtw_hal_redownload_fw(phl_com, hal_info);
661 if (hal_status != RTW_HAL_STATUS_SUCCESS) {
662 PHL_ERR("%s: redownload fw fail(%d)!!\n", __func__, hal_status);
663 goto exit;
664 }
665
666 exit:
667 return hal_status;
668 }
669